193 lines
5.6 KiB
C
193 lines
5.6 KiB
C
/*-
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* Copyright (c) 2013 Ian Lepore <ian@freebsd.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include "opt_platform.h"
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/reboot.h>
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#include <vm/vm.h>
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#include <machine/bus.h>
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#include <machine/devmap.h>
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#include <machine/machdep.h>
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#include <arm/freescale/imx/imx6_anatopreg.h>
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#include <arm/freescale/imx/imx6_anatopvar.h>
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#include <arm/freescale/imx/imx_machdep.h>
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vm_offset_t
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initarm_lastaddr(void)
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{
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return (arm_devmap_lastaddr());
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}
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void
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initarm_early_init(void)
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{
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/* XXX - Get rid of this stuff soon. */
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boothowto |= RB_VERBOSE|RB_MULTIPLE;
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bootverbose = 1;
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}
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void
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initarm_gpio_init(void)
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{
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}
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void
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initarm_late_init(void)
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{
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}
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/*
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* Set up static device mappings.
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*
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* This attempts to cover the most-used devices with 1MB section mappings, which
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* is good for performance (uses fewer TLB entries for device access).
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*
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* ARMMP covers the interrupt controller, MPCore timers, global timer, and the
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* L2 cache controller. Most of the 1MB range is unused reserved space.
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*
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* AIPS1/AIPS2 cover most of the on-chip devices such as uart, spi, i2c, etc.
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*
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* Notably not mapped right now are HDMI, GPU, and other devices below ARMMP in
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* the memory map. When we get support for graphics it might make sense to
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* static map some of that area. Be careful with other things in that area such
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* as OCRAM that probably shouldn't be mapped as PTE_DEVICE memory.
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*/
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int
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initarm_devmap_init(void)
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{
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const uint32_t IMX6_ARMMP_PHYS = 0x00a00000;
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const uint32_t IMX6_ARMMP_SIZE = 0x00100000;
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const uint32_t IMX6_AIPS1_PHYS = 0x02000000;
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const uint32_t IMX6_AIPS1_SIZE = 0x00100000;
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const uint32_t IMX6_AIPS2_PHYS = 0x02100000;
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const uint32_t IMX6_AIPS2_SIZE = 0x00100000;
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arm_devmap_add_entry(IMX6_ARMMP_PHYS, IMX6_ARMMP_SIZE);
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arm_devmap_add_entry(IMX6_AIPS1_PHYS, IMX6_AIPS1_SIZE);
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arm_devmap_add_entry(IMX6_AIPS2_PHYS, IMX6_AIPS2_SIZE);
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return (0);
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}
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void
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cpu_reset(void)
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{
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const uint32_t IMX6_WDOG_CR_PHYS = 0x020bc000;
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imx_wdog_cpu_reset(IMX6_WDOG_CR_PHYS);
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}
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/*
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* Determine what flavor of imx6 we're running on.
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*
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* This code is based on the way u-boot does it. Information found on the web
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* indicates that Freescale themselves were the original source of this logic,
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* including the strange check for number of CPUs in the SCU configuration
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* register, which is apparently needed on some revisions of the SOLO.
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*
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* According to the documentation, there is such a thing as an i.MX6 Dual
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* (non-lite flavor). However, Freescale doesn't seem to have assigned it a
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* number or provided any logic to handle it in their detection code.
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*
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* Note that the ANALOG_DIGPROG and SCU configuration registers are not
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* documented in the chip reference manual. (SCU configuration is mentioned,
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* but not mapped out in detail.) I think the bottom two bits of the scu config
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* register may be ncpu-1.
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*
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* This hasn't been tested yet on a dual[-lite].
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*
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* On a solo:
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* digprog = 0x00610001
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* hwsoc = 0x00000062
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* scu config = 0x00000500
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* On a quad:
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* digprog = 0x00630002
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* hwsoc = 0x00000063
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* scu config = 0x00005503
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*/
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u_int imx_soc_type()
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{
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uint32_t digprog, hwsoc;
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uint32_t *pcr;
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const vm_offset_t SCU_CONFIG_PHYSADDR = 0x00a00004;
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#define HWSOC_MX6SL 0x60
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#define HWSOC_MX6DL 0x61
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#define HWSOC_MX6SOLO 0x62
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#define HWSOC_MX6Q 0x63
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digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG_SL);
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hwsoc = (digprog >> IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT) &
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IMX6_ANALOG_DIGPROG_SOCTYPE_MASK;
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if (hwsoc != HWSOC_MX6SL) {
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digprog = imx6_anatop_read_4(IMX6_ANALOG_DIGPROG);
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hwsoc = (digprog & IMX6_ANALOG_DIGPROG_SOCTYPE_MASK) >>
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IMX6_ANALOG_DIGPROG_SOCTYPE_SHIFT;
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/*printf("digprog = 0x%08x\n", digprog);*/
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if (hwsoc == HWSOC_MX6DL) {
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pcr = arm_devmap_ptov(SCU_CONFIG_PHYSADDR, 4);
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if (pcr != NULL) {
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/*printf("scu config = 0x%08x\n", *pcr);*/
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if ((*pcr & 0x03) == 0) {
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hwsoc = HWSOC_MX6SOLO;
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}
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}
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}
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}
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/* printf("hwsoc 0x%08x\n", hwsoc); */
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switch (hwsoc) {
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case HWSOC_MX6SL:
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return (IMXSOC_6SL);
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case HWSOC_MX6SOLO:
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return (IMXSOC_6S);
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case HWSOC_MX6DL:
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return (IMXSOC_6DL);
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case HWSOC_MX6Q :
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return (IMXSOC_6Q);
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default:
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printf("imx_soc_type: Don't understand hwsoc 0x%02x, "
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"digprog 0x%08x; assuming IMXSOC_6Q\n", hwsoc, digprog);
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break;
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}
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return (IMXSOC_6Q);
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}
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