8293fe75e4
receivers from being given interrupts if any CPUs in the system were not tagged as interrupt receivers that I introduced when switching the x86 interrupt code to track CPUs via FreeBSD CPU IDs rather than local APIC IDs. In practice this only affects systems with Hyperthreading (though disabling HTT in the BIOS would workaround the issue) as that is the only case currently where one can have CPUs that aren't tagged as interrupt receivers. On a Dell SC1425 test box with 2 x Xeon w/ HTT (so 4 logical CPUs of which 2 were interrupt receivers) the result was that all device interrupts were sent to CPU 0. MFC after: 1 week Pointy hat to: jhb |
||
---|---|---|
.. | ||
acpica | ||
amd64 | ||
compile | ||
conf | ||
ia32 | ||
include | ||
isa | ||
linux32 | ||
pci | ||
Makefile |