f61afb4498
aim/machdep.c: - the RI status register bit needs to be set when doing the mtmsrd 64-bit instruction test - psim doesn't implement the dcbz instruction so the run-time cacheline test fails. Set the cachline size to 32 to avoid infinite loops in future calls to __syncicache() aim/platform_chrp.c: - if after iterating through / and a name property of "cpus" still isn't found, just search directly for '/cpus'. - psim doesn't put a "reg" property on it's cpu nodes, so assume 0 since it is uniprocessor-only at this point powerpc/openpic.c - the number of CPUs reported is 1 too many on psim's openpic Reviewed by: nwhitehorn MFC after: 1 week (openpic part)