Hans Petter Selasky f81d0b43f1 Don't separate the status stage of the XHCI USB control transfers into ...

its own job because this breaks the simplified QEMU XHCI TRB parser,
which expects the complete USB control transfer as a series of back to
back TRBs. The old behaviour is kept under #ifdef in case this change
breaks enumeration of any USB devices.

PR:		212021
MFC after:	1 week

2016-08-22 19:32:50 +00:00

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at91dci_atmelarm.c

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at91dci_fdt.c

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at91dci.c

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at91dci.h

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atmegadci_atmelarm.c

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atmegadci.c

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atmegadci.h

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avr32dci.c

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avr32dci.h

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dwc_otg_fdt.c

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dwc_otg_fdt.h

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dwc_otg_hisi.c

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dwc_otg.c

Fix interrupt loop when switching from USB device to USB host mode by

2016-07-04 17:12:22 +00:00

dwc_otg.h

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dwc_otgreg.h

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ehci_fsl.c

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ehci_imx.c

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ehci_ixp4xx.c

sys/dev: replace comma with semicolon when pertinent.

2016-08-09 19:41:46 +00:00

ehci_mv.c

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ehci_pci.c

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ehci.c

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ehci.h

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ehcireg.h

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generic_ehci.c

Add a generic EHCI USB driver based on the Allwinner A10 driver. It is ACPI

2016-07-29 08:50:36 +00:00

generic_ohci.c

EXTRES: Add OF node as argument to all <foo>_get_by_ofw_<bar>() functions.

2016-07-10 18:28:15 +00:00

generic_usb_if.m

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musb_otg_atmelarm.c

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musb_otg.c

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musb_otg.h

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ohci_pci.c

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ohci_s3c24x0.c

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ohci.c

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ohci.h

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ohcireg.h

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saf1761_otg_boot.c

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saf1761_otg_fdt.c

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saf1761_otg_reg.h

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saf1761_otg.c

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saf1761_otg.h

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uhci_pci.c

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uhci.c

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uhci.h

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uhcireg.h

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usb_controller.c

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uss820dci_atmelarm.c

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uss820dci.c

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uss820dci.h

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xhci_mv.c

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xhci_pci.c

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xhci.c

Don't separate the status stage of the XHCI USB control transfers into

2016-08-22 19:32:50 +00:00

xhci.h

Fix regression issue with XHCI on 32-bit ARMv7 Armada-38x. Make sure

2016-07-06 10:57:04 +00:00

xhcireg.h

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