ed5bc52cd3
Terasic DE-4, and Terasic tPad Altera-based boards. Sponsored by: DARPA, AFRL
27 lines
675 B
Plaintext
27 lines
675 B
Plaintext
# $FreeBSD$
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#
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# Altera JTAG UARTs configured for console, debugging, and data putput on the
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# BERI simulator.
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#
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hint.altera_jtag_uart.0.at="nexus0"
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hint.altera_jtag_uart.0.maddr=0x7f000000
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hint.altera_jtag_uart.0.msize=0x40
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hint.altera_jtag_uart.0.irq=0
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hint.altera_jtag_uart.1.at="nexus0"
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hint.altera_jtag_uart.1.maddr=0x7f001000
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hint.altera_jtag_uart.1.msize=0x40
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hint.altera_jtag_uart.2.at="nexus0"
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hint.altera_jtag_uart.2.maddr=0x7f002000
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hint.altera_jtag_uart.2.msize=0x40
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#
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# On-board DE4 and tPad SD Card IP core -- also present in Bluespec
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# simulation.
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#
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hint.altera_sdcardc.0.at="nexus0"
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hint.altera_sdcardc.0.maddr=0x7f008000
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hint.altera_sdcardc.0.msize=0x400
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