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- Use the new architecture-agnostic buffer pool manager that uses uma(9) to manage a set of power-of-2 sized buffers for bus_dmamem_alloc(). - Create pools of buffers backed by both regular and uncacheable memory, and use them to handle regular versus BUS_DMA_COHERENT allocations. - Use uma(9) to manage a pool of bus_dmamap structs instead of local code to manage a static list of 500 items (it took 3300 maps to get to multi-user mode, so the static pool wasn't much of an optimization). - Small BUS_DMA_COHERENT allocations no longer waste an entire page per allocation, or set pages to uncached when they contain data other than DMA buffers. There's no longer a need for drivers to work around the inefficiency by allocing large buffers then sub-dividing them. - Because we know the alignment and padding of buffers allocated by bus_dmamem_alloc() (whether coherent or regular memory, and whether obtained from the pool allocator or directly from the kernel) we can avoid doing partial cacheline flushes on them. - Add a fast-out to _bus_dma_could_bounce() (and some comments about what the routine really does because the old misplaced comment was wrong). - Everywhere the dma tag alignment is used, the interpretation is that an alignment of 1 means no special alignment. If the tag is created with an alignment argument of zero, store it in the tag as one, and remove all the code scattered around that changed 0->1 at point of use. - Remove stack-allocated arrays of segments, use a local array of two segments within the tag struct, or dynamically allocate an array at first use if nsegments > 2. On an arm system I tested, only 5 of 97 tags used more than two segments. On my x86 desktop it was only 7 of 111 tags. Submitted by: Ian Lepore <freebsd@damnhippie.dyndns.org>
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