79 lines
1.4 KiB
Plaintext
79 lines
1.4 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* DTS file for CSR SiRFatlas6 Evaluation Board
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*
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* Copyright (c) 2012 Cambridge Silicon Radio Limited, a CSR plc group company.
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*/
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/dts-v1/;
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/include/ "atlas6.dtsi"
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/ {
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model = "CSR SiRFatlas6 Evaluation Board";
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compatible = "sirf,atlas6-cb", "sirf,atlas6";
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memory {
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device_type = "memory";
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reg = <0x00000000 0x20000000>;
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};
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axi {
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peri-iobg {
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uart@b0060000 {
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pinctrl-names = "default";
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pinctrl-0 = <&uart1_pins_a>;
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};
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spi@b00d0000 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&spi0_pins_a>;
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spi@0 {
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compatible = "spidev";
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reg = <0>;
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spi-max-frequency = <1000000>;
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};
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};
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spi@b0170000 {
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pinctrl-names = "default";
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pinctrl-0 = <&spi1_pins_a>;
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};
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i2c0: i2c@b00e0000 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&i2c0_pins_a>;
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lcd@40 {
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compatible = "sirf,lcd";
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reg = <0x40>;
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};
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};
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};
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disp-iobg {
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lcd@90010000 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&lcd_24pins_a>;
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};
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};
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};
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display: display@0 {
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panels {
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panel0: panel@0 {
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panel-name = "Innolux TFT";
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hactive = <800>;
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vactive = <480>;
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left_margin = <20>;
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right_margin = <234>;
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upper_margin = <3>;
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lower_margin = <41>;
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hsync_len = <3>;
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vsync_len = <2>;
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pixclock = <33264000>;
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sync = <3>;
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timing = <0x88>;
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};
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};
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};
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};
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