freebsd-skq/sys/amd64
KATO Takenori 65cbb03cfe Added new options CPU_PPRO2CELERON and CPU_L2_LATENCY to support
Socket 8 to 370 converters.  When (1) CPU_PPRO2CELERON option is
defined, (2) Intel CPU is found and (3) CPU ID is 0x66?, L2 cache is
enabled through MSR 0x11e.  The L2 cache latency value can be
specified by CPU_L2_LATENCY option.  Default value of L2 cache latency
is 5.

These options are useful if you use Socket 8 to Socket 370 converter
(e.g. Power Leap's PL-Pro/II.)  Most PentiumPro BIOSs don't enable L2
cache of Mendocino Celeron CPUs because they don't know Celeron CPUs.
These options are needles if you use a Coppermine (FCPGA) Celeron or
PentiumIII, becuase the L2 cache enable bit is hard wired and L2 cache
is always enabled.
2000-06-13 09:10:37 +00:00
..
amd64 Added new options CPU_PPRO2CELERON and CPU_L2_LATENCY to support 2000-06-13 09:10:37 +00:00
conf Bump the default NBUS value to 8. 2000-05-31 19:01:45 +00:00
include Further fixes for multiple-IO-APIC systems from Tor Egge: 2000-05-31 21:37:28 +00:00
isa Pack the SWI bits to save some time and space. 2000-05-31 16:36:20 +00:00
pci Add OPTi 82C700 chipset. 2000-05-24 09:03:30 +00:00
Makefile Add soft updates to the set of things being tagged. Syntax cleanup. 2000-01-27 01:22:06 +00:00