0290a0c2f7
TUNABLE variable (hw.netmap.buf_size) so we can experiment with values different from 2048 which may give better cache performance. - rearrange the memory allocation code so it will be easier to replace it with a different implementation. The current code relies on a single large contiguous chunk of memory obtained through contigmalloc. The new implementation (not committed yet) uses multiple smaller chunks which are easier to fit in a fragmented address space.
358 lines
9.8 KiB
C
358 lines
9.8 KiB
C
/*
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* Copyright (C) 2011 Universita` di Pisa. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* $FreeBSD$
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* $Id: if_igb_netmap.h 9802 2011-12-02 18:42:37Z luigi $
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*
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* netmap modifications for igb
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* contribured by Ahmed Kooli
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*/
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#include <net/netmap.h>
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#include <sys/selinfo.h>
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#include <vm/vm.h>
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#include <vm/pmap.h> /* vtophys ? */
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#include <dev/netmap/netmap_kern.h>
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static int igb_netmap_reg(struct ifnet *, int onoff);
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static int igb_netmap_txsync(void *, u_int, int);
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static int igb_netmap_rxsync(void *, u_int, int);
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static void igb_netmap_lock_wrapper(void *, int, u_int);
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static void
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igb_netmap_attach(struct adapter *adapter)
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{
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struct netmap_adapter na;
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bzero(&na, sizeof(na));
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na.ifp = adapter->ifp;
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na.separate_locks = 1;
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na.num_tx_desc = adapter->num_tx_desc;
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na.num_rx_desc = adapter->num_rx_desc;
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na.nm_txsync = igb_netmap_txsync;
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na.nm_rxsync = igb_netmap_rxsync;
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na.nm_lock = igb_netmap_lock_wrapper;
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na.nm_register = igb_netmap_reg;
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netmap_attach(&na, adapter->num_queues);
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}
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/*
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* wrapper to export locks to the generic code
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*/
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static void
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igb_netmap_lock_wrapper(void *_a, int what, u_int queueid)
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{
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struct adapter *adapter = _a;
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ASSERT(queueid < adapter->num_queues);
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switch (what) {
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case NETMAP_CORE_LOCK:
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IGB_CORE_LOCK(adapter);
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break;
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case NETMAP_CORE_UNLOCK:
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IGB_CORE_UNLOCK(adapter);
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break;
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case NETMAP_TX_LOCK:
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IGB_TX_LOCK(&adapter->tx_rings[queueid]);
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break;
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case NETMAP_TX_UNLOCK:
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IGB_TX_UNLOCK(&adapter->tx_rings[queueid]);
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break;
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case NETMAP_RX_LOCK:
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IGB_RX_LOCK(&adapter->rx_rings[queueid]);
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break;
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case NETMAP_RX_UNLOCK:
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IGB_RX_UNLOCK(&adapter->rx_rings[queueid]);
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break;
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}
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}
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/*
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* support for netmap register/unregisted. We are already under core lock.
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* only called on the first init or the last unregister.
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*/
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static int
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igb_netmap_reg(struct ifnet *ifp, int onoff)
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{
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struct adapter *adapter = ifp->if_softc;
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struct netmap_adapter *na = NA(ifp);
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int error = 0;
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if (na == NULL)
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return EINVAL;
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igb_disable_intr(adapter);
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/* Tell the stack that the interface is no longer active */
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ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
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if (onoff) {
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ifp->if_capenable |= IFCAP_NETMAP;
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/* save if_transmit to restore it later */
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na->if_transmit = ifp->if_transmit;
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ifp->if_transmit = netmap_start;
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igb_init_locked(adapter);
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if ((ifp->if_drv_flags & (IFF_DRV_RUNNING | IFF_DRV_OACTIVE)) == 0) {
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error = ENOMEM;
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goto fail;
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}
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} else {
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fail:
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/* restore if_transmit */
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ifp->if_transmit = na->if_transmit;
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ifp->if_capenable &= ~IFCAP_NETMAP;
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igb_init_locked(adapter); /* also enables intr */
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}
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return (error);
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}
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/*
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* Reconcile kernel and user view of the transmit ring.
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*/
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static int
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igb_netmap_txsync(void *a, u_int ring_nr, int do_lock)
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{
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struct adapter *adapter = a;
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struct tx_ring *txr = &adapter->tx_rings[ring_nr];
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struct netmap_adapter *na = NA(adapter->ifp);
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struct netmap_kring *kring = &na->tx_rings[ring_nr];
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struct netmap_ring *ring = kring->ring;
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int j, k, l, n = 0, lim = kring->nkr_num_slots - 1;
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/* generate an interrupt approximately every half ring */
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int report_frequency = kring->nkr_num_slots >> 1;
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k = ring->cur;
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if (k > lim)
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return netmap_ring_reinit(kring);
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if (do_lock)
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IGB_TX_LOCK(txr);
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bus_dmamap_sync(txr->txdma.dma_tag, txr->txdma.dma_map,
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BUS_DMASYNC_POSTREAD);
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/* update avail to what the hardware knows */
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ring->avail = kring->nr_hwavail;
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j = kring->nr_hwcur; /* netmap ring index */
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if (j != k) { /* we have new packets to send */
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u32 olinfo_status = 0;
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l = j - kring->nkr_hwofs; /* NIC ring index */
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if (l < 0)
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l += lim + 1;
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/* 82575 needs the queue index added */
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if (adapter->hw.mac.type == e1000_82575)
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olinfo_status |= txr->me << 4;
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while (j != k) {
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struct netmap_slot *slot = &ring->slot[j];
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struct igb_tx_buffer *txbuf = &txr->tx_buffers[l];
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union e1000_adv_tx_desc *curr =
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(union e1000_adv_tx_desc *)&txr->tx_base[l];
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uint64_t paddr;
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void *addr = PNMB(slot, &paddr);
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int flags = ((slot->flags & NS_REPORT) ||
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j == 0 || j == report_frequency) ?
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E1000_ADVTXD_DCMD_RS : 0;
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int len = slot->len;
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if (addr == netmap_buffer_base || len > NETMAP_BUF_SIZE) {
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if (do_lock)
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IGB_TX_UNLOCK(txr);
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return netmap_ring_reinit(kring);
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}
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slot->flags &= ~NS_REPORT;
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// XXX do we need to set the address ?
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curr->read.buffer_addr = htole64(paddr);
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curr->read.olinfo_status =
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htole32(olinfo_status |
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(len<< E1000_ADVTXD_PAYLEN_SHIFT));
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curr->read.cmd_type_len =
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htole32(len | E1000_ADVTXD_DTYP_DATA |
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E1000_ADVTXD_DCMD_IFCS |
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E1000_ADVTXD_DCMD_DEXT |
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E1000_ADVTXD_DCMD_EOP | flags);
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if (slot->flags & NS_BUF_CHANGED) {
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/* buffer has changed, reload map */
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netmap_reload_map(txr->txtag, txbuf->map, addr);
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slot->flags &= ~NS_BUF_CHANGED;
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}
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bus_dmamap_sync(txr->txtag, txbuf->map,
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BUS_DMASYNC_PREWRITE);
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j = (j == lim) ? 0 : j + 1;
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l = (l == lim) ? 0 : l + 1;
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n++;
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}
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kring->nr_hwcur = k;
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/* decrease avail by number of sent packets */
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kring->nr_hwavail -= n;
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ring->avail = kring->nr_hwavail;
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/* Set the watchdog XXX ? */
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txr->queue_status = IGB_QUEUE_WORKING;
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txr->watchdog_time = ticks;
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bus_dmamap_sync(txr->txdma.dma_tag, txr->txdma.dma_map,
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BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
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E1000_WRITE_REG(&adapter->hw, E1000_TDT(txr->me), l);
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}
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if (n == 0 || kring->nr_hwavail < 1) {
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int delta;
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/* record completed transmission using TDH */
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l = E1000_READ_REG(&adapter->hw, E1000_TDH(ring_nr));
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if (l >= kring->nkr_num_slots) /* XXX can it happen ? */
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l -= kring->nkr_num_slots;
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delta = l - txr->next_to_clean;
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if (delta) {
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/* new tx were completed */
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if (delta < 0)
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delta += kring->nkr_num_slots;
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txr->next_to_clean = l;
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kring->nr_hwavail += delta;
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ring->avail = kring->nr_hwavail;
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}
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}
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if (do_lock)
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IGB_TX_UNLOCK(txr);
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return 0;
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}
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/*
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* Reconcile kernel and user view of the receive ring.
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*/
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static int
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igb_netmap_rxsync(void *a, u_int ring_nr, int do_lock)
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{
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struct adapter *adapter = a;
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struct rx_ring *rxr = &adapter->rx_rings[ring_nr];
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struct netmap_adapter *na = NA(adapter->ifp);
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struct netmap_kring *kring = &na->rx_rings[ring_nr];
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struct netmap_ring *ring = kring->ring;
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int j, k, l, n, lim = kring->nkr_num_slots - 1;
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k = ring->cur;
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if (k > lim)
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return netmap_ring_reinit(kring);
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if (do_lock)
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IGB_RX_LOCK(rxr);
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/* Sync the ring. */
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bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map,
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BUS_DMASYNC_POSTREAD | BUS_DMASYNC_POSTWRITE);
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l = rxr->next_to_check;
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j = l + kring->nkr_hwofs;
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if (j > lim)
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j -= lim + 1;
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for (n = 0; ; n++) {
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union e1000_adv_rx_desc *curr = &rxr->rx_base[l];
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uint32_t staterr = le32toh(curr->wb.upper.status_error);
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if ((staterr & E1000_RXD_STAT_DD) == 0)
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break;
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ring->slot[j].len = le16toh(curr->wb.upper.length);
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bus_dmamap_sync(rxr->ptag,
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rxr->rx_buffers[l].pmap, BUS_DMASYNC_POSTREAD);
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j = (j == lim) ? 0 : j + 1;
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l = (l == lim) ? 0 : l + 1;
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}
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if (n) {
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rxr->next_to_check = l;
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kring->nr_hwavail += n;
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}
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/* skip past packets that userspace has already processed,
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* making them available for reception.
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* advance nr_hwcur and issue a bus_dmamap_sync on the
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* buffers so it is safe to write to them.
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* Also increase nr_hwavail
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*/
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j = kring->nr_hwcur;
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l = kring->nr_hwcur - kring->nkr_hwofs;
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if (l < 0)
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l += lim + 1;
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if (j != k) { /* userspace has read some packets. */
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n = 0;
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while (j != k) {
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struct netmap_slot *slot = ring->slot + j;
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union e1000_adv_rx_desc *curr = &rxr->rx_base[l];
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struct igb_rx_buf *rxbuf = rxr->rx_buffers + l;
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uint64_t paddr;
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void *addr = PNMB(slot, &paddr);
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if (addr == netmap_buffer_base) { /* bad buf */
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if (do_lock)
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IGB_RX_UNLOCK(rxr);
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return netmap_ring_reinit(kring);
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}
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curr->wb.upper.status_error = 0;
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curr->read.pkt_addr = htole64(paddr);
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if (slot->flags & NS_BUF_CHANGED) {
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netmap_reload_map(rxr->ptag, rxbuf->pmap, addr);
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slot->flags &= ~NS_BUF_CHANGED;
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}
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bus_dmamap_sync(rxr->ptag, rxbuf->pmap,
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BUS_DMASYNC_PREREAD);
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j = (j == lim) ? 0 : j + 1;
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l = (l == lim) ? 0 : l + 1;
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n++;
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}
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kring->nr_hwavail -= n;
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kring->nr_hwcur = ring->cur;
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bus_dmamap_sync(rxr->rxdma.dma_tag, rxr->rxdma.dma_map,
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BUS_DMASYNC_PREREAD | BUS_DMASYNC_PREWRITE);
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/* IMPORTANT: we must leave one free slot in the ring,
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* so move l back by one unit
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*/
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l = (l == 0) ? lim : l - 1;
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E1000_WRITE_REG(&adapter->hw, E1000_RDT(rxr->me), l);
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}
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/* tell userspace that there are new packets */
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ring->avail = kring->nr_hwavail ;
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if (do_lock)
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IGB_RX_UNLOCK(rxr);
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return 0;
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}
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