ab7a71f6e7
the ones which run the message ring handler. Some bits of the interrupt mask are part of the status register which is saved with the process context, and these bits are initialized from the cpu on which the process is created. This means that all the processes should have the same value for these interrupt mask bits, so that the interrupt mask remains the same regardless of what thread is scheduled on the cpu. Submitted by: Sriram Gorti (srgorti at netlogicmicro dot com) |
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| adm5120 | ||
| alchemy | ||
| atheros | ||
| cavium | ||
| compile | ||
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| idt | ||
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| malta | ||
| mips | ||
| rmi | ||
| sentry5 | ||
| sibyte | ||