276 lines
7.0 KiB
C
276 lines
7.0 KiB
C
/*-
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* Copyright (c) 2014 Rui Paulo <rpaulo@FreeBSD.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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* DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/malloc.h>
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#include <sys/rman.h>
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#include <sys/event.h>
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#include <sys/selinfo.h>
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#include <sys/watchdog.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/frame.h>
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#include <machine/intr.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <machine/bus.h>
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#include <arm/ti/ti_prcm.h>
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#include <arm/ti/ti_wdt.h>
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#ifdef DEBUG
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#define DPRINTF(fmt, ...) do { \
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printf("%s: ", __func__); \
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printf(fmt, __VA_ARGS__); \
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} while (0)
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#else
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#define DPRINTF(fmt, ...)
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#endif
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static device_probe_t ti_wdt_probe;
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static device_attach_t ti_wdt_attach;
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static device_detach_t ti_wdt_detach;
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static void ti_wdt_intr(void *);
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static void ti_wdt_event(void *, unsigned int, int *);
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struct ti_wdt_softc {
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struct resource *sc_mem_res;
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struct resource *sc_irq_res;
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void *sc_intr;
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bus_space_tag_t sc_bt;
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bus_space_handle_t sc_bh;
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eventhandler_tag sc_ev_tag;
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};
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static device_method_t ti_wdt_methods[] = {
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DEVMETHOD(device_probe, ti_wdt_probe),
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DEVMETHOD(device_attach, ti_wdt_attach),
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DEVMETHOD(device_detach, ti_wdt_detach),
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DEVMETHOD_END
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};
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static driver_t ti_wdt_driver = {
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"ti_wdt",
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ti_wdt_methods,
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sizeof(struct ti_wdt_softc)
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};
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static devclass_t ti_wdt_devclass;
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DRIVER_MODULE(ti_wdt, simplebus, ti_wdt_driver, ti_wdt_devclass, 0, 0);
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static __inline uint32_t
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ti_wdt_reg_read(struct ti_wdt_softc *sc, uint32_t reg)
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{
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return (bus_space_read_4(sc->sc_bt, sc->sc_bh, reg));
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}
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static __inline void
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ti_wdt_reg_write(struct ti_wdt_softc *sc, uint32_t reg, uint32_t val)
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{
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bus_space_write_4(sc->sc_bt, sc->sc_bh, reg, val);
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}
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/*
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* Wait for the write to a specific synchronised register to complete.
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*/
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static __inline void
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ti_wdt_reg_wait(struct ti_wdt_softc *sc, uint32_t bit)
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{
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while (ti_wdt_reg_read(sc, TI_WDT_WWPS) & bit)
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DELAY(10);
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}
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static __inline void
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ti_wdt_disable(struct ti_wdt_softc *sc)
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{
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DPRINTF("disabling watchdog %p\n", sc);
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ti_wdt_reg_write(sc, TI_WDT_WSPR, 0xAAAA);
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ti_wdt_reg_wait(sc, TI_W_PEND_WSPR);
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ti_wdt_reg_write(sc, TI_WDT_WSPR, 0x5555);
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ti_wdt_reg_wait(sc, TI_W_PEND_WSPR);
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}
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static __inline void
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ti_wdt_enable(struct ti_wdt_softc *sc)
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{
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DPRINTF("enabling watchdog %p\n", sc);
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ti_wdt_reg_write(sc, TI_WDT_WSPR, 0xBBBB);
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ti_wdt_reg_wait(sc, TI_W_PEND_WSPR);
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ti_wdt_reg_write(sc, TI_WDT_WSPR, 0x4444);
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ti_wdt_reg_wait(sc, TI_W_PEND_WSPR);
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}
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static int
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ti_wdt_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_is_compatible(dev, "ti,omap3-wdt")) {
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device_set_desc(dev, "TI Watchdog Timer");
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return (BUS_PROBE_DEFAULT);
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}
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return (ENXIO);
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}
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static int
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ti_wdt_attach(device_t dev)
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{
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struct ti_wdt_softc *sc;
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int rid;
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sc = device_get_softc(dev);
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rid = 0;
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sc->sc_mem_res = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid,
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RF_ACTIVE);
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if (sc->sc_mem_res == NULL) {
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device_printf(dev, "could not allocate memory resource\n");
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return (ENXIO);
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}
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sc->sc_bt = rman_get_bustag(sc->sc_mem_res);
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sc->sc_bh = rman_get_bushandle(sc->sc_mem_res);
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sc->sc_irq_res = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid, RF_ACTIVE);
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if (sc->sc_irq_res == NULL) {
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device_printf(dev, "could not allocate interrupt resource\n");
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ti_wdt_detach(dev);
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return (ENXIO);
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}
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if (bus_setup_intr(dev, sc->sc_irq_res, INTR_MPSAFE | INTR_TYPE_MISC,
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NULL, ti_wdt_intr, sc, &sc->sc_intr) != 0) {
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device_printf(dev,
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"unable to setup the interrupt handler\n");
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ti_wdt_detach(dev);
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return (ENXIO);
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}
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/* Reset, enable interrupts and stop the watchdog. */
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ti_wdt_reg_write(sc, TI_WDT_WDSC,
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ti_wdt_reg_read(sc, TI_WDT_WDSC) | TI_WDSC_SR);
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while (ti_wdt_reg_read(sc, TI_WDT_WDSC) & TI_WDSC_SR)
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DELAY(10);
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ti_wdt_reg_write(sc, TI_WDT_WIRQENSET, TI_IRQ_EN_OVF | TI_IRQ_EN_DLY);
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ti_wdt_disable(sc);
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if (bootverbose)
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device_printf(dev, "revision: 0x%x\n",
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ti_wdt_reg_read(sc, TI_WDT_WIDR));
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sc->sc_ev_tag = EVENTHANDLER_REGISTER(watchdog_list, ti_wdt_event, sc,
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0);
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return (0);
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}
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static int
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ti_wdt_detach(device_t dev)
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{
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struct ti_wdt_softc *sc;
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sc = device_get_softc(dev);
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if (sc->sc_ev_tag)
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EVENTHANDLER_DEREGISTER(watchdog_list, sc->sc_ev_tag);
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if (sc->sc_intr)
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bus_teardown_intr(dev, sc->sc_irq_res, sc->sc_intr);
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if (sc->sc_irq_res)
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bus_release_resource(dev, SYS_RES_IRQ,
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rman_get_rid(sc->sc_irq_res), sc->sc_irq_res);
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if (sc->sc_mem_res)
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bus_release_resource(dev, SYS_RES_MEMORY,
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rman_get_rid(sc->sc_mem_res), sc->sc_mem_res);
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return (0);
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}
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static void
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ti_wdt_intr(void *arg)
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{
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struct ti_wdt_softc *sc;
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sc = arg;
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DPRINTF("interrupt %p", sc);
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ti_wdt_reg_write(sc, TI_WDT_WIRQSTAT, TI_IRQ_EV_OVF | TI_IRQ_EV_DLY);
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/* TODO: handle interrupt */
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}
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static void
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ti_wdt_event(void *arg, unsigned int cmd, int *error)
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{
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struct ti_wdt_softc *sc;
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uint8_t s;
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uint32_t wldr;
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uint32_t ptv;
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sc = arg;
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ti_wdt_disable(sc);
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if (cmd == WD_TO_NEVER) {
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*error = 0;
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return;
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}
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DPRINTF("cmd 0x%x\n", cmd);
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cmd &= WD_INTERVAL;
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if (cmd < WD_TO_1SEC) {
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*error = EINVAL;
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return;
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}
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s = 1 << (cmd - WD_TO_1SEC);
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DPRINTF("seconds %u\n", s);
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/*
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* Leave the pre-scaler with its default values:
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* PTV = 0 == 2**0 == 1
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* PRE = 1 (enabled)
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*
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* Compute the load register value assuming a 32kHz clock.
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* See OVF_Rate in the WDT section of the AM335x TRM.
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*/
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ptv = 0;
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wldr = 0xffffffff - (s * (32768 / (1 << ptv))) + 1;
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DPRINTF("wldr 0x%x\n", wldr);
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ti_wdt_reg_write(sc, TI_WDT_WLDR, wldr);
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/*
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* Trigger a timer reload.
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*/
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ti_wdt_reg_write(sc, TI_WDT_WTGR,
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ti_wdt_reg_read(sc, TI_WDT_WTGR) + 1);
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ti_wdt_reg_wait(sc, TI_W_PEND_WTGR);
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ti_wdt_enable(sc);
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*error = 0;
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}
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