226 lines
5.7 KiB
C
226 lines
5.7 KiB
C
/*-
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* Copyright (c) 2001-2003, Shunsuke Akiyama <akiyama@FreeBSD.org>.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _IF_RUEREG_H_
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#define _IF_RUEREG_H_
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#define RUE_INTR_PIPE 1 /* Use INTR PIPE */
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#define RUE_CONFIG_NO 1
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#define RUE_IFACE_IDX 0
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#define RUE_ENDPT_RX 0x0
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#define RUE_ENDPT_TX 0x1
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#define RUE_ENDPT_INTR 0x2
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#define RUE_ENDPT_MAX 0x3
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#define RUE_INTR_PKTLEN 0x8
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#define RUE_TIMEOUT 1000
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#define ETHER_ALIGN 2
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#define RUE_MIN_FRAMELEN 60
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#define RUE_INTR_INTERVAL 100 /* ms */
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/*
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* Registers
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*/
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#define RUE_IDR0 0x0120
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#define RUE_IDR1 0x0121
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#define RUE_IDR2 0x0122
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#define RUE_IDR3 0x0123
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#define RUE_IDR4 0x0124
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#define RUE_IDR5 0x0125
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#define RUE_MAR0 0x0126
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#define RUE_MAR1 0x0127
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#define RUE_MAR2 0x0128
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#define RUE_MAR3 0x0129
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#define RUE_MAR4 0x012A
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#define RUE_MAR5 0x012B
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#define RUE_MAR6 0x012C
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#define RUE_MAR7 0x012D
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#define RUE_CR 0x012E /* B, R/W */
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#define RUE_CR_SOFT_RST 0x10
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#define RUE_CR_RE 0x08
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#define RUE_CR_TE 0x04
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#define RUE_CR_EP3CLREN 0x02
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#define RUE_TCR 0x012F /* B, R/W */
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#define RUE_TCR_TXRR1 0x80
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#define RUE_TCR_TXRR0 0x40
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#define RUE_TCR_IFG1 0x10
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#define RUE_TCR_IFG0 0x08
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#define RUE_TCR_NOCRC 0x01
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#define RUE_TCR_CONFIG (RUE_TCR_TXRR1|RUE_TCR_TXRR0|RUE_TCR_IFG1|RUE_TCR_IFG0)
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#define RUE_RCR 0x0130 /* W, R/W */
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#define RUE_RCR_TAIL 0x80
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#define RUE_RCR_AER 0x40
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#define RUE_RCR_AR 0x20
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#define RUE_RCR_AM 0x10
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#define RUE_RCR_AB 0x08
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#define RUE_RCR_AD 0x04
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#define RUE_RCR_AAM 0x02
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#define RUE_RCR_AAP 0x01
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#define RUE_RCR_CONFIG (RUE_RCR_TAIL|RUE_RCR_AD)
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#define RUE_TSR 0x0132
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#define RUE_RSR 0x0133
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#define RUE_CON0 0x0135
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#define RUE_CON1 0x0136
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#define RUE_MSR 0x0137
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#define RUE_PHYADD 0x0138
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#define RUE_PHYDAT 0x0139
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#define RUE_PHYCNT 0x013B /* B, R/W */
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#define RUE_PHYCNT_PHYOWN 0x40
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#define RUE_PHYCNT_RWCR 0x20
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#define RUE_GPPC 0x013D
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#define RUE_WAKECNT 0x013E
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#define RUE_BMCR 0x0140
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#define RUE_BMCR_SPD_SET 0x2000
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#define RUE_BMCR_DUPLEX 0x0100
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#define RUE_BMSR 0x0142
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#define RUE_ANAR 0x0144 /* W, R/W */
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#define RUE_ANAR_PAUSE 0x0400
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#define RUE_ANLP 0x0146 /* W, R/O */
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#define RUE_ANLP_PAUSE 0x0400
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#define RUE_AER 0x0148
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#define RUE_NWAYT 0x014A
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#define RUE_CSCR 0x014C
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#define RUE_CRC0 0x014E
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#define RUE_CRC1 0x0150
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#define RUE_CRC2 0x0152
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#define RUE_CRC3 0x0154
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#define RUE_CRC4 0x0156
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#define RUE_BYTEMASK0 0x0158
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#define RUE_BYTEMASK1 0x0160
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#define RUE_BYTEMASK2 0x0168
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#define RUE_BYTEMASK3 0x0170
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#define RUE_BYTEMASK4 0x0178
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#define RUE_PHY1 0x0180
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#define RUE_PHY2 0x0184
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#define RUE_TW1 0x0186
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#define RUE_REG_MIN 0x0120
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#define RUE_REG_MAX 0x0189
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/*
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* EEPROM address declarations
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*/
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#define RUE_EEPROM_BASE 0x1200
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#define RUE_EEPROM_IDR0 (RUE_EEPROM_BASE + 0x02)
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#define RUE_EEPROM_IDR1 (RUE_EEPROM_BASE + 0x03)
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#define RUE_EEPROM_IDR2 (RUE_EEPROM_BASE + 0x03)
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#define RUE_EEPROM_IDR3 (RUE_EEPROM_BASE + 0x03)
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#define RUE_EEPROM_IDR4 (RUE_EEPROM_BASE + 0x03)
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#define RUE_EEPROM_IDR5 (RUE_EEPROM_BASE + 0x03)
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#define RUE_EEPROM_INTERVAL (RUE_EEPROM_BASE + 0x17)
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struct rue_intrpkt {
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u_int8_t rue_tsr;
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u_int8_t rue_rsr;
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u_int8_t rue_gep_msr;
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u_int8_t rue_waksr;
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u_int8_t rue_txok_cnt;
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u_int8_t rue_rxlost_cnt;
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u_int8_t rue_crcerr_cnt;
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u_int8_t rue_col_cnt;
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};
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struct rue_rxpkt {
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u_int16_t rue_pktlen : 12;
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u_int16_t rue_rxstat : 4;
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};
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#define RUE_RXSTAT_VALID 0x01
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#define RUE_RXSTAT_RUNT 0x02
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#define RUE_RXSTAT_PMATCH 0x04
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#define RUE_RXSTAT_MCAST 0x08
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#define RUE_RXSTAT_MASK RUE_RXSTAT_VALID
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struct rue_type {
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u_int16_t rue_vid;
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u_int16_t rue_did;
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};
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struct rue_softc {
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struct ifnet *rue_ifp;
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device_t rue_dev;
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device_t rue_miibus;
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usbd_device_handle rue_udev;
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usbd_interface_handle rue_iface;
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struct rue_type *rue_info;
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int rue_ed[RUE_ENDPT_MAX];
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usbd_pipe_handle rue_ep[RUE_ENDPT_MAX];
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int rue_unit;
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u_int8_t rue_link;
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int rue_if_flags;
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struct ue_cdata rue_cdata;
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struct callout_handle rue_stat_ch;
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struct mtx rue_mtx;
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char rue_dying;
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struct timeval rue_rx_notice;
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struct usb_qdat rue_qdat;
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};
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#if defined(__FreeBSD__)
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#define GET_MII(sc) (device_get_softc((sc)->rue_miibus))
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#elif defined(__NetBSD__)
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#define GET_MII(sc) (&(sc)->rue_mii)
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#elif defined(__OpenBSD__)
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#define GET_MII(sc) (&(sc)->rue_mii)
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#endif
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#if 0
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#define RUE_LOCK(_sc) mtx_lock(&(_sc)->rue_mtx)
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#define RUE_UNLOCK(_sc) mtx_unlock(&(_sc)->rue_mtx)
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#else
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#define RUE_LOCK(_sc)
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#define RUE_UNLOCK(_sc)
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#endif
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#endif /* _IF_RUEREG_H_ */
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