ea29110cd5
88F5xxx, 88F6xxx and MV78xxx system on chip devices). Reviewed by: stas Obtained from: Semihalf
37 lines
995 B
Plaintext
37 lines
995 B
Plaintext
# $FreeBSD$
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#
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# The Marvell CPU cores
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# - Compliant with V5TE architecture
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# - Super scalar dual issue CPU
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# - Big/Little Endian
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# - MMU/MPU
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# - L1 Cache: Supports streaming and write allocate
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# - Variable pipeline stages
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# - Out-of-order execution
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# - Branch Prediction
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# - JTAG/ICE
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# - Vector Floating Point (VFP) unit
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#
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arm/arm/bus_space_generic.c standard
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arm/arm/cpufunc_asm_arm10.S standard
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arm/arm/cpufunc_asm_armv5_ec.S standard
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arm/arm/cpufunc_asm_sheeva.S standard
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arm/arm/irq_dispatch.S standard
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arm/mv/bus_space.c standard
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arm/mv/common.c standard
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arm/mv/gpio.c standard
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arm/mv/ic.c standard
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arm/mv/mv_machdep.c standard
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arm/mv/mv_pci.c optional pci
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arm/mv/mv_sata.c optional ata | atamvsata
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arm/mv/obio.c standard
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arm/mv/timer.c standard
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arm/mv/twsi.c optional iicbus
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dev/mge/if_mge.c optional mge
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dev/uart/uart_bus_mbus.c optional uart
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dev/uart/uart_cpu_mv.c optional uart
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dev/uart/uart_dev_ns8250.c optional uart
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dev/usb/controller/ehci_mbus.c optional ehci
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