67d5f1a727
- Stateful TCP offload drivers for Terminator 3 and 4 (T3 and T4) ASICs. These are available as t3_tom and t4_tom modules that augment cxgb(4) and cxgbe(4) respectively. The cxgb/cxgbe drivers continue to work as usual with or without these extra features. - iWARP driver for Terminator 3 ASIC (kernel verbs). T4 iWARP in the works and will follow soon. Build-tested with make universe. 30s overview ============ What interfaces support TCP offload? Look for TOE4 and/or TOE6 in the capabilities of an interface: # ifconfig -m | grep TOE Enable/disable TCP offload on an interface (just like any other ifnet capability): # ifconfig cxgbe0 toe # ifconfig cxgbe0 -toe Which connections are offloaded? Look for toe4 and/or toe6 in the output of netstat and sockstat: # netstat -np tcp | grep toe # sockstat -46c | grep toe Reviewed by: bz, gnn Sponsored by: Chelsio communications. MFC after: ~3 months (after 9.1, and after ensuring MFC is feasible)
241 lines
6.4 KiB
C
241 lines
6.4 KiB
C
/**************************************************************************
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Copyright (c) 2007, Chelsio Inc.
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All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are met:
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1. Redistributions of source code must retain the above copyright notice,
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this list of conditions and the following disclaimer.
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2. Neither the name of the Chelsio Corporation nor the names of its
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contributors may be used to endorse or promote products derived from
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this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
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LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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POSSIBILITY OF SUCH DAMAGE.
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***************************************************************************/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_inet.h"
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#ifdef TCP_OFFLOAD
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/bus.h>
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#include <sys/pciio.h>
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#include <sys/conf.h>
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#include <machine/bus.h>
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#include <machine/resource.h>
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#include <sys/bus_dma.h>
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#include <sys/rman.h>
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#include <sys/ioccom.h>
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#include <sys/mbuf.h>
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#include <sys/mutex.h>
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#include <sys/rwlock.h>
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#include <sys/linker.h>
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#include <sys/firmware.h>
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#include <sys/socket.h>
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#include <sys/sockio.h>
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#include <sys/smp.h>
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#include <sys/sysctl.h>
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#include <sys/syslog.h>
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#include <sys/queue.h>
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#include <sys/taskqueue.h>
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#include <sys/proc.h>
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#include <sys/queue.h>
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#include <sys/libkern.h>
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#include <netinet/in.h>
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#include <rdma/ib_verbs.h>
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#include <rdma/ib_umem.h>
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#include <rdma/ib_user_verbs.h>
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#include <linux/idr.h>
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#include <ulp/iw_cxgb/iw_cxgb_ib_intfc.h>
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#include <cxgb_include.h>
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#include <ulp/iw_cxgb/iw_cxgb_wr.h>
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#include <ulp/iw_cxgb/iw_cxgb_hal.h>
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#include <ulp/iw_cxgb/iw_cxgb_provider.h>
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#include <ulp/iw_cxgb/iw_cxgb_cm.h>
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#include <ulp/iw_cxgb/iw_cxgb.h>
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#include <ulp/iw_cxgb/iw_cxgb_resource.h>
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#include <ulp/iw_cxgb/iw_cxgb_user.h>
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static int iwch_finish_mem_reg(struct iwch_mr *mhp, u32 stag)
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{
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u32 mmid;
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mhp->attr.state = 1;
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mhp->attr.stag = stag;
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mmid = stag >> 8;
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mhp->ibmr.rkey = mhp->ibmr.lkey = stag;
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CTR3(KTR_IW_CXGB, "%s mmid 0x%x mhp %p", __func__, mmid, mhp);
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return insert_handle(mhp->rhp, &mhp->rhp->mmidr, mhp, mmid);
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}
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int iwch_register_mem(struct iwch_dev *rhp, struct iwch_pd *php,
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struct iwch_mr *mhp,
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int shift)
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{
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u32 stag;
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int ret;
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if (cxio_register_phys_mem(&rhp->rdev,
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&stag, mhp->attr.pdid,
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mhp->attr.perms,
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mhp->attr.zbva,
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mhp->attr.va_fbo,
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mhp->attr.len,
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shift - 12,
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mhp->attr.pbl_size, mhp->attr.pbl_addr))
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return (-ENOMEM);
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ret = iwch_finish_mem_reg(mhp, stag);
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if (ret)
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cxio_dereg_mem(&rhp->rdev, mhp->attr.stag, mhp->attr.pbl_size,
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mhp->attr.pbl_addr);
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return ret;
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}
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int iwch_reregister_mem(struct iwch_dev *rhp, struct iwch_pd *php,
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struct iwch_mr *mhp,
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int shift,
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int npages)
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{
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u32 stag;
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int ret;
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/* We could support this... */
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if (npages > mhp->attr.pbl_size)
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return (-ENOMEM);
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stag = mhp->attr.stag;
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if (cxio_reregister_phys_mem(&rhp->rdev,
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&stag, mhp->attr.pdid,
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mhp->attr.perms,
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mhp->attr.zbva,
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mhp->attr.va_fbo,
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mhp->attr.len,
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shift - 12,
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mhp->attr.pbl_size, mhp->attr.pbl_addr))
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return (-ENOMEM);
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ret = iwch_finish_mem_reg(mhp, stag);
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if (ret)
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cxio_dereg_mem(&rhp->rdev, mhp->attr.stag, mhp->attr.pbl_size,
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mhp->attr.pbl_addr);
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return ret;
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}
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int iwch_alloc_pbl(struct iwch_mr *mhp, int npages)
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{
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mhp->attr.pbl_addr = cxio_hal_pblpool_alloc(&mhp->rhp->rdev,
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npages << 3);
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if (!mhp->attr.pbl_addr)
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return -ENOMEM;
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mhp->attr.pbl_size = npages;
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return 0;
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}
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void iwch_free_pbl(struct iwch_mr *mhp)
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{
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cxio_hal_pblpool_free(&mhp->rhp->rdev, mhp->attr.pbl_addr,
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mhp->attr.pbl_size << 3);
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}
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int iwch_write_pbl(struct iwch_mr *mhp, __be64 *pages, int npages, int offset)
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{
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return cxio_write_pbl(&mhp->rhp->rdev, pages,
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mhp->attr.pbl_addr + (offset << 3), npages);
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}
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int build_phys_page_list(struct ib_phys_buf *buffer_list,
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int num_phys_buf,
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u64 *iova_start,
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u64 *total_size,
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int *npages,
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int *shift,
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__be64 **page_list)
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{
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u64 mask;
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int i, j, n;
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mask = 0;
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*total_size = 0;
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for (i = 0; i < num_phys_buf; ++i) {
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if (i != 0 && buffer_list[i].addr & ~PAGE_MASK)
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return (-EINVAL);
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if (i != 0 && i != num_phys_buf - 1 &&
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(buffer_list[i].size & ~PAGE_MASK))
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return (-EINVAL);
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*total_size += buffer_list[i].size;
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if (i > 0)
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mask |= buffer_list[i].addr;
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else
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mask |= buffer_list[i].addr & PAGE_MASK;
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if (i != num_phys_buf - 1)
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mask |= buffer_list[i].addr + buffer_list[i].size;
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else
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mask |= (buffer_list[i].addr + buffer_list[i].size +
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PAGE_SIZE - 1) & PAGE_MASK;
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}
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if (*total_size > 0xFFFFFFFFULL)
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return (-ENOMEM);
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/* Find largest page shift we can use to cover buffers */
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for (*shift = PAGE_SHIFT; *shift < 27; ++(*shift))
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if ((1ULL << *shift) & mask)
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break;
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buffer_list[0].size += buffer_list[0].addr & ((1ULL << *shift) - 1);
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buffer_list[0].addr &= ~0ull << *shift;
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*npages = 0;
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for (i = 0; i < num_phys_buf; ++i)
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*npages += (buffer_list[i].size +
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(1ULL << *shift) - 1) >> *shift;
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if (!*npages)
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return (-EINVAL);
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*page_list = kmalloc(sizeof(u64) * *npages, M_NOWAIT);
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if (!*page_list)
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return (-ENOMEM);
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n = 0;
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for (i = 0; i < num_phys_buf; ++i)
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for (j = 0;
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j < (buffer_list[i].size + (1ULL << *shift) - 1) >> *shift;
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++j)
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(*page_list)[n++] = htobe64(buffer_list[i].addr +
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((u64) j << *shift));
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CTR6(KTR_IW_CXGB, "%s va 0x%llx mask 0x%llx shift %d len %lld pbl_size %d",
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__FUNCTION__, (unsigned long long) *iova_start,
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(unsigned long long) mask, *shift, (unsigned long long) *total_size,
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*npages);
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return 0;
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}
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#endif
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