3154bc4680
These SoCs have CHIPID registers, which store the Chip model, according to the manufacturer; make use of those in order to better identify the chip we're actually running on. If we're unable to read the CHIPID registers for some reason we will use the string "unknown " as a value for hw.model. Reported by: yamori813@yahoo.co.jp Sponsored by: Smartcom - Bulgaria AD
303 lines
7.9 KiB
C
303 lines
7.9 KiB
C
/*-
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* Copyright (C) 2015-2016 by Stanislav Galabov. All rights reserved.
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* Copyright (C) 2010-2011 by Aleksandr Rybalko. All rights reserved.
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* Copyright (C) 2007 by Oleksandr Tymoshenko. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR HIS RELATIVES BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF MIND, USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
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* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include "opt_ddb.h"
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#include <sys/param.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/imgact.h>
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#include <sys/bio.h>
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#include <sys/buf.h>
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#include <sys/bus.h>
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#include <sys/cpu.h>
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#include <sys/cons.h>
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#include <sys/exec.h>
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#include <sys/ucontext.h>
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#include <sys/proc.h>
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#include <sys/kdb.h>
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#include <sys/ptrace.h>
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#include <sys/boot.h>
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#include <sys/reboot.h>
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#include <sys/signalvar.h>
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#include <sys/sysent.h>
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#include <sys/sysproto.h>
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#include <sys/user.h>
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#include <vm/vm.h>
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#include <vm/vm_object.h>
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#include <vm/vm_page.h>
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#include <machine/cache.h>
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#include <machine/clock.h>
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#include <machine/cpu.h>
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#include <machine/cpuinfo.h>
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#include <machine/cpufunc.h>
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#include <machine/cpuregs.h>
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#include <machine/hwfunc.h>
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#include <machine/intr_machdep.h>
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#include <machine/locore.h>
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#include <machine/md_var.h>
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#include <machine/pte.h>
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#include <machine/sigframe.h>
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#include <machine/trap.h>
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#include <machine/vmparam.h>
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#include <mips/mediatek/mtk_sysctl.h>
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#include <mips/mediatek/mtk_soc.h>
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#include "opt_platform.h"
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#include "opt_rt305x.h"
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#include <dev/fdt/fdt_common.h>
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#include <dev/ofw/openfirm.h>
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extern int *edata;
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extern int *end;
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static char boot1_env[0x1000];
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void
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platform_cpu_init()
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{
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/* Nothing special */
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}
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static void
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mips_init(void)
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{
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struct mem_region mr[FDT_MEM_REGIONS];
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uint64_t val;
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int i, j, mr_cnt;
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char *memsize;
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printf("entry: mips_init()\n");
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bootverbose = 1;
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for (i = 0; i < 10; i++)
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phys_avail[i] = 0;
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dump_avail[0] = phys_avail[0] = MIPS_KSEG0_TO_PHYS(kernel_kseg0_end);
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/*
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* The most low memory MT7621 can have. Currently MT7621 is the chip
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* that supports the most memory, so that seems reasonable.
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*/
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realmem = btoc(448 * 1024 * 1024);
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if (fdt_get_mem_regions(mr, &mr_cnt, &val) == 0) {
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physmem = btoc(val);
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printf("RAM size: %ldMB (from FDT)\n",
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ctob(physmem) / (1024 * 1024));
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KASSERT((phys_avail[0] >= mr[0].mr_start) && \
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(phys_avail[0] < (mr[0].mr_start + mr[0].mr_size)),
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("First region is not within FDT memory range"));
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/* Limit size of the first region */
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phys_avail[1] = (mr[0].mr_start +
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MIN(mr[0].mr_size, ctob(realmem)));
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dump_avail[1] = phys_avail[1];
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/* Add the rest of the regions */
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for (i = 1, j = 2; i < mr_cnt; i++, j+=2) {
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phys_avail[j] = mr[i].mr_start;
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phys_avail[j+1] = (mr[i].mr_start + mr[i].mr_size);
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dump_avail[j] = phys_avail[j];
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dump_avail[j+1] = phys_avail[j+1];
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}
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} else {
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if ((memsize = kern_getenv("memsize")) != NULL) {
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physmem = btoc(strtol(memsize, NULL, 0) << 20);
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printf("RAM size: %ldMB (from memsize)\n",
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ctob(physmem) / (1024 * 1024));
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} else { /* All else failed, assume 32MB */
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physmem = btoc(32 * 1024 * 1024);
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printf("RAM size: %ldMB (assumed)\n",
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ctob(physmem) / (1024 * 1024));
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}
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if (mtk_soc_get_socid() == MTK_SOC_RT2880) {
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/* RT2880 memory start is 88000000 */
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dump_avail[1] = phys_avail[1] = ctob(physmem)
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+ 0x08000000;
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} else if (ctob(physmem) < (448 * 1024 * 1024)) {
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/*
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* Anything up to 448MB is assumed to be directly
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* mappable as low memory...
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*/
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dump_avail[1] = phys_avail[1] = ctob(physmem);
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} else if (mtk_soc_get_socid() == MTK_SOC_MT7621) {
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/*
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* On MT7621 the low memory is limited to 448MB, the
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* rest is high memory, mapped at 0x20000000
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*/
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phys_avail[1] = 448 * 1024 * 1024;
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phys_avail[2] = 0x20000000;
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phys_avail[3] = phys_avail[2] + ctob(physmem) -
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phys_avail[1];
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dump_avail[1] = phys_avail[1] - phys_avail[0];
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dump_avail[2] = phys_avail[2];
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dump_avail[3] = phys_avail[3] - phys_avail[2];
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} else {
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/*
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* We have > 448MB RAM and we're not MT7621? Currently
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* there is no such chip, so we'll just limit the RAM to
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* 32MB and let the user know...
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*/
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printf("Unknown chip, assuming 32MB RAM\n");
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physmem = btoc(32 * 1024 * 1024);
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dump_avail[1] = phys_avail[1] = ctob(physmem);
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}
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}
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if (physmem < realmem)
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realmem = physmem;
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init_param1();
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init_param2(physmem);
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mips_cpu_init();
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pmap_bootstrap();
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mips_proc0_init();
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mutex_init();
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kdb_init();
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#ifdef KDB
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if (boothowto & RB_KDB)
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kdb_enter(KDB_WHY_BOOTFLAGS, "Boot flags requested debugger");
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#endif
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}
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void
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platform_reset(void)
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{
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mtk_soc_reset();
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}
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void
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platform_start(__register_t a0 __unused, __register_t a1 __unused,
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__register_t a2 __unused, __register_t a3 __unused)
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{
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vm_offset_t kernend;
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int argc = a0, i;//, res;
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uint32_t timer_clk;
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char **argv = (char **)MIPS_PHYS_TO_KSEG0(a1);
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char **envp = (char **)MIPS_PHYS_TO_KSEG0(a2);
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void *dtbp;
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phandle_t chosen;
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char buf[2048];
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/* clear the BSS and SBSS segments */
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kernend = (vm_offset_t)&end;
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memset(&edata, 0, kernend - (vm_offset_t)(&edata));
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mips_postboot_fixup();
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/* Initialize pcpu stuff */
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mips_pcpu0_init();
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dtbp = &fdt_static_dtb;
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if (OF_install(OFW_FDT, 0) == FALSE)
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while (1);
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if (OF_init((void *)dtbp) != 0)
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while (1);
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mtk_soc_try_early_detect();
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mtk_soc_set_cpu_model();
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if ((timer_clk = mtk_soc_get_timerclk()) == 0)
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timer_clk = 1000000000; /* no such speed yet */
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mips_timer_early_init(timer_clk);
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/* initialize console so that we have printf */
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boothowto |= (RB_SERIAL | RB_MULTIPLE); /* Use multiple consoles */
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boothowto |= (RB_VERBOSE);
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cninit();
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init_static_kenv(boot1_env, sizeof(boot1_env));
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/*
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* Get bsdbootargs from FDT if specified.
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*/
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chosen = OF_finddevice("/chosen");
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if (OF_getprop(chosen, "bsdbootargs", buf, sizeof(buf)) != -1)
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boothowto |= boot_parse_cmdline(buf);
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printf("FDT DTB at: 0x%08x\n", (uint32_t)dtbp);
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printf("CPU clock: %4dMHz\n", mtk_soc_get_cpuclk()/(1000*1000));
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printf("Timer clock: %4dMHz\n", timer_clk/(1000*1000));
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printf("UART clock: %4dMHz\n\n", mtk_soc_get_uartclk()/(1000*1000));
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printf("U-Boot args (from %d args):\n", argc - 1);
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if (argc == 1)
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printf("\tNone\n");
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for (i = 1; i < argc; i++) {
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char *n = "argv ", *arg;
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if (i > 99)
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break;
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if (argv[i])
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{
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arg = (char *)(intptr_t)MIPS_PHYS_TO_KSEG0(argv[i]);
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printf("\targv[%d] = %s\n", i, arg);
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sprintf(n, "argv%d", i);
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kern_setenv(n, arg);
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}
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}
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printf("Environment:\n");
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for (i = 0; envp[i] && MIPS_IS_VALID_PTR(envp[i]); i++) {
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char *n, *arg;
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arg = (char *)(intptr_t)MIPS_PHYS_TO_KSEG0(envp[i]);
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if (! MIPS_IS_VALID_PTR(arg))
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continue;
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printf("\t%s\n", arg);
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n = strsep(&arg, "=");
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if (arg == NULL)
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kern_setenv(n, "1");
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else
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kern_setenv(n, arg);
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}
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mips_init();
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mips_timer_init_params(timer_clk, 0);
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}
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