freebsd-skq/sys/mips/cavium
Andrew Turner 405ada37fb Add support for the uart classes to set their default register shift value.
This is needed with the pl011 driver. Before this change it would default
to a shift of 0, however the hardware places the registers at 4-byte
addresses meaning the value should be 2.

This patch fixes this for the pl011 when configured using the fdt. The
other drivers have a default value of 0 to keep this a no-op.

MFC after:	1 week
2015-04-11 17:16:23 +00:00
..
cryptocteon
octe Mechanically convert to if_inc_counter(). 2014-09-19 09:19:49 +00:00
usb Add 64-bit DMA support in the XHCI controller driver. 2015-01-05 20:22:18 +00:00
asm_octeon.S
ciu.c Migrate ie->ie_assign_cpu and associated code to use an int for CPU rather 2014-09-17 17:33:22 +00:00
cvmx_config.h
files.octeon1
if_octm.c Mechanically convert to if_inc_counter(). 2014-09-19 09:19:49 +00:00
obio.c
obiovar.h
octeon_cop2.h
octeon_cop2.S
octeon_ds1337.c Fix RTC clock writes on many Octeon boards. 2014-09-14 00:02:40 +00:00
octeon_ebt3000_cf.c
octeon_gpio.c Implement GPIO_GET_BUS() method for all GPIO drivers. 2015-01-31 19:32:14 +00:00
octeon_gpiovar.h Implement GPIO_GET_BUS() method for all GPIO drivers. 2015-01-31 19:32:14 +00:00
octeon_irq.h
octeon_machdep.c
octeon_mp.c
octeon_nmi.S
octeon_pci_console.c
octeon_pcmap_regs.h
octeon_pmc.c
octeon_rnd.c
octeon_rtc.c
octeon_wdog.c
octopci_bus_space.c Update NetBSD Foundation copyrights to 2-clause BSD 2014-03-18 01:40:25 +00:00
octopci.c
octopcireg.h
octopcivar.h
std.octeon1
uart_bus_octeonusart.c
uart_cpu_octeonusart.c
uart_dev_oct16550.c Add support for the uart classes to set their default register shift value. 2015-04-11 17:16:23 +00:00