45d317e32a
I'm in the process of reworking how the reset path works with an eye to better recovery when the chips hang and/or go RF/PHY deaf. This is the first step in a lot of unification and API changes. |
||
---|---|---|
.. | ||
acpica | ||
ath/ath_hal/ar9300 | ||
drm2/radeonkmsfw | ||
ipw | ||
iwi | ||
iwm | ||
iwn | ||
liquidio | ||
mwl | ||
npe | ||
nvidia | ||
otus | ||
ral | ||
rsu | ||
rtwn | ||
run | ||
uath | ||
wpi |