gallatin fe55c5e105 fix isa DMA on pyxis based machines: ...

- move the call to cia_init_sgmap() to after we've determined if we're a pyxis
- convert needed splhigh() in cia_sgmap_invalidate_pyxis() to disable_intr()

Previously, any isa DMA on a pyxis based machine would cause a panic
in cia_sgmap_invalidate_pyxis() because the pyxis workaround was never
setup.

- while i'm at it, convert needed splhigh() in cia_swiz_set_hae_mem to
disable_intr()

2000-11-21 03:25:31 +00:00

..

alphapci_if.m

* Completely rewrite the alpha busspace to hide the implementation from

2000-08-28 21:48:13 +00:00

apecs_pci.c

Introduce explicit break statements in the various chipsets'

2000-08-31 16:19:27 +00:00

apecs.c

Pass in the new-bus flags to alpha_setup_intr().

2000-11-01 18:40:42 +00:00

apecsreg.h

Add $FreeBSD$

2000-05-01 20:32:07 +00:00

apecsvar.h

* Completely rewrite the alpha busspace to hide the implementation from

2000-08-28 21:48:13 +00:00

bwx.c

* Completely rewrite the alpha busspace to hide the implementation from

2000-08-28 21:48:13 +00:00

cia_pci.c

A quick fix to get around a problem (described below) with cia based

2000-09-02 01:05:37 +00:00

cia.c

fix isa DMA on pyxis based machines:

2000-11-21 03:25:31 +00:00

ciareg.h

$Id$ -> $FreeBSD$

1999-08-28 01:08:13 +00:00

ciavar.h

$Id$ -> $FreeBSD$

1999-08-28 01:08:13 +00:00

irongate_pci.c

Introduce explicit break statements in the various chipsets'

2000-08-31 16:19:27 +00:00

irongate.c

fix a typo introduced by Doug's busspace changes that causes UP1000s to

2000-08-31 16:11:20 +00:00

irongatereg.h

Add support for the Alpha Processor, Inc. UP1000 system.

2000-06-19 21:15:45 +00:00

irongatevar.h

Add support for the Alpha Processor, Inc. UP1000 system.

2000-06-19 21:15:45 +00:00

lca_pci.c

Introduce explicit break statements in the various chipsets'

2000-08-31 16:19:27 +00:00

lca.c

* Completely rewrite the alpha busspace to hide the implementation from

2000-08-28 21:48:13 +00:00

lcareg.h

Add $FreeBSD$

2000-05-01 20:32:07 +00:00

lcavar.h

* Completely rewrite the alpha busspace to hide the implementation from

2000-08-28 21:48:13 +00:00

pci_eb64plus_intr.s

Add $FreeBSD$

2000-05-01 20:32:07 +00:00

pci_eb164_intr.s

Fix typo in END macro (END'ed enable twice)

2000-11-09 17:01:21 +00:00

pcibus.c

- Heavyweight interrupt threads on the alpha for device I/O interrupts.

2000-10-05 23:09:57 +00:00

pcibus.h

* Completely rewrite the alpha busspace to hide the implementation from

2000-08-28 21:48:13 +00:00

swiz.c

* Completely rewrite the alpha busspace to hide the implementation from

2000-08-28 21:48:13 +00:00

t2_pci.c

Introduce explicit break statements in the various chipsets'

2000-08-31 16:19:27 +00:00

t2.c

Pass in the new-bus flags to alpha_setup_intr().

2000-11-01 18:40:42 +00:00

t2reg.h

Add AlphaServer 2000 (demi-sable), 2100 (sable), and 2100A (lynx) support.

2000-05-28 02:52:54 +00:00

t2var.h

* Completely rewrite the alpha busspace to hide the implementation from

2000-08-28 21:48:13 +00:00

tsunami_pci.c

Introduce explicit break statements in the various chipsets'

2000-08-31 16:19:27 +00:00

tsunami.c

Pass in the new-bus flags to alpha_setup_intr().

2000-11-01 18:40:42 +00:00

tsunamireg.h

$Id$ -> $FreeBSD$

1999-08-28 01:08:13 +00:00

tsunamivar.h

allow pci_ioctl to work with multi-hose alphas.

1999-10-12 22:10:53 +00:00