ae526637c4
Revert r338177, r338176, r338175, r338174, r338172 After long consultations with re@, core members and mmacy, revert these changes. Followup changes will be made to mark them as deprecated and prent a message about where to find the up-to-date driver. Followup commits will be made to make this clear in the installer. Followup commits to reduce POLA in ways we're still exploring. It's anticipated that after the freeze, this will be removed in 13-current (with the residual of the drm2 code copied to sys/arm/dev/drm2 for the TEGRA port's use w/o the intel or radeon drivers). Due to the impending freeze, there was no formal core vote for this. I've been talking to different core members all day, as well as Matt Macey and Glen Barber. Nobody is completely happy, all are grudgingly going along with this. Work is in progress to mitigate the negative effects as much as possible. Requested by: re@ (gjb, rgrimes)
94 lines
3.4 KiB
C
94 lines
3.4 KiB
C
/**************************************************************************
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*
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* Copyright (c) 2006-2009 VMware, Inc., Palo Alto, CA., USA
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* All Rights Reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the
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* "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish,
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* distribute, sub license, and/or sell copies of the Software, and to
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* permit persons to whom the Software is furnished to do so, subject to
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* the following conditions:
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*
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* The above copyright notice and this permission notice (including the
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* next paragraph) shall be included in all copies or substantial portions
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* of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
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* DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
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* OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
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* USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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**************************************************************************/
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/*
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* Authors: Thomas Hellstrom <thellstrom-at-vmware-dot-com>
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*/
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/* $FreeBSD$ */
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#ifndef _TTM_PLACEMENT_H_
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#define _TTM_PLACEMENT_H_
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/*
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* Memory regions for data placement.
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*/
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#define TTM_PL_SYSTEM 0
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#define TTM_PL_TT 1
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#define TTM_PL_VRAM 2
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#define TTM_PL_PRIV0 3
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#define TTM_PL_PRIV1 4
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#define TTM_PL_PRIV2 5
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#define TTM_PL_PRIV3 6
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#define TTM_PL_PRIV4 7
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#define TTM_PL_PRIV5 8
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#define TTM_PL_SWAPPED 15
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#define TTM_PL_FLAG_SYSTEM (1 << TTM_PL_SYSTEM)
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#define TTM_PL_FLAG_TT (1 << TTM_PL_TT)
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#define TTM_PL_FLAG_VRAM (1 << TTM_PL_VRAM)
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#define TTM_PL_FLAG_PRIV0 (1 << TTM_PL_PRIV0)
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#define TTM_PL_FLAG_PRIV1 (1 << TTM_PL_PRIV1)
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#define TTM_PL_FLAG_PRIV2 (1 << TTM_PL_PRIV2)
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#define TTM_PL_FLAG_PRIV3 (1 << TTM_PL_PRIV3)
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#define TTM_PL_FLAG_PRIV4 (1 << TTM_PL_PRIV4)
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#define TTM_PL_FLAG_PRIV5 (1 << TTM_PL_PRIV5)
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#define TTM_PL_FLAG_SWAPPED (1 << TTM_PL_SWAPPED)
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#define TTM_PL_MASK_MEM 0x0000FFFF
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/*
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* Other flags that affects data placement.
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* TTM_PL_FLAG_CACHED indicates cache-coherent mappings
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* if available.
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* TTM_PL_FLAG_SHARED means that another application may
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* reference the buffer.
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* TTM_PL_FLAG_NO_EVICT means that the buffer may never
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* be evicted to make room for other buffers.
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*/
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#define TTM_PL_FLAG_CACHED (1 << 16)
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#define TTM_PL_FLAG_UNCACHED (1 << 17)
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#define TTM_PL_FLAG_WC (1 << 18)
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#define TTM_PL_FLAG_SHARED (1 << 20)
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#define TTM_PL_FLAG_NO_EVICT (1 << 21)
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#define TTM_PL_MASK_CACHING (TTM_PL_FLAG_CACHED | \
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TTM_PL_FLAG_UNCACHED | \
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TTM_PL_FLAG_WC)
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#define TTM_PL_MASK_MEMTYPE (TTM_PL_MASK_MEM | TTM_PL_MASK_CACHING)
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/*
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* Access flags to be used for CPU- and GPU- mappings.
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* The idea is that the TTM synchronization mechanism will
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* allow concurrent READ access and exclusive write access.
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* Currently GPU- and CPU accesses are exclusive.
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*/
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#define TTM_ACCESS_READ (1 << 0)
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#define TTM_ACCESS_WRITE (1 << 1)
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#endif
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