4d495abb9d
Add two new arguments to bus_dma_tag_create(): lockfunc and lockfuncarg. Lockfunc allows a driver to provide a function for managing its locking semantics while using busdma. At the moment, this is used for the asynchronous busdma_swi and callback mechanism. Two lockfunc implementations are provided: busdma_lock_mutex() performs standard mutex operations on the mutex that is specified from lockfuncarg. dftl_lock() is a panic implementation and is defaulted to when NULL, NULL are passed to bus_dma_tag_create(). The only time that NULL, NULL should ever be used is when the driver ensures that bus_dmamap_load() will not be deferred. Drivers that do not provide their own locking can pass busdma_lock_mutex,&Giant args in order to preserve the former behaviour. sparc64 and powerpc do not provide real busdma_swi functions, so this is largely a noop on those platforms. The busdma_swi on is64 is not properly locked yet, so warnings will be emitted on this platform when busdma callback deferrals happen. If anyone gets panics or warnings from dflt_lock() being called, please let me know right away. Reviewed by: tmm, gibbs
538 lines
13 KiB
C
538 lines
13 KiB
C
/*-
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* Copyright (c) 1999,2000 Jonathan Lemon
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* All rights reserved.
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*
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# Derived from the original IDA Compaq RAID driver, which is
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* Copyright (c) 1996, 1997, 1998, 1999
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* Mark Dawson and David James. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/*
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* Generic driver for Compaq SMART RAID adapters.
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*
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* Specific probe routines are in:
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* pci/ida_pci.c
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* i386/eisa/ida_eisa.c
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*/
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#include <sys/param.h>
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#include <sys/kernel.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/bio.h>
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#include <sys/bus.h>
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#include <sys/conf.h>
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#include <machine/bus_memio.h>
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#include <machine/bus_pio.h>
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#include <machine/bus.h>
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#include <sys/rman.h>
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#include <geom/geom_disk.h>
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#include <dev/ida/idareg.h>
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#include <dev/ida/idavar.h>
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/* prototypes */
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static void ida_alloc_qcb(struct ida_softc *ida);
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static void ida_construct_qcb(struct ida_softc *ida);
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static void ida_start(struct ida_softc *ida);
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static void ida_done(struct ida_softc *ida, struct ida_qcb *qcb);
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static int ida_wait(struct ida_softc *ida, struct ida_qcb *qcb);
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void
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ida_free(struct ida_softc *ida)
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{
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int i;
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for (i = 0; i < ida->num_qcbs; i++)
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bus_dmamap_destroy(ida->buffer_dmat, ida->qcbs[i].dmamap);
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if (ida->hwqcb_busaddr)
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bus_dmamap_unload(ida->hwqcb_dmat, ida->hwqcb_dmamap);
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if (ida->hwqcbs)
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bus_dmamem_free(ida->hwqcb_dmat, ida->hwqcbs,
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ida->hwqcb_dmamap);
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if (ida->buffer_dmat)
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bus_dma_tag_destroy(ida->buffer_dmat);
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if (ida->hwqcb_dmat)
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bus_dma_tag_destroy(ida->hwqcb_dmat);
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if (ida->qcbs != NULL)
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free(ida->qcbs, M_DEVBUF);
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if (ida->ih != NULL)
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bus_teardown_intr(ida->dev, ida->irq, ida->ih);
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if (ida->irq != NULL)
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bus_release_resource(ida->dev, ida->irq_res_type,
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0, ida->irq);
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if (ida->parent_dmat != NULL)
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bus_dma_tag_destroy(ida->parent_dmat);
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if (ida->regs != NULL)
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bus_release_resource(ida->dev, ida->regs_res_type,
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ida->regs_res_id, ida->regs);
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}
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/*
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* record bus address from bus_dmamap_load
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*/
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static void
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ida_dma_map_cb(void *arg, bus_dma_segment_t *segs, int nseg, int error)
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{
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bus_addr_t *baddr;
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baddr = (bus_addr_t *)arg;
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*baddr = segs->ds_addr;
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}
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static __inline struct ida_qcb *
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ida_get_qcb(struct ida_softc *ida)
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{
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struct ida_qcb *qcb;
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if ((qcb = SLIST_FIRST(&ida->free_qcbs)) != NULL) {
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SLIST_REMOVE_HEAD(&ida->free_qcbs, link.sle);
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} else {
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ida_alloc_qcb(ida);
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if ((qcb = SLIST_FIRST(&ida->free_qcbs)) != NULL)
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SLIST_REMOVE_HEAD(&ida->free_qcbs, link.sle);
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}
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return (qcb);
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}
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static __inline bus_addr_t
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idahwqcbvtop(struct ida_softc *ida, struct ida_hardware_qcb *hwqcb)
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{
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return (ida->hwqcb_busaddr +
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((bus_addr_t)hwqcb - (bus_addr_t)ida->hwqcbs));
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}
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static __inline struct ida_qcb *
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idahwqcbptov(struct ida_softc *ida, bus_addr_t hwqcb_addr)
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{
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struct ida_hardware_qcb *hwqcb;
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hwqcb = (struct ida_hardware_qcb *)
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((bus_addr_t)ida->hwqcbs + (hwqcb_addr - ida->hwqcb_busaddr));
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return (hwqcb->qcb);
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}
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/*
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* XXX
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* since we allocate all QCB space up front during initialization, then
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* why bother with this routine?
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*/
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static void
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ida_alloc_qcb(struct ida_softc *ida)
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{
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struct ida_qcb *qcb;
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int error;
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if (ida->num_qcbs >= IDA_QCB_MAX)
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return;
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qcb = &ida->qcbs[ida->num_qcbs];
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error = bus_dmamap_create(ida->buffer_dmat, /*flags*/0, &qcb->dmamap);
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if (error != 0)
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return;
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qcb->flags = QCB_FREE;
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qcb->hwqcb = &ida->hwqcbs[ida->num_qcbs];
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qcb->hwqcb->qcb = qcb;
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qcb->hwqcb_busaddr = idahwqcbvtop(ida, qcb->hwqcb);
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SLIST_INSERT_HEAD(&ida->free_qcbs, qcb, link.sle);
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ida->num_qcbs++;
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}
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int
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ida_init(struct ida_softc *ida)
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{
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int error;
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ida->unit = device_get_unit(ida->dev);
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ida->tag = rman_get_bustag(ida->regs);
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ida->bsh = rman_get_bushandle(ida->regs);
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SLIST_INIT(&ida->free_qcbs);
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STAILQ_INIT(&ida->qcb_queue);
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bioq_init(&ida->bio_queue);
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ida->qcbs = (struct ida_qcb *)
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malloc(IDA_QCB_MAX * sizeof(struct ida_qcb), M_DEVBUF,
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M_NOWAIT | M_ZERO);
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if (ida->qcbs == NULL)
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return (ENOMEM);
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/*
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* Create our DMA tags
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*/
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/* DMA tag for our hardware QCB structures */
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error = bus_dma_tag_create(ida->parent_dmat,
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/*alignment*/1, /*boundary*/0,
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/*lowaddr*/BUS_SPACE_MAXADDR, /*highaddr*/BUS_SPACE_MAXADDR,
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/*filter*/NULL, /*filterarg*/NULL,
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IDA_QCB_MAX * sizeof(struct ida_hardware_qcb),
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/*nsegments*/1, /*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT,
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/*flags*/0, /*lockfunc*/busdma_lock_mutex, /*lockarg*/&Giant,
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&ida->hwqcb_dmat);
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if (error)
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return (ENOMEM);
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/* DMA tag for mapping buffers into device space */
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error = bus_dma_tag_create(ida->parent_dmat,
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/*alignment*/1, /*boundary*/0,
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/*lowaddr*/BUS_SPACE_MAXADDR, /*highaddr*/BUS_SPACE_MAXADDR,
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/*filter*/NULL, /*filterarg*/NULL,
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/*maxsize*/MAXBSIZE, /*nsegments*/IDA_NSEG,
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/*maxsegsz*/BUS_SPACE_MAXSIZE_32BIT, /*flags*/0,
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/*lockfunc*/busdma_lock_mutex, /*lockarg*/&Giant, &ida->buffer_dmat);
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if (error)
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return (ENOMEM);
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/* Allocation of hardware QCBs */
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/* XXX allocation is rounded to hardware page size */
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error = bus_dmamem_alloc(ida->hwqcb_dmat,
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(void **)&ida->hwqcbs, BUS_DMA_NOWAIT, &ida->hwqcb_dmamap);
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if (error)
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return (ENOMEM);
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/* And permanently map them in */
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bus_dmamap_load(ida->hwqcb_dmat, ida->hwqcb_dmamap,
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ida->hwqcbs, IDA_QCB_MAX * sizeof(struct ida_hardware_qcb),
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ida_dma_map_cb, &ida->hwqcb_busaddr, /*flags*/0);
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bzero(ida->hwqcbs, IDA_QCB_MAX * sizeof(struct ida_hardware_qcb));
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ida_alloc_qcb(ida); /* allocate an initial qcb */
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return (0);
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}
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void
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ida_attach(struct ida_softc *ida)
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{
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struct ida_controller_info cinfo;
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int error, i;
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ida->cmd.int_enable(ida, 0);
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error = ida_command(ida, CMD_GET_CTRL_INFO, &cinfo, sizeof(cinfo),
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IDA_CONTROLLER, 0, DMA_DATA_IN);
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if (error) {
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device_printf(ida->dev, "CMD_GET_CTRL_INFO failed.\n");
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return;
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}
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device_printf(ida->dev, "drives=%d firm_rev=%c%c%c%c\n",
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cinfo.num_drvs, cinfo.firm_rev[0], cinfo.firm_rev[1],
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cinfo.firm_rev[2], cinfo.firm_rev[3]);
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if (ida->flags & IDA_FIRMWARE) {
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int data;
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error = ida_command(ida, CMD_START_FIRMWARE,
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&data, sizeof(data), IDA_CONTROLLER, 0, DMA_DATA_IN);
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if (error) {
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device_printf(ida->dev, "CMD_START_FIRMWARE failed.\n");
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return;
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}
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}
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ida->num_drives = 0;
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for (i = 0; i < cinfo.num_drvs; i++)
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device_add_child(ida->dev, /*"idad"*/NULL, -1);
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bus_generic_attach(ida->dev);
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ida->cmd.int_enable(ida, 1);
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}
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int
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ida_detach(device_t dev)
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{
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struct ida_softc *ida;
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int error = 0;
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ida = (struct ida_softc *)device_get_softc(dev);
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/*
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* XXX
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* before detaching, we must make sure that the system is
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* quiescent; nothing mounted, no pending activity.
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*/
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/*
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* XXX
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* now, how are we supposed to maintain a list of our drives?
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* iterate over our "child devices"?
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*/
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ida_free(ida);
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return (error);
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}
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static void
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ida_setup_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments, int error)
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{
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struct ida_hardware_qcb *hwqcb = (struct ida_hardware_qcb *)arg;
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int i;
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hwqcb->hdr.size = (sizeof(struct ida_req) +
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sizeof(struct ida_sgb) * IDA_NSEG) >> 2;
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for (i = 0; i < nsegments; i++) {
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hwqcb->seg[i].addr = segs[i].ds_addr;
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hwqcb->seg[i].length = segs[i].ds_len;
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}
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hwqcb->req.sgcount = nsegments;
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}
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int
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ida_command(struct ida_softc *ida, int command, void *data, int datasize,
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int drive, u_int32_t pblkno, int flags)
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{
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struct ida_hardware_qcb *hwqcb;
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struct ida_qcb *qcb;
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bus_dmasync_op_t op;
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int s, error;
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s = splbio();
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qcb = ida_get_qcb(ida);
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splx(s);
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if (qcb == NULL) {
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printf("ida_command: out of QCBs");
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return (EAGAIN);
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}
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hwqcb = qcb->hwqcb;
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bzero(hwqcb, sizeof(struct ida_hdr) + sizeof(struct ida_req));
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bus_dmamap_load(ida->buffer_dmat, qcb->dmamap,
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(void *)data, datasize, ida_setup_dmamap, hwqcb, 0);
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op = qcb->flags & DMA_DATA_IN ?
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BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE;
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bus_dmamap_sync(ida->buffer_dmat, qcb->dmamap, op);
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hwqcb->hdr.drive = drive;
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hwqcb->req.blkno = pblkno;
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hwqcb->req.bcount = howmany(datasize, DEV_BSIZE);
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hwqcb->req.command = command;
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qcb->flags = flags | IDA_COMMAND;
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s = splbio();
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STAILQ_INSERT_TAIL(&ida->qcb_queue, qcb, link.stqe);
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ida_start(ida);
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error = ida_wait(ida, qcb);
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splx(s);
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/* XXX should have status returned here? */
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/* XXX have "status pointer" area in QCB? */
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return (error);
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}
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void
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ida_submit_buf(struct ida_softc *ida, struct bio *bp)
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{
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bioq_insert_tail(&ida->bio_queue, bp);
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ida_construct_qcb(ida);
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ida_start(ida);
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}
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static void
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ida_construct_qcb(struct ida_softc *ida)
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{
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struct ida_hardware_qcb *hwqcb;
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struct ida_qcb *qcb;
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bus_dmasync_op_t op;
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struct bio *bp;
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bp = bioq_first(&ida->bio_queue);
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if (bp == NULL)
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return; /* no more buffers */
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qcb = ida_get_qcb(ida);
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if (qcb == NULL)
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return; /* out of resources */
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bioq_remove(&ida->bio_queue, bp);
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qcb->buf = bp;
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qcb->flags = 0;
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hwqcb = qcb->hwqcb;
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bzero(hwqcb, sizeof(struct ida_hdr) + sizeof(struct ida_req));
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bus_dmamap_load(ida->buffer_dmat, qcb->dmamap,
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(void *)bp->bio_data, bp->bio_bcount, ida_setup_dmamap, hwqcb, 0);
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op = qcb->flags & DMA_DATA_IN ?
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BUS_DMASYNC_PREREAD : BUS_DMASYNC_PREWRITE;
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bus_dmamap_sync(ida->buffer_dmat, qcb->dmamap, op);
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{
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struct idad_softc *drv = (struct idad_softc *)bp->bio_driver1;
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hwqcb->hdr.drive = drv->drive;
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}
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hwqcb->req.blkno = bp->bio_pblkno;
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hwqcb->req.bcount = howmany(bp->bio_bcount, DEV_BSIZE);
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hwqcb->req.command = bp->bio_cmd == BIO_READ ? CMD_READ : CMD_WRITE;
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STAILQ_INSERT_TAIL(&ida->qcb_queue, qcb, link.stqe);
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}
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/*
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* This routine will be called from ida_intr in order to queue up more
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* I/O, meaning that we may be in an interrupt context. Hence, we should
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* not muck around with spl() in this routine.
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*/
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static void
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ida_start(struct ida_softc *ida)
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{
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struct ida_qcb *qcb;
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while ((qcb = STAILQ_FIRST(&ida->qcb_queue)) != NULL) {
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if (ida->cmd.fifo_full(ida))
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break;
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STAILQ_REMOVE_HEAD(&ida->qcb_queue, link.stqe);
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/*
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* XXX
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* place the qcb on an active list and set a timeout?
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*/
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qcb->state = QCB_ACTIVE;
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ida->cmd.submit(ida, qcb);
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}
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}
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static int
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ida_wait(struct ida_softc *ida, struct ida_qcb *qcb)
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{
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struct ida_qcb *qcb_done = NULL;
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bus_addr_t completed;
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int delay;
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if (ida->flags & IDA_INTERRUPTS) {
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if (tsleep(qcb, PRIBIO, "idacmd", 5 * hz))
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return (ETIMEDOUT);
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return (0);
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}
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again:
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delay = 5 * 1000 * 100; /* 5 sec delay */
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while ((completed = ida->cmd.done(ida)) == 0) {
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if (delay-- == 0)
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return (ETIMEDOUT);
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DELAY(10);
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}
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qcb_done = idahwqcbptov(ida, completed & ~3);
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if (qcb_done != qcb)
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goto again;
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ida_done(ida, qcb);
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return (0);
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}
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void
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ida_intr(void *data)
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{
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struct ida_softc *ida;
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struct ida_qcb *qcb;
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bus_addr_t completed;
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ida = (struct ida_softc *)data;
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if (ida->cmd.int_pending(ida) == 0)
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return; /* not our interrupt */
|
|
|
|
while ((completed = ida->cmd.done(ida)) != 0) {
|
|
qcb = idahwqcbptov(ida, completed & ~3);
|
|
|
|
if (qcb == NULL || qcb->state != QCB_ACTIVE) {
|
|
device_printf(ida->dev,
|
|
"ignoring completion %jx\n", (intmax_t)completed);
|
|
continue;
|
|
}
|
|
ida_done(ida, qcb);
|
|
}
|
|
ida_start(ida);
|
|
}
|
|
|
|
/*
|
|
* should switch out command type; may be status, not just I/O.
|
|
*/
|
|
static void
|
|
ida_done(struct ida_softc *ida, struct ida_qcb *qcb)
|
|
{
|
|
int error = 0;
|
|
|
|
/*
|
|
* finish up command
|
|
*/
|
|
if (qcb->flags & DMA_DATA_TRANSFER) {
|
|
bus_dmasync_op_t op;
|
|
|
|
op = qcb->flags & DMA_DATA_IN ?
|
|
BUS_DMASYNC_POSTREAD : BUS_DMASYNC_POSTWRITE;
|
|
bus_dmamap_sync(ida->buffer_dmat, qcb->dmamap, op);
|
|
bus_dmamap_unload(ida->buffer_dmat, qcb->dmamap);
|
|
}
|
|
|
|
if (qcb->hwqcb->req.error & SOFT_ERROR)
|
|
device_printf(ida->dev, "soft error\n");
|
|
if (qcb->hwqcb->req.error & HARD_ERROR) {
|
|
error = 1;
|
|
device_printf(ida->dev, "hard error\n");
|
|
}
|
|
if (qcb->hwqcb->req.error & CMD_REJECTED) {
|
|
error = 1;
|
|
device_printf(ida->dev, "invalid request\n");
|
|
}
|
|
|
|
if (qcb->flags & IDA_COMMAND) {
|
|
if (ida->flags & IDA_INTERRUPTS)
|
|
wakeup(qcb);
|
|
} else {
|
|
if (error)
|
|
qcb->buf->bio_flags |= BIO_ERROR;
|
|
idad_intr(qcb->buf);
|
|
}
|
|
|
|
qcb->state = QCB_FREE;
|
|
SLIST_INSERT_HEAD(&ida->free_qcbs, qcb, link.sle);
|
|
ida_construct_qcb(ida);
|
|
}
|