8ebd91847c
- Support for Texas Instruments SoCs: - AM335x - OMAP4 - Kernel configs, DTS for Beaglebone and Pandaboard Submitted by: Ben Gray, Damjan Marion
92 lines
2.9 KiB
C
92 lines
2.9 KiB
C
/*-
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* Copyright (c) 2010
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* Ben Gray <ben.r.gray@gmail.com>.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY BEN GRAY ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL BEN GRAY BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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#ifndef _OMAP4VAR_H_
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#define _OMAP4VAR_H_
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/time.h>
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#include <sys/bus.h>
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#include <sys/resource.h>
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#include <sys/rman.h>
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#include <sys/sysctl.h>
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#include <sys/endian.h>
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#include <machine/bus.h>
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#include <machine/cpu.h>
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#include <machine/cpufunc.h>
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#include <machine/resource.h>
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#include <machine/intr.h>
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void omap4_mask_all_intr(void);
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void omap4_post_filter_intr(void *arg);
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struct omap4_softc {
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device_t sc_dev;
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bus_space_tag_t sc_iotag;
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/* Handles for the two generic interrupt controller (GIC) register mappings */
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bus_space_handle_t sc_gic_cpu_ioh;
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bus_space_handle_t sc_gic_dist_ioh;
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/* Handle for the PL310 L2 cache controller */
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bus_space_handle_t sc_pl310_ioh;
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/* Handle for the global and provate timer register set in the Cortex core */
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bus_space_handle_t sc_prv_timer_ioh;
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bus_space_handle_t sc_gbl_timer_ioh;
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/* SCM access */
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struct resource *sc_scm_mem;
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int sc_scm_rid;
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};
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struct omap4_intr_conf {
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int num;
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unsigned int priority;
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unsigned int target_cpu;
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};
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int omap4_setup_intr_controller(device_t dev,
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const struct omap4_intr_conf *irqs);
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int omap4_setup_gic_cpu(unsigned int prio_mask);
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void omap4_init_timer(device_t dev);
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int omap4_setup_l2cache_controller(struct omap4_softc *sc);
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void omap4_smc_call(uint32_t fn, uint32_t arg);
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#endif /* _OMAP4VAR_H_ */
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