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Add basic breakpoint support to kdb

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This commit is contained in:
Ali Mashtizadeh 2023-08-21 16:42:29 -04:00
parent 0a11ea3e50
commit 765bde0c82
2 changed files with 92 additions and 0 deletions
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83
sys/amd64/debug.c
View File

@ -160,6 +160,89 @@ Debug_Backtrace(int argc, const char *argv[])
REGISTER_DBGCMD(backtrace, "Print backtrace", Debug_Backtrace);
static void
Debug_SetBreakpoint(int argc, const char *argv[])
{
if (argc != 2) {
kprintf("bkpt [ADDR]");
return;
}
uint64_t addr = Debug_StrToInt(argv[1]);
uint32_t flags = read_dr7();
if (!(flags & DR7_DR0G)) {
write_dr0(addr);
write_dr7(flags | DR7_DR0G);
} else if (!(flags & DR7_DR1G)) {
write_dr1(addr);
write_dr7(flags | DR7_DR1G);
} else if (!(flags & DR7_DR2G)) {
write_dr2(addr);
write_dr7(flags | DR7_DR2G);
} else if (!(flags & DR7_DR3G)) {
write_dr3(addr);
write_dr7(flags | DR7_DR3G);
} else {
kprintf("No more breakpoints left!\n");
}
}
REGISTER_DBGCMD(bkpt, "Set breakpoint", Debug_SetBreakpoint);
static void
Debug_ClearBreakpoint(int argc, const char *argv[])
{
if (argc != 2) {
kprintf("clrbkpt [0-3]");
return;
}
uint32_t flags = read_dr7();
switch (argv[1][0]) {
case '0':
flags &= ~DR7_DR0G;
break;
case '1':
flags &= ~DR7_DR1G;
break;
case '2':
flags &= ~DR7_DR2G;
break;
case '3':
flags &= ~DR7_DR3G;
break;
default:
kprintf("Specify a breakpoint between 0-3\n");
}
write_dr7(flags);
}
REGISTER_DBGCMD(clrbkpt, "Clear breakpoint", Debug_ClearBreakpoint);
static void
Debug_ListBreakpoints(int argc, const char *argv[])
{
uint32_t flags = read_dr7();
if (flags & DR7_DR0G) {
kprintf("DR0: 0x%lx\n", read_dr0());
}
if (flags & DR7_DR1G) {
kprintf("DR1: 0x%lx\n", read_dr1());
}
if (flags & DR7_DR2G) {
kprintf("DR2: 0x%lx\n", read_dr2());
}
if (flags & DR7_DR3G) {
kprintf("DR3: 0x%lx\n", read_dr3());
}
}
REGISTER_DBGCMD(bkpts, "List breakpoint", Debug_ListBreakpoints);
static void
Debug_Reboot(int argc, const char *argv[])
{

9
sys/amd64/include/amd64.h
View File

@ -191,6 +191,15 @@ typedef struct XSAVEArea
* Debug Registers
*/
#define DR7_DR0L 0x00000001
#define DR7_DR0G 0x00000002
#define DR7_DR1L 0x00000004
#define DR7_DR1G 0x00000008
#define DR7_DR2L 0x00000010
#define DR7_DR2G 0x00000020
#define DR7_DR3L 0x00000040
#define DR7_DR3G 0x00000080
/*
* MSRs
*/