Improvements for SMP
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@ -17,6 +17,7 @@ void
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Critical_Init()
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{
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int c;
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for (c = 0; c < MAX_CPUS; c++)
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{
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lockLevel[c] = 0;
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@ -43,7 +44,11 @@ Critical_Exit()
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void
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Debug_Critical(int argc, const char *argv[])
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{
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kprintf("CPU0: %u\n", lockLevel[0]);
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int c;
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for (c = 0; c < MAX_CPUS; c++) {
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kprintf("CPU%d: %u\n", c, lockLevel[c]);
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}
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}
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REGISTER_DBGCMD(critical, "Critical Enter/Exit Stats", Debug_Critical);
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@ -151,8 +151,10 @@ LAPIC_Init()
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Panic("APIC is required!\n");
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// Disable ATPIC
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outb(0xA1, 0xFF);
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outb(0x21, 0xFF);
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if (LAPIC_CPU() == 0) {
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outb(0xA1, 0xFF);
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outb(0x21, 0xFF);
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}
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// Enable LAPIC
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base = rdmsr(IA32_APIC_BASE_MSR);
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@ -187,6 +187,8 @@ void Machine_InitAP()
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Machine_TSSInit();
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//Machine_SyscallInit();
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LAPIC_Init();
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kprintf("AP %d booted!\n", CPU());
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while (1) {}
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@ -10,6 +10,7 @@
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#include <sys/spinlock.h>
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#include <sys/irq.h>
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#include <sys/syscall.h>
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#include <sys/mp.h>
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#include <machine/amd64.h>
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#include <machine/lapic.h>
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@ -91,6 +92,7 @@ Trap_InitAP()
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void
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Trap_Dump(TrapFrame *tf)
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{
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kprintf("CPU %d\n", CPU());
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kprintf("Interrupt %d Error Code: %016llx\n",
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tf->vector, tf->errcode);
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kprintf("cr0: %016llx cr2: %016llx\n",
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