Fix compiler warnings and some refactoring
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@ -1,4 +1,4 @@
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#include <stdbool.h>
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#include <stdint.h>
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#include <kconfig.h>
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@ -8,8 +8,11 @@
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#include "amd64.h"
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#include "ioapic.h"
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#include "lapic.h"
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#include "trap.h"
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#include "pmap.h"
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extern void Trap_Init();
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extern void PCI_Init();
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extern void IDE_Init();
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#define GDT_MAX 7
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@ -59,7 +62,7 @@ void Machine_TSSInit()
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TSS[0]._unused2 = 0;
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TSS[0]._unused3 = 0;
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TSS[0]._unused4 = 0;
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TSS[0].ist1 = &df_stack;
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TSS[0].ist1 = (uint64_t)&df_stack;
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TSS[0].rsp0 = 0;
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TSS[0].rsp1 = 0;
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TSS[0].rsp2 = 0;
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@ -21,9 +21,6 @@ typedef struct AS
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AS systemAS;
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AS *currentAS[MAX_CPUS];
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bool PMap_SystemLMap(uint64_t phys, uint64_t virt, uint64_t lpages, uint64_t flags);
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void PMapDump(AS *space);
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void
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PMap_Init()
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{
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@ -70,7 +67,7 @@ PMap_Init()
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}
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AS*
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Map_NewAS()
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PMap_NewAS()
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{
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int i;
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AS *as = PAlloc_AllocPage();
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@ -252,10 +249,14 @@ PMap_SystemLMap(uint64_t phys, uint64_t virt, uint64_t lpages, uint64_t flags)
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bool
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PMap_SystemMap(uint64_t phys, uint64_t virt, uint64_t pages)
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{
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NOT_IMPLEMENTED();
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return false;
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}
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bool
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PMap_SystemUnmap(uint64_t virt, uint64_t pages)
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{
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NOT_IMPLEMENTED();
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return false;
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}
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@ -2,4 +2,16 @@
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#define MEM_DIRECTMAP_BASE 0x0000000000000000ULL
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#define PPN2DMVA(ppn) (((ppn) << PGSIZE) + MEM_DIRECTMAP_BASE)
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#define DMVA2PPN(dmva) (((dmva) - MEM_DIRECTMAP_BASE) >> PGSIZE)
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#define DMVA2PA(dmva) ((dmva) - MEM_DIRECTMAP_BASE)
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#define DMPA2VA(pa) ((pa) + MEM_DIRECTMAP_BASE)
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//#define VA2PA(va)
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typedef struct AS AS;
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void PMap_Init();
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AS* Map_NewAS();
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void PMap_DestroyAS(AS *space);
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bool PMap_SystemLMap(uint64_t phys, uint64_t virt, uint64_t lpages, uint64_t flags);
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bool PMap_SystemMap(uint64_t phys, uint64_t virt, uint64_t pages);
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bool PMap_SystemUnmap(uint64_t virt, uint64_t pages);
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@ -55,7 +55,7 @@ Trap_Init()
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}
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void
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trap_dump(TrapFrame *tf)
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Trap_Dump(TrapFrame *tf)
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{
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kprintf("Interrupt %d Error Code: %016llx\n",
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tf->vector, tf->errcode);
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@ -89,7 +89,7 @@ trap_entry(TrapFrame *tf)
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// Halt on kernel errors
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if (tf->vector <= T_CPU_LAST && tf->cs == SEL_KCS)
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{
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trap_dump(tf);
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Trap_Dump(tf);
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while (1)
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hlt();
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@ -118,7 +118,7 @@ trap_entry(TrapFrame *tf)
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return;
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}
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trap_dump(tf);
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Trap_Dump(tf);
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while (1) { }
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}
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@ -69,5 +69,8 @@ typedef struct TrapFrame
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uint16_t _unused6;
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} TrapFrame;
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void Trap_Init();
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void Trap_Dump(TrapFrame *tf);
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#endif /* __TRAP_H__ */
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@ -7,33 +7,12 @@
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#include <pci.h>
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#include <sga.h>
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#include "ata.h"
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/*
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* SATA Definitions
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*/
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typedef struct SATAIdentifyDevice
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{
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uint16_t _rsvd0[10]; // 0-9
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uint8_t serial[20]; // 10-19 - Serial
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uint16_t _rsvd1[3]; // 20-22
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uint8_t firmware[8]; // 23-26 - Firmware
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uint8_t model[40]; // 27-46 - Model
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uint16_t _rsvd2[16]; // 47-62 X
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uint16_t dmaMode; // 63 - DMA Mode
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uint16_t _rsvd3[11]; // 64-74 X
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uint16_t queueDepth; // 75 - Queue Depth
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uint16_t sataCap; // 76 - SATA Capabilities
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uint16_t ncqCap; // 77 - NCQ Capabilities
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uint16_t _rsvd4[8]; // 78-85
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uint16_t deviceFlags; // 86 - Device Flags (48-bit Addressing)
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uint16_t deviceFlags2; // 87 - Device Flags 2 (SMART)
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uint16_t udmaMode; // 88 - Ultra DMA Mode
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uint16_t _rsvd5[11]; // 89-99
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uint64_t lbaSectors; // 100-103 - User Addressable Logical Sectors
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uint16_t _rsvd6[151]; // 104-254
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uint16_t chksum; // 255 - Checksum
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} SATAIdentifyDevice;
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typedef struct SATAFIS_REG_H2D {
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uint8_t type; // 0x27
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uint8_t flag;
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@ -252,7 +231,7 @@ AHCI_Init(uint32_t bus, uint32_t slot, uint32_t func)
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ASSERT(sizeof(AHCI) <= PGSIZE);
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ASSERT(sizeof(AHCICommandList) <= PGSIZE);
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ASSERT(sizeof(AHCIRecvFIS) <= PGSIZE);
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ASSERT(sizeof(SATAIdentifyDevice) == 512);
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ASSERT(sizeof(ATAIdentifyDevice) == 512);
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int deviceIdx = 0;
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while (deviceList[deviceIdx].device != 0x0) {
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@ -349,7 +328,7 @@ AHCI_IdentifyPort(AHCI *ahci, int port)
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volatile AHCIPort *p = ahci->port[port];
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SGArray sga;
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SATAFIS_REG_H2D fis;
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SATAIdentifyDevice ident;
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ATAIdentifyDevice ident;
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kprintf("AHCI: Signature %08x\n", p->sig);
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34
sys/dev/ata.h
Normal file
34
sys/dev/ata.h
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@ -0,0 +1,34 @@
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/*
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* ATA Definitions
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*/
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#ifndef __ATA_H__
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#define __ATA_H__
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typedef struct ATAIdentifyDevice
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{
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uint16_t _rsvd0[10]; // 0-9
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uint8_t serial[20]; // 10-19 - Serial
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uint16_t _rsvd1[3]; // 20-22
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uint8_t firmware[8]; // 23-26 - Firmware
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uint8_t model[40]; // 27-46 - Model
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uint16_t _rsvd2[16]; // 47-62 X
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uint16_t dmaMode; // 63 - DMA Mode
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uint16_t _rsvd3[11]; // 64-74 X
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uint16_t queueDepth; // 75 - Queue Depth
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uint16_t sataCap; // 76 - SATA Capabilities
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uint16_t ncqCap; // 77 - NCQ Capabilities
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uint16_t _rsvd4[8]; // 78-85
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uint16_t deviceFlags; // 86 - Device Flags (48-bit Addressing)
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uint16_t deviceFlags2; // 87 - Device Flags 2 (SMART)
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uint16_t udmaMode; // 88 - Ultra DMA Mode
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uint16_t _rsvd5[11]; // 89-99
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uint64_t lbaSectors; // 100-103 - User Addressable Logical Sectors
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uint16_t _rsvd6[2]; // 104-105
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uint16_t sectorSize; // 106 - Physical Sector Size
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uint16_t _rsvd7[148]; // 107-254
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uint16_t chksum; // 255 - Checksum
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} ATAIdentifyDevice;
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#endif /* __ATA_H__ */
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@ -7,35 +7,7 @@
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#include <sga.h>
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#include "ioport.h"
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/*
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* ATA Definitions
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*/
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typedef struct ATAIdentifyDevice
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{
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uint16_t _rsvd0[10]; // 0-9
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uint8_t serial[20]; // 10-19 - Serial
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uint16_t _rsvd1[3]; // 20-22
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uint8_t firmware[8]; // 23-26 - Firmware
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uint8_t model[40]; // 27-46 - Model
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uint16_t _rsvd2[16]; // 47-62 X
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uint16_t dmaMode; // 63 - DMA Mode
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uint16_t _rsvd3[11]; // 64-74 X
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uint16_t queueDepth; // 75 - Queue Depth
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uint16_t sataCap; // 76 - SATA Capabilities
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uint16_t ncqCap; // 77 - NCQ Capabilities
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uint16_t _rsvd4[8]; // 78-85
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uint16_t deviceFlags; // 86 - Device Flags (48-bit Addressing)
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uint16_t deviceFlags2; // 87 - Device Flags 2 (SMART)
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uint16_t udmaMode; // 88 - Ultra DMA Mode
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uint16_t _rsvd5[11]; // 89-99
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uint64_t lbaSectors; // 100-103 - User Addressable Logical Sectors
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uint16_t _rsvd6[2]; // 104-105
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uint16_t sectorSize; // 106 - Physical Sector Size
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uint16_t _rsvd7[148]; // 107-254
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uint16_t chksum; // 255 - Checksum
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} ATAIdentifyDevice;
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#include "../ata.h"
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/*
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* IDE Definitions
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#include <cdefs.h>
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#define ASSERT(x) if (!(x)) { Panic("ASSERT:"); }
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#define NOT_IMPLEMENTED() Panic("NOT_IMPLEMENTED:")
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#define PANIC Panic
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NO_RETURN void Panic(const char *str);
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