2018-09-18 12:45:13 +00:00
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/* SPDX-License-Identifier: BSD-3-Clause
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2019-12-12 18:44:13 +00:00
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* Copyright(c) 2018-2019 Ericsson AB
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2018-09-18 12:45:13 +00:00
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*/
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#include "dsw_evdev.h"
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#include <stdbool.h>
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#include <string.h>
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#include <rte_debug.h>
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/* The high bits in the xstats id is used to store an additional
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* parameter (beyond the queue or port id already in the xstats
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* interface).
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*/
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#define DSW_XSTATS_ID_PARAM_BITS (8)
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#define DSW_XSTATS_ID_STAT_BITS \
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2022-10-13 11:35:01 +00:00
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(sizeof(uint64_t)*CHAR_BIT - DSW_XSTATS_ID_PARAM_BITS)
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#define DSW_XSTATS_ID_STAT_MASK ((UINT64_C(1) << DSW_XSTATS_ID_STAT_BITS) - 1)
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2018-09-18 12:45:13 +00:00
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#define DSW_XSTATS_ID_GET_PARAM(id) \
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((id)>>DSW_XSTATS_ID_STAT_BITS)
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#define DSW_XSTATS_ID_GET_STAT(id) \
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((id) & DSW_XSTATS_ID_STAT_MASK)
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#define DSW_XSTATS_ID_CREATE(id, param_value) \
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2022-10-13 11:35:01 +00:00
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((((uint64_t)param_value) << DSW_XSTATS_ID_STAT_BITS) | id)
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2018-09-18 12:45:13 +00:00
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typedef
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uint64_t (*dsw_xstats_dev_get_value_fn)(struct dsw_evdev *dsw);
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struct dsw_xstat_dev {
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const char *name;
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dsw_xstats_dev_get_value_fn get_value_fn;
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};
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typedef
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uint64_t (*dsw_xstats_port_get_value_fn)(struct dsw_evdev *dsw,
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uint8_t port_id, uint8_t queue_id);
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struct dsw_xstats_port {
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const char *name_fmt;
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dsw_xstats_port_get_value_fn get_value_fn;
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bool per_queue;
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};
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static uint64_t
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dsw_xstats_dev_credits_on_loan(struct dsw_evdev *dsw)
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{
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2021-01-26 16:36:50 +00:00
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return __atomic_load_n(&dsw->credits_on_loan, __ATOMIC_RELAXED);
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2018-09-18 12:45:13 +00:00
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}
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static struct dsw_xstat_dev dsw_dev_xstats[] = {
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{ "dev_credits_on_loan", dsw_xstats_dev_credits_on_loan }
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};
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#define DSW_GEN_PORT_ACCESS_FN(_variable) \
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static uint64_t \
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dsw_xstats_port_get_ ## _variable(struct dsw_evdev *dsw, \
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uint8_t port_id, \
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uint8_t queue_id __rte_unused) \
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{ \
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return dsw->ports[port_id]._variable; \
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}
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DSW_GEN_PORT_ACCESS_FN(new_enqueued)
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DSW_GEN_PORT_ACCESS_FN(forward_enqueued)
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DSW_GEN_PORT_ACCESS_FN(release_enqueued)
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static uint64_t
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dsw_xstats_port_get_queue_enqueued(struct dsw_evdev *dsw, uint8_t port_id,
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uint8_t queue_id)
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{
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return dsw->ports[port_id].queue_enqueued[queue_id];
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}
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DSW_GEN_PORT_ACCESS_FN(dequeued)
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static uint64_t
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dsw_xstats_port_get_queue_dequeued(struct dsw_evdev *dsw, uint8_t port_id,
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uint8_t queue_id)
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{
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return dsw->ports[port_id].queue_dequeued[queue_id];
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}
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2020-04-04 12:45:26 +00:00
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DSW_GEN_PORT_ACCESS_FN(emigrations)
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DSW_GEN_PORT_ACCESS_FN(immigrations)
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2018-09-18 12:45:13 +00:00
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static uint64_t
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dsw_xstats_port_get_migration_latency(struct dsw_evdev *dsw, uint8_t port_id,
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uint8_t queue_id __rte_unused)
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{
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2020-04-04 12:45:26 +00:00
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uint64_t total_latency = dsw->ports[port_id].emigration_latency;
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uint64_t num_emigrations = dsw->ports[port_id].emigrations;
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2018-09-18 12:45:13 +00:00
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2020-04-04 12:45:26 +00:00
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return num_emigrations > 0 ? total_latency / num_emigrations : 0;
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2018-09-18 12:45:13 +00:00
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}
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static uint64_t
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dsw_xstats_port_get_event_proc_latency(struct dsw_evdev *dsw, uint8_t port_id,
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uint8_t queue_id __rte_unused)
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{
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uint64_t total_busy_cycles =
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dsw->ports[port_id].total_busy_cycles;
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uint64_t dequeued =
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dsw->ports[port_id].dequeued;
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return dequeued > 0 ? total_busy_cycles / dequeued : 0;
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}
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2020-03-09 06:51:06 +00:00
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static uint64_t
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dsw_xstats_port_get_busy_cycles(struct dsw_evdev *dsw, uint8_t port_id,
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uint8_t queue_id __rte_unused)
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{
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return dsw->ports[port_id].total_busy_cycles;
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}
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2018-09-18 12:45:13 +00:00
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DSW_GEN_PORT_ACCESS_FN(inflight_credits)
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2020-04-04 12:45:26 +00:00
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DSW_GEN_PORT_ACCESS_FN(pending_releases)
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2018-09-18 12:45:13 +00:00
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static uint64_t
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dsw_xstats_port_get_load(struct dsw_evdev *dsw, uint8_t port_id,
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uint8_t queue_id __rte_unused)
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{
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int16_t load;
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2021-01-26 16:36:50 +00:00
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load = __atomic_load_n(&dsw->ports[port_id].load, __ATOMIC_RELAXED);
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2018-09-18 12:45:13 +00:00
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return DSW_LOAD_TO_PERCENT(load);
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}
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DSW_GEN_PORT_ACCESS_FN(last_bg)
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static struct dsw_xstats_port dsw_port_xstats[] = {
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{ "port_%u_new_enqueued", dsw_xstats_port_get_new_enqueued,
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false },
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{ "port_%u_forward_enqueued", dsw_xstats_port_get_forward_enqueued,
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false },
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{ "port_%u_release_enqueued", dsw_xstats_port_get_release_enqueued,
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false },
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{ "port_%u_queue_%u_enqueued", dsw_xstats_port_get_queue_enqueued,
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true },
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{ "port_%u_dequeued", dsw_xstats_port_get_dequeued,
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false },
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{ "port_%u_queue_%u_dequeued", dsw_xstats_port_get_queue_dequeued,
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true },
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2020-04-04 12:45:26 +00:00
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{ "port_%u_emigrations", dsw_xstats_port_get_emigrations,
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2018-09-18 12:45:13 +00:00
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false },
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{ "port_%u_migration_latency", dsw_xstats_port_get_migration_latency,
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false },
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2020-04-04 12:45:26 +00:00
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{ "port_%u_immigrations", dsw_xstats_port_get_immigrations,
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false },
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2018-09-18 12:45:13 +00:00
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{ "port_%u_event_proc_latency", dsw_xstats_port_get_event_proc_latency,
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false },
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2020-03-09 06:51:06 +00:00
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{ "port_%u_busy_cycles", dsw_xstats_port_get_busy_cycles,
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false },
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2018-09-18 12:45:13 +00:00
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{ "port_%u_inflight_credits", dsw_xstats_port_get_inflight_credits,
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2020-04-04 12:45:26 +00:00
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false },
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{ "port_%u_pending_releases", dsw_xstats_port_get_pending_releases,
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2018-09-18 12:45:13 +00:00
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false },
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{ "port_%u_load", dsw_xstats_port_get_load,
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false },
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{ "port_%u_last_bg", dsw_xstats_port_get_last_bg,
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false }
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};
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2019-12-12 18:44:13 +00:00
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typedef
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void (*dsw_xstats_foreach_fn)(const char *xstats_name,
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enum rte_event_dev_xstats_mode mode,
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2022-10-13 11:35:01 +00:00
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uint8_t queue_port_id, uint64_t xstats_id,
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2019-12-12 18:44:13 +00:00
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void *data);
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static void
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dsw_xstats_dev_foreach(dsw_xstats_foreach_fn fn, void *fn_data)
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2018-09-18 12:45:13 +00:00
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{
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unsigned int i;
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2019-12-12 18:44:13 +00:00
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for (i = 0; i < RTE_DIM(dsw_dev_xstats); i++)
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fn(dsw_dev_xstats[i].name, RTE_EVENT_DEV_XSTATS_DEVICE, 0,
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i, fn_data);
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2018-09-18 12:45:13 +00:00
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}
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2019-12-12 18:44:13 +00:00
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static void
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dsw_xstats_port_foreach(struct dsw_evdev *dsw, uint8_t port_id,
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dsw_xstats_foreach_fn fn, void *fn_data)
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2018-09-18 12:45:13 +00:00
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{
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2019-12-12 18:44:13 +00:00
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uint8_t queue_id;
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2018-09-18 12:45:13 +00:00
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unsigned int stat_idx;
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2019-12-12 18:44:13 +00:00
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for (stat_idx = 0, queue_id = 0;
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stat_idx < RTE_DIM(dsw_port_xstats);) {
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2018-09-18 12:45:13 +00:00
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struct dsw_xstats_port *xstat = &dsw_port_xstats[stat_idx];
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2019-12-12 18:44:13 +00:00
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char xstats_name[RTE_EVENT_DEV_XSTATS_NAME_SIZE];
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2022-10-13 11:35:01 +00:00
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uint64_t xstats_id;
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2018-09-18 12:45:13 +00:00
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if (xstat->per_queue) {
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2019-12-12 18:44:13 +00:00
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xstats_id = DSW_XSTATS_ID_CREATE(stat_idx, queue_id);
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snprintf(xstats_name, sizeof(xstats_name),
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2018-09-18 12:45:13 +00:00
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dsw_port_xstats[stat_idx].name_fmt, port_id,
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queue_id);
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queue_id++;
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} else {
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2019-12-12 18:44:13 +00:00
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xstats_id = stat_idx;
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snprintf(xstats_name, sizeof(xstats_name),
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2018-09-18 12:45:13 +00:00
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dsw_port_xstats[stat_idx].name_fmt, port_id);
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}
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2019-12-12 18:44:13 +00:00
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fn(xstats_name, RTE_EVENT_DEV_XSTATS_PORT, port_id,
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xstats_id, fn_data);
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2018-09-18 12:45:13 +00:00
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if (!(xstat->per_queue && queue_id < dsw->num_queues)) {
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stat_idx++;
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queue_id = 0;
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}
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}
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2019-12-12 18:44:13 +00:00
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}
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struct store_ctx {
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struct rte_event_dev_xstats_name *names;
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2022-10-13 11:35:01 +00:00
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uint64_t *ids;
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2019-12-12 18:44:13 +00:00
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unsigned int count;
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unsigned int capacity;
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};
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static void
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dsw_xstats_store_stat(const char *xstats_name,
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enum rte_event_dev_xstats_mode mode,
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2022-10-13 11:35:01 +00:00
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uint8_t queue_port_id, uint64_t xstats_id,
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2019-12-12 18:44:13 +00:00
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void *data)
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{
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struct store_ctx *ctx = data;
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RTE_SET_USED(mode);
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RTE_SET_USED(queue_port_id);
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if (ctx->count < ctx->capacity) {
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strcpy(ctx->names[ctx->count].name, xstats_name);
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ctx->ids[ctx->count] = xstats_id;
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}
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ctx->count++;
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2018-09-18 12:45:13 +00:00
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}
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int
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dsw_xstats_get_names(const struct rte_eventdev *dev,
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enum rte_event_dev_xstats_mode mode,
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uint8_t queue_port_id,
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struct rte_event_dev_xstats_name *xstats_names,
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2022-10-13 11:35:01 +00:00
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uint64_t *ids, unsigned int capacity)
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2018-09-18 12:45:13 +00:00
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{
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struct dsw_evdev *dsw = dsw_pmd_priv(dev);
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2019-12-12 18:44:13 +00:00
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struct store_ctx ctx = {
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.names = xstats_names,
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.ids = ids,
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.capacity = capacity
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};
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2018-09-18 12:45:13 +00:00
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switch (mode) {
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case RTE_EVENT_DEV_XSTATS_DEVICE:
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2019-12-12 18:44:13 +00:00
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dsw_xstats_dev_foreach(dsw_xstats_store_stat, &ctx);
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return ctx.count;
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2018-09-18 12:45:13 +00:00
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case RTE_EVENT_DEV_XSTATS_PORT:
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2019-12-12 18:44:13 +00:00
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dsw_xstats_port_foreach(dsw, queue_port_id,
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dsw_xstats_store_stat, &ctx);
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return ctx.count;
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2018-09-18 12:45:13 +00:00
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case RTE_EVENT_DEV_XSTATS_QUEUE:
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return 0;
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default:
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RTE_ASSERT(false);
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return -1;
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}
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}
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static int
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dsw_xstats_dev_get(const struct rte_eventdev *dev,
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2022-10-13 11:35:01 +00:00
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const uint64_t ids[], uint64_t values[], unsigned int n)
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2018-09-18 12:45:13 +00:00
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{
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struct dsw_evdev *dsw = dsw_pmd_priv(dev);
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unsigned int i;
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for (i = 0; i < n; i++) {
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2022-10-13 11:35:01 +00:00
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uint64_t id = ids[i];
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2018-09-18 12:45:13 +00:00
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struct dsw_xstat_dev *xstat = &dsw_dev_xstats[id];
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values[i] = xstat->get_value_fn(dsw);
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}
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return n;
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}
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static int
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dsw_xstats_port_get(const struct rte_eventdev *dev, uint8_t port_id,
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2022-10-13 11:35:01 +00:00
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const uint64_t ids[], uint64_t values[], unsigned int n)
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2018-09-18 12:45:13 +00:00
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{
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struct dsw_evdev *dsw = dsw_pmd_priv(dev);
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unsigned int i;
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for (i = 0; i < n; i++) {
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2022-10-13 11:35:01 +00:00
|
|
|
uint64_t id = ids[i];
|
2018-09-18 12:45:13 +00:00
|
|
|
unsigned int stat_idx = DSW_XSTATS_ID_GET_STAT(id);
|
|
|
|
struct dsw_xstats_port *xstat = &dsw_port_xstats[stat_idx];
|
|
|
|
uint8_t queue_id = 0;
|
|
|
|
|
|
|
|
if (xstat->per_queue)
|
|
|
|
queue_id = DSW_XSTATS_ID_GET_PARAM(id);
|
|
|
|
|
|
|
|
values[i] = xstat->get_value_fn(dsw, port_id, queue_id);
|
|
|
|
}
|
|
|
|
return n;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
dsw_xstats_get(const struct rte_eventdev *dev,
|
|
|
|
enum rte_event_dev_xstats_mode mode, uint8_t queue_port_id,
|
2022-10-13 11:35:01 +00:00
|
|
|
const uint64_t ids[], uint64_t values[], unsigned int n)
|
2018-09-18 12:45:13 +00:00
|
|
|
{
|
|
|
|
switch (mode) {
|
|
|
|
case RTE_EVENT_DEV_XSTATS_DEVICE:
|
|
|
|
return dsw_xstats_dev_get(dev, ids, values, n);
|
|
|
|
case RTE_EVENT_DEV_XSTATS_PORT:
|
|
|
|
return dsw_xstats_port_get(dev, queue_port_id, ids, values, n);
|
|
|
|
case RTE_EVENT_DEV_XSTATS_QUEUE:
|
|
|
|
return 0;
|
|
|
|
default:
|
|
|
|
RTE_ASSERT(false);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2019-12-12 18:44:13 +00:00
|
|
|
struct find_ctx {
|
|
|
|
const struct rte_eventdev *dev;
|
|
|
|
const char *name;
|
2022-10-13 11:35:01 +00:00
|
|
|
uint64_t *id;
|
2019-12-12 18:44:13 +00:00
|
|
|
uint64_t value;
|
|
|
|
};
|
|
|
|
|
|
|
|
static void
|
|
|
|
dsw_xstats_find_stat(const char *xstats_name,
|
|
|
|
enum rte_event_dev_xstats_mode mode,
|
2022-10-13 11:35:01 +00:00
|
|
|
uint8_t queue_port_id, uint64_t xstats_id,
|
2019-12-12 18:44:13 +00:00
|
|
|
void *data)
|
2018-09-18 12:45:13 +00:00
|
|
|
{
|
2019-12-12 18:44:13 +00:00
|
|
|
struct find_ctx *ctx = data;
|
|
|
|
|
|
|
|
if (strcmp(ctx->name, xstats_name) == 0) {
|
|
|
|
if (ctx->id != NULL)
|
|
|
|
*ctx->id = xstats_id;
|
|
|
|
dsw_xstats_get(ctx->dev, mode, queue_port_id, &xstats_id,
|
|
|
|
&ctx->value, 1);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
uint64_t
|
|
|
|
dsw_xstats_get_by_name(const struct rte_eventdev *dev, const char *name,
|
2022-10-13 11:35:01 +00:00
|
|
|
uint64_t *id)
|
2019-12-12 18:44:13 +00:00
|
|
|
{
|
|
|
|
struct dsw_evdev *dsw = dsw_pmd_priv(dev);
|
|
|
|
uint16_t port_id;
|
|
|
|
|
|
|
|
struct find_ctx ctx = {
|
|
|
|
.dev = dev,
|
|
|
|
.name = name,
|
|
|
|
.id = id,
|
|
|
|
.value = -EINVAL
|
|
|
|
};
|
|
|
|
|
|
|
|
dsw_xstats_dev_foreach(dsw_xstats_find_stat, &ctx);
|
|
|
|
|
|
|
|
for (port_id = 0; port_id < dsw->num_ports; port_id++)
|
|
|
|
dsw_xstats_port_foreach(dsw, port_id, dsw_xstats_find_stat,
|
|
|
|
&ctx);
|
|
|
|
|
|
|
|
return ctx.value;
|
2018-09-18 12:45:13 +00:00
|
|
|
}
|