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numam-dpdk/drivers/net/mlx5/version.map

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version: 22.11-rc0 Start a new release cycle with empty release notes. The ABI version becomes 23.0. The map files are updated to the new ABI major number (23). The ABI exceptions are dropped and CI ABI checks are disabled because compatibility is not preserved. Special handling of removed drivers is also dropped in check-abi.sh and a note has been added in libabigail.abignore as a reminder. Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Thomas Monjalon <thomas@monjalon.net>
2022-07-09 08:43:09 +00:00
DPDK_23 {
mlx5: introduce new driver for Mellanox ConnectX-4 adapters In its current state, this driver implements the bare minimum to initialize itself and Mellanox ConnectX-4 adapters without doing anything else (no RX/TX for instance). It is disabled by default since it is based on the mlx4 driver and also depends on libibverbs. Signed-off-by: Adrien Mazarguil <adrien.mazarguil@6wind.com> Signed-off-by: Nelio Laranjeiro <nelio.laranjeiro@6wind.com> Signed-off-by: Or Ami <ora@mellanox.com>
2015-10-30 18:52:30 +00:00
local: *;
};
net/mlx5: support fine grain dynamic flag The inline feature is designed to save PCI bandwidth by copying some of the data to the wqe. This feature if enabled works for all packets. In some cases when using external memory, the PCI bandwidth is not relevant since the memory can be accessed by other means. This commit introduce the ability to control the inline with mbuf granularity. In order to use this feature the application should register the field name, and restart the port. Signed-off-by: Ori Kam <orika@mellanox.com> Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com> Acked-by: Matan Azrad <matan@mellanox.com>
2020-01-29 12:21:06 +00:00
EXPERIMENTAL {
version: 20.11-rc0 Start a new release cycle with empty release notes. The ABI version becomes 21.0. The ABI major is back to normal, having only one number (21 vs 20.0). The map files are updated to the new ABI major number (21). The ABI exceptions are dropped. Travis ABI check is disabled because compatibility is not preserved. Signed-off-by: Thomas Monjalon <thomas@monjalon.net> Acked-by: Ray Kinsella <mdr@ashroe.eu>
2020-08-10 15:10:20 +00:00
global:
net/mlx5: support fine grain dynamic flag The inline feature is designed to save PCI bandwidth by copying some of the data to the wqe. This feature if enabled works for all packets. In some cases when using external memory, the PCI bandwidth is not relevant since the memory can be accessed by other means. This commit introduce the ability to control the inline with mbuf granularity. In order to use this feature the application should register the field name, and restart the port. Signed-off-by: Ori Kam <orika@mellanox.com> Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com> Acked-by: Matan Azrad <matan@mellanox.com>
2020-01-29 12:21:06 +00:00
version: 20.11-rc0 Start a new release cycle with empty release notes. The ABI version becomes 21.0. The ABI major is back to normal, having only one number (21 vs 20.0). The map files are updated to the new ABI major number (21). The ABI exceptions are dropped. Travis ABI check is disabled because compatibility is not preserved. Signed-off-by: Thomas Monjalon <thomas@monjalon.net> Acked-by: Ray Kinsella <mdr@ashroe.eu>
2020-08-10 15:10:20 +00:00
# added in 20.02
net/mlx5: support fine grain dynamic flag The inline feature is designed to save PCI bandwidth by copying some of the data to the wqe. This feature if enabled works for all packets. In some cases when using external memory, the PCI bandwidth is not relevant since the memory can be accessed by other means. This commit introduce the ability to control the inline with mbuf granularity. In order to use this feature the application should register the field name, and restart the port. Signed-off-by: Ori Kam <orika@mellanox.com> Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com> Acked-by: Matan Azrad <matan@mellanox.com>
2020-01-29 12:21:06 +00:00
rte_pmd_mlx5_get_dyn_flag_names;
net/mlx5: add flow sync API When creating a flow, the rule itself might not take effort immediately once the function call returns with success. It would take some time to let the steering synchronize with the hardware. If the application wants the packet to be sent to hit the flow after it is created, this flow sync API can be used to clear the steering HW cache to enforce next packet hits the latest rules. For TX, usually the NIC TX domain and/or the FDB domain should be synchronized depends in which domain the flow is created. The application could also try to synchronize the NIC RX and/or the FDB domain for the ingress packets. Signed-off-by: Bing Zhao <bingz@nvidia.com> Acked-by: Ori Kam <orika@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2020-10-27 14:46:54 +00:00
# added in 20.11
rte_pmd_mlx5_sync_flow;
net/mlx5: add external Rx queue mapping API External queue is a queue that has been created and managed outside the PMD. The queues owner might use PMD to generate flow rules using these external queues. When the queue is created in hardware it is given an ID represented by 32 bits. In contrast, the index of the queues in PMD is represented by 16 bits. To enable the use of PMD to generate flow rules, the queue owner must provide a mapping between the HW index and a 16-bit index corresponding to the ethdev API. This patch adds an API enabling to insert/cancel a mapping between HW queue id and ethdev queue id. Signed-off-by: Michael Baum <michaelba@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>
2022-02-24 23:25:10 +00:00
# added in 22.03
rte_pmd_mlx5_external_rx_queue_id_map;
rte_pmd_mlx5_external_rx_queue_id_unmap;
net/mlx5: add API to configure host port shaper Host port shaper can be configured with QSHR (QoS Shaper Host Register). Add check in build files to enable this function or not. The host shaper configuration affects all the ethdev ports belonging to the same host port. Host shaper can configure shaper rate and lwm-triggered for a host port. The shaper limits the rate of traffic from host port to wire port. If lwm-triggered is enabled, a 100Mbps shaper is enabled automatically when one of the host port's Rx queues receives available descriptor threshold event. Signed-off-by: Spike Du <spiked@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>
2022-06-16 08:41:53 +00:00
# added in 22.07
rte_pmd_mlx5_host_shaper_config;
net/mlx5: support device control for E-Switch default rule This patch adds support for fdb_def_rule_en device argument to HW Steering, which controls: - the creation of the default FDB jump flow rule. - the ability of the user to create transfer flow rules in the root table. Signed-off-by: Dariusz Sosnowski <dsosnowski@nvidia.com> Signed-off-by: Xueming Li <xuemingl@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2022-10-20 15:41:50 +00:00
rte_pmd_mlx5_external_sq_enable;
net/mlx5: support fine grain dynamic flag The inline feature is designed to save PCI bandwidth by copying some of the data to the wqe. This feature if enabled works for all packets. In some cases when using external memory, the PCI bandwidth is not relevant since the memory can be accessed by other means. This commit introduce the ability to control the inline with mbuf granularity. In order to use this feature the application should register the field name, and restart the port. Signed-off-by: Ori Kam <orika@mellanox.com> Signed-off-by: Viacheslav Ovsiienko <viacheslavo@mellanox.com> Acked-by: Matan Azrad <matan@mellanox.com>
2020-01-29 12:21:06 +00:00
};
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