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version: 21.08-rc0 Start a new release cycle with empty release notes. Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-05-21 16:45:21 +00:00
.. SPDX-License-Identifier: BSD-3-Clause
Copyright 2021 The DPDK contributors
.. include:: <isonum.txt>
DPDK Release 21.08
==================
.. **Read this first.**
The text in the sections below explains how to update the release notes.
Use proper spelling, capitalization and punctuation in all sections.
Variable and config names should be quoted as fixed width text:
``LIKE_THIS``.
Build the docs and view the output file to ensure the changes are correct::
make doc-guides-html
xdg-open build/doc/html/guides/rel_notes/release_21_08.html
New Features
------------
.. This section should contain new features added in this release.
Sample format:
* **Add a title in the past tense with a full stop.**
Add a short 1-2 sentence description in the past tense.
The description should be enough to allow someone scanning
the release notes to understand the new feature.
If the feature adds a lot of sub-features you can use a bullet list
like this:
* Added feature foo to do something.
* Enhanced feature bar to do something else.
Refer to the previous release notes for examples.
Suggested order in release notes items:
* Core libs (EAL, mempool, ring, mbuf, buses)
* Device abstraction libs and PMDs (ordered alphabetically by vendor name)
- ethdev (lib, PMDs)
- cryptodev (lib, PMDs)
- eventdev (lib, PMDs)
- etc
* Other libs
* Apps, Examples, Tools (if significant)
This section is a comment. Do not overwrite or remove it.
Also, make sure to start the actual text at the margin.
=======================================================
bus/auxiliary: introduce auxiliary bus Auxiliary bus [1] provides a way to split function into child-devices representing sub-domains of functionality. Each auxiliary device represents a part of its parent functionality. Auxiliary device is identified by unique device name, sysfs path: /sys/bus/auxiliary/devices/<name> Devargs legacy syntax of auxiliary device: -a auxiliary:<name>[,args...] Devargs generic syntax of auxiliary device: -a bus=auxiliary,name=<name>/class=<class>/driver=<driver>[,args...] [1] kernel auxiliary bus document: https://www.kernel.org/doc/html/latest/driver-api/auxiliary_bus.html Signed-off-by: Xueming Li <xuemingl@nvidia.com> Acked-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru> Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-07-05 06:45:12 +00:00
* **Added auxiliary bus support.**
Auxiliary bus provides a way to split function into child-devices
representing sub-domains of functionality. Each auxiliary device
represents a part of its parent functionality.
eal: handle compressed firmware Introduce an internal firmware loading helper to remove code duplication in our drivers and handle xz compressed firmware by calling libarchive. This helper tries to look for .xz suffixes so that drivers are not aware the firmware has been compressed. libarchive is set as an optional dependency: without libarchive, a runtime warning is emitted so that users know there is a compressed firmware. Windows implementation is left as an empty stub. Signed-off-by: David Marchand <david.marchand@redhat.com> Reviewed-by: Igor Russkikh <irusskikh@marvell.com> Acked-by: Aaron Conole <aconole@redhat.com> Tested-by: Haiyue Wang <haiyue.wang@intel.com>
2021-07-07 12:08:18 +00:00
* **Added XZ compressed firmware support.**
Using ``rte_firmware_read``, a driver can now handle XZ compressed firmware
in a transparent way, with EAL uncompressing using libarchive if this library
is available when building DPDK.
net/ena: support Rx interrupt In order to support asynchronous Rx in the applications, the driver has to configure the event file descriptors and configure the HW. This patch configures appropriate data structures for the rte_ethdev layer, adds .rx_queue_intr_enable and .rx_queue_intr_disable API handlers, and configures IO queues to work in the interrupt mode, if it was requested by the application. Signed-off-by: Michal Krawczyk <mk@semihalf.com> Reviewed-by: Artur Rojek <ar@semihalf.com> Reviewed-by: Igor Chauskin <igorch@amazon.com> Reviewed-by: Shai Brandes <shaibran@amazon.com> Reviewed-by: Shay Agroskin <shayagr@amazon.com>
2021-07-23 10:24:52 +00:00
* **Updated Amazon ENA PMD.**
The new driver version (v2.4.0) introduced bug fixes and improvements,
including:
* Added Rx interrupt support.
net/ena: rework RSS configuration Allow user to specify his own hash key and hash ctrl if the device is supporting that. HW interprets the key in reverse byte order, so the PMD reorders the key before passing it to the ena_com layer. Default key is being set in random matter each time the device is being initialized. Moreover, make minor adjustments for reta size setting in terms of returning error values. RSS code was moved to ena_rss.c file to improve readability. Signed-off-by: Michal Krawczyk <mk@semihalf.com> Reviewed-by: Shai Brandes <shaibran@amazon.com> Reviewed-by: Shay Agroskin <shayagr@amazon.com> Reviewed-by: Amit Bernstein <amitbern@amazon.com>
2021-07-23 10:24:53 +00:00
* RSS hash function key reconfiguration support.
net/ena: support Rx interrupt In order to support asynchronous Rx in the applications, the driver has to configure the event file descriptors and configure the HW. This patch configures appropriate data structures for the rte_ethdev layer, adds .rx_queue_intr_enable and .rx_queue_intr_disable API handlers, and configures IO queues to work in the interrupt mode, if it was requested by the application. Signed-off-by: Michal Krawczyk <mk@semihalf.com> Reviewed-by: Artur Rojek <ar@semihalf.com> Reviewed-by: Igor Chauskin <igorch@amazon.com> Reviewed-by: Shai Brandes <shaibran@amazon.com> Reviewed-by: Shay Agroskin <shayagr@amazon.com>
2021-07-23 10:24:52 +00:00
net/iavf: query QoS capabilities and set queue TC mapping This patch added the support for VF to config the ETS-based Tx QoS, including querying current QoS configuration from PF and config queue TC mapping. PF QoS is configured in advance and the queried info is provided to the user for future usage. VF queues are mapped to different TCs in PF through virtchnl. Signed-off-by: Qiming Yang <qiming.yang@intel.com> Signed-off-by: Ting Xu <ting.xu@intel.com> Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-07-01 11:41:22 +00:00
* **Updated Intel iavf driver.**
* Added Tx QoS VF queue TC mapping.
net/iavf: support RSS for GTPoGRE Support AVF RSS for inner most header of GTPoGRE packet. It supports RSS based on inner most IP src + dst address and TCP/UDP src + dst port. Signed-off-by: Lingyu Liu <lingyu.liu@intel.com> Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-07-07 12:57:52 +00:00
* Added FDIR and RSS for GTPoGRE, support filter based on GTPU TEID/QFI,
net/iavf: support flow director for GTPoGRE Support AVF FDIR for inner header of GTPoGRE tunnel packet. Only patterns without inner most L3,L4 header support outer L3 src/dst and TEID,QFI FDIR. +------------------------------------+-------------------------------+ | Pattern | Input Set | +------------------------------------+-------------------------------+ |eth/ipv4/gre/ipv4/gtpu/(eh/)ipv4 |inner: src/dst ip | |eth/ipv4/gre/ipv4/gtpu/(eh/)ipv4/udp|inner: src/dst ip, src/dst port| |eth/ipv4/gre/ipv4/gtpu/(eh/)ipv4/tcp|inner: src/dst ip, src/dst port| |eth/ipv4/gre/ipv4/gtpu/(eh/)ipv6 |inner: src/dst ip | |eth/ipv4/gre/ipv4/gtpu/(eh/)ipv6/udp|inner: src/dst ip, src/dst port| |eth/ipv4/gre/ipv4/gtpu/(eh/)ipv6/tcp|inner: src/dst ip, src/dst port| |eth/ipv4/gre/ipv6/gtpu/(eh/)ipv4 |inner: src/dst ip | |eth/ipv4/gre/ipv6/gtpu/(eh/)ipv4/udp|inner: src/dst ip, src/dst port| |eth/ipv4/gre/ipv6/gtpu/(eh/)ipv4/tcp|inner: src/dst ip, src/dst port| |eth/ipv4/gre/ipv6/gtpu/(eh/)ipv6 |inner: src/dst ip | |eth/ipv4/gre/ipv6/gtpu/(eh/)ipv6/udp|inner: src/dst ip, src/dst port| |eth/ipv4/gre/ipv6/gtpu/(eh/)ipv6/tcp|inner: src/dst ip, src/dst port| |eth/ipv6/gre/ipv4/gtpu/(eh/)ipv4 |inner: src/dst ip | |eth/ipv6/gre/ipv4/gtpu/(eh/)ipv4/udp|inner: src/dst ip, src/dst port| |eth/ipv6/gre/ipv4/gtpu/(eh/)ipv4/tcp|inner: src/dst ip, src/dst port| |eth/ipv6/gre/ipv4/gtpu/(eh/)ipv6 |inner: src/dst ip | |eth/ipv6/gre/ipv4/gtpu/(eh/)ipv6/udp|inner: src/dst ip, src/dst port| |eth/ipv6/gre/ipv4/gtpu/(eh/)ipv6/tcp|inner: src/dst ip, src/dst port| |eth/ipv6/gre/ipv6/gtpu/(eh/)ipv4 |inner: src/dst ip | |eth/ipv6/gre/ipv6/gtpu/(eh/)ipv4/udp|inner: src/dst ip, src/dst port| |eth/ipv6/gre/ipv6/gtpu/(eh/)ipv4/tcp|inner: src/dst ip, src/dst port| |eth/ipv6/gre/ipv6/gtpu/(eh/)ipv6 |inner: src/dst ip | |eth/ipv6/gre/ipv6/gtpu/(eh/)ipv6/udp|inner: src/dst ip, src/dst port| |eth/ipv6/gre/ipv6/gtpu/(eh/)ipv6/tcp|inner: src/dst ip, src/dst port| |eth/ipv4/gre/ipv4/gtpu(/eh) |outer: src/dst ip, teid(,qfi) | |eth/ipv4/gre/ipv6/gtpu(/eh) |outer: src/dst ip, teid(,qfi) | |eth/ipv6/gre/ipv4/gtpu(/eh) |outer: src/dst ip, teid(,qfi) | |eth/ipv6/gre/ipv6/gtpu(/eh) |outer: src/dst ip, teid(,qfi) | +------------------------------------+-------------------------------+ Signed-off-by: Lingyu Liu <lingyu.liu@intel.com> Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-07-07 12:57:51 +00:00
outer most L3 or inner most l3/l4.
net/iavf: query QoS capabilities and set queue TC mapping This patch added the support for VF to config the ETS-based Tx QoS, including querying current QoS configuration from PF and config queue TC mapping. PF QoS is configured in advance and the queried info is provided to the user for future usage. VF queues are mapped to different TCs in PF through virtchnl. Signed-off-by: Qiming Yang <qiming.yang@intel.com> Signed-off-by: Ting Xu <ting.xu@intel.com> Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-07-01 11:41:22 +00:00
net/ice: add AVX2 offload Rx Add a specific path for RX AVX2. In this path, support the HW offload features, like, checksum, VLAN stripping, RSS hash. This path is chosen automatically according to the configuration. 'inline' is used, then the duplicate code is generated by the compiler. Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com> Acked-by: Leyi Rong <leyi.rong@intel.com>
2021-06-29 02:29:21 +00:00
* **Updated Intel ice driver.**
* In AVX2 code, added the new RX and TX paths to use the HW offload
features. When the HW offload features are configured to be used, the
offload paths are chosen automatically. In parallel the support for HW
offload features was removed from the legacy AVX2 paths.
net/ice: support QoS config VF bandwidth in DCF This patch supports the ETS-based QoS configuration. It enables the DCF to configure bandwidth limits for each VF VSI of different TCs. A hierarchy scheduler tree is built with port, TC and VSI nodes. Signed-off-by: Qiming Yang <qiming.yang@intel.com> Signed-off-by: Ting Xu <ting.xu@intel.com> Acked-by: Qi Zhang <qi.z.zhang@intel.com>
2021-07-01 11:41:21 +00:00
* Added Tx QoS TC bandwidth configuration in DCF.
net/ice: add AVX2 offload Rx Add a specific path for RX AVX2. In this path, support the HW offload features, like, checksum, VLAN stripping, RSS hash. This path is chosen automatically according to the configuration. 'inline' is used, then the duplicate code is generated by the compiler. Signed-off-by: Wenzhuo Lu <wenzhuo.lu@intel.com> Acked-by: Leyi Rong <leyi.rong@intel.com>
2021-06-29 02:29:21 +00:00
net/cnxk: add build infra and common probing Add build infrastructure and common probe and remove for cnxk driver which is used by both CN10K and CN9K SoC. Signed-off-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-06-23 04:46:09 +00:00
* **Added support for Marvell CN10K SoC ethernet device.**
* Added net/cnxk driver which provides the support for the integrated ethernet
device.
net/mlx5: validate meter action in policy This adds the validation when creating a policy with meter action. Currently meter action is only allowed for green color in policy, and 8 meters are supported at maximum in one meter hierarchy. Signed-off-by: Shun Hao <shunh@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-06 13:14:50 +00:00
* **Updated Mellanox mlx5 driver.**
net/mlx5: support Sub-Function Introduce SF support. Similar to VF, SF on auxiliary bus is a portion of hardware PF, no representor or bonding parameters for SF. Devargs to support SF: -a auxiliary:mlx5_core.sf.8,dv_flow_en=1 New global syntax to support SF: -a bus=auxiliary,name=mlx5_core.sf.8/class=eth/driver=mlx5,dv_flow_en=1 Signed-off-by: Xueming Li <xuemingl@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-07-21 14:37:35 +00:00
* Added Sub-Function support based on auxiliary bus.
net/mlx5: validate meter action in policy This adds the validation when creating a policy with meter action. Currently meter action is only allowed for green color in policy, and 8 meters are supported at maximum in one meter hierarchy. Signed-off-by: Shun Hao <shunh@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-06 13:14:50 +00:00
* Added support for meter hierarchy.
net/mlx5: support yellow in meter policy validation In the previous implementation, the policy for yellow color was not supported. The action validation for yellow was skipped. Since the yellow color policy needs to be supported, the validation should also be done for the yellow color. In the meanwhile, due to the fact that color policies of one meter should be used for the same flow(s), the domains supported of both colors should be the same. If both of the colors have RSS as the termination actions, except the queues, all other parameters of RSS should be the same. Signed-off-by: Bing Zhao <bingz@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-21 08:54:19 +00:00
* Added support for metering policy actions of yellow color.
net/mlx5: support meter for trTCM profiles The support of RFC2698 and RFC4115 are added in mlx5 PMD. Only the ASO metering supports these two profiles. Signed-off-by: Bing Zhao <bingz@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-21 08:54:21 +00:00
* Added support for metering trTCM RFC2698 and RFC4115.
net/mlx5: control flow rules with identical pattern In order to allow\disallow configuring rules with identical patterns, the new device argument 'allow_duplicate_pattern' is introduced. If allow, these rules be inserted successfully and only the first rule take affect. If disallow, the first rule will be inserted and other rules be rejected. The default is to allow. Set it to 0 if disallow, for example: -a <PCI_BDF>,allow_duplicate_pattern=0 Signed-off-by: Jiawei Wang <jiaweiw@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-06 08:12:27 +00:00
* Added devargs options ``allow_duplicate_pattern``.
net/mlx5: support flow matchng on IPv4 IHL Query MLX5 port hardware if it is capable to offload IPv4 IHL field. Provide flow rules capability to match on IPv4 IHL field. Minimal HCA firmware version required to offload IPv4 IHL is xx_30_2000. Signed-off-by: Gregory Etelson <getelson@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com>
2021-07-05 11:40:35 +00:00
* Added matching on IPv4 Internet Header Length (IHL).
net/mlx5: support matching on VXLAN reserved field This adds matching on the reserved field of VXLAN header (the last 8-bits). The capability from rdma-core is detected by creating a dummy matcher using misc5 when the device is probed. For non-zero groups and FDB domain, the capability is detected from rdma-core, meanwhile for NIC domain group zero it's relying on the HCA_CAP from FW. Signed-off-by: Rongwei Liu <rongweil@nvidia.com> Acked-by: Viacheslav Ovsiienko <viacheslavo@nvidia.com> Acked-by: Raslan Darawsheh <rasland@nvidia.com>
2021-07-13 12:09:19 +00:00
* Added support for matching on VXLAN header last 8-bits reserved field.
doc: add multi-thread flow rate optimizations for mlx5 This commit adds the multiple-thread flow insertion optimization description. Signed-off-by: Suanming Mou <suanmingm@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-13 08:45:00 +00:00
* Optimized multi-thread flow rule insertion rate.
net/mlx5: validate meter action in policy This adds the validation when creating a policy with meter action. Currently meter action is only allowed for green color in policy, and 8 meters are supported at maximum in one meter hierarchy. Signed-off-by: Shun Hao <shunh@nvidia.com> Acked-by: Matan Azrad <matan@nvidia.com>
2021-07-06 13:14:50 +00:00
net/ngbe: add build and doc infrastructure Adding bare minimum PMD library and doc build infrastructure and claim the maintainership for ngbe PMD. Signed-off-by: Jiawen Wu <jiawenwu@trustnetic.com>
2021-07-08 09:32:21 +00:00
* **Added Wangxun ngbe PMD.**
Added a new PMD driver for Wangxun 1 Gigabit Ethernet NICs.
See the :doc:`../nics/ngbe` for more details.
net/sfc: support flow action count in transfer rules For now, a rule may have only one dedicated counter, shared counters are not supported. HW delivers (or "streams") counter readings using special packets. The driver creates a dedicated Rx queue to receive such packets and requests that HW start "streaming" the readings to it. The counter queue is polled periodically, and the first available service core is used for that. Hence, the user has to specify at least one service core for counters to work. Such a core is shared by all MAE-capable devices managed by sfc driver. Signed-off-by: Igor Romanov <igor.romanov@oktetlabs.ru> Signed-off-by: Andrew Rybchenko <andrew.rybchenko@oktetlabs.ru> Reviewed-by: Andy Moreton <amoreton@xilinx.com> Reviewed-by: Ivan Malov <ivan.malov@oktetlabs.ru>
2021-07-02 08:39:47 +00:00
* **Updated Solarflare network PMD.**
Updated the Solarflare ``sfc_efx`` driver with changes including:
* Added COUNT action support for SN1000 NICs
vhost: add unsafe async API to clear packets Applications need to stop DMA transfers and finish all the inflight packets when in VM memory hot-plug case and async vhost is used. This patch is to provide an unsafe API to clear inflight packets which are submitted to DMA engine in vhost async data path. Update the program guide and release notes for virtqueue inflight packets clear API in vhost lib. Signed-off-by: Cheng Jiang <cheng1.jiang@intel.com> Reviewed-by: Maxime Coquelin <maxime.coquelin@redhat.com>
2021-07-23 08:09:35 +00:00
* **Added inflight packets clear API in vhost library.**
Added an API which can clear the inflight packets submitted to DMA
engine in vhost async data path.
common/qat: support GEN4 devices This commit adds support for fourth generation (GEN4) of Intel QuickAssist (QAT) Technology devices. Signed-off-by: Arek Kusztal <arkadiuszx.kusztal@intel.com> Acked-by: Fan Zhang <roy.fan.zhang@intel.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-06-28 16:34:20 +00:00
* **Updated Intel QuickAssist crypto PMD.**
Added fourth generation of QuickAssist Technology(QAT) devices support.
Only symmetric crypto has been currently enabled, compression and asymmetric
crypto PMD will fail to create.
crypto/cnxk: add symmetric capabilities Add symmetric crypto capabilities for cn9k & cn10k. Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com> Signed-off-by: Anoob Joseph <anoobj@marvell.com> Signed-off-by: Archana Muniganti <marchana@marvell.com> Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-06-25 05:56:30 +00:00
* **Added support for Marvell CNXK crypto driver.**
* Added cnxk crypto PMD which provides support for an integrated
crypto driver for CN9K and CN10K series of SOCs. Support for
symmetric crypto algorithms is added to both the PMDs.
crypto/cnxk: add security capabilities Add security capabilities supported by crypto cn10k PMD. Signed-off-by: Anoob Joseph <anoobj@marvell.com> Signed-off-by: Srujana Challa <schalla@marvell.com> Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-06-29 07:34:32 +00:00
* Added support for lookaside protocol (IPsec) offload in cn10k PMD.
test/crypto: add cnxk for asymmetric cases Registered cn9k and cn10k for asymmetric crypto autotest. Documentation and release notes are also updated. Signed-off-by: Kiran Kumar K <kirankumark@marvell.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-06-29 07:34:36 +00:00
* Added support for asymmetric crypto operations in cn9k and cn10k PMD.
crypto/cnxk: add symmetric capabilities Add symmetric crypto capabilities for cn9k & cn10k. Signed-off-by: Ankur Dwivedi <adwivedi@marvell.com> Signed-off-by: Anoob Joseph <anoobj@marvell.com> Signed-off-by: Archana Muniganti <marchana@marvell.com> Signed-off-by: Tejasree Kondoj <ktejasree@marvell.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-06-25 05:56:30 +00:00
crypto/octeontx: add crypto adapter data path Added support for crypto adapter OP_FORWARD mode. As OcteonTx CPT crypto completions could be out of order, each crypto op is enqueued to CPT, dequeued from CPT and enqueued to SSO one-by-one. Signed-off-by: Shijith Thotton <sthotton@marvell.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-06-23 20:53:50 +00:00
* **Updated Marvell OCTEON TX crypto PMD.**
Added support for crypto adapter OP_FORWARD mode.
crypto/mlx5: support statistics operations This commit adds mlx5 crypto statistic get and reset operations. Signed-off-by: Suanming Mou <suanmingm@nvidia.com> Signed-off-by: Matan Azrad <matan@nvidia.com> Acked-by: Akhil Goyal <gakhil@marvell.com>
2021-07-20 13:09:41 +00:00
* **Added support for Nvidia crypto device driver.**
Added mlx5 crypto driver to support AES-XTS cipher operations.
The first device to support it is ConnectX-6.
compress/isal: support Arm platform Isal compress PMD has build failures on Arm platform. As dependent library ISA-L is supported on Arm platform, support of the PMD is expanded to Arm architecture. Fixed build failure caused by architecture specific code, and made the PMD multi architecture compatible. Bugzilla ID: 755 Signed-off-by: Ruifeng Wang <ruifeng.wang@arm.com>
2021-07-15 08:05:02 +00:00
* **Updated ISAL compress device PMD.**
The ISAL compress device PMD now supports Arm platforms.
raw/cnxk_bphy: add BPHY CGX/RPM skeleton driver Add baseband PHY CGX/RPM skeleton driver which merely probes a matching device. CGX/RPM are Ethernet MACs hardwired to baseband subsystem. Signed-off-by: Tomasz Duszynski <tduszynski@marvell.com> Signed-off-by: Jakub Palider <jpalider@marvell.com> Reviewed-by: Jerin Jacob <jerinj@marvell.com>
2021-06-21 15:04:26 +00:00
* **Added Baseband PHY CNXK PMD.**
Added Baseband PHY PMD which allows to configure BPHY hardware block
comprising accelerators and DSPs specifically tailored for 5G/LTE inline
usecases. Configuration happens via standard rawdev enq/deq operations. See
the :doc:`../rawdevs/cnxk_bphy` rawdev guide for more details on this driver.
event/cnxk: support Tx adapter Add support for event eth Tx adapter. Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-07-14 09:02:03 +00:00
* **Added support for Marvell CN10K, CN9K, event Rx/Tx adapter.**
event/cnxk: support Rx adapter Add support for event eth Rx adapter. Resize cn10k workslot fastpath structure to fit in 64B cacheline size. Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-07-14 09:02:01 +00:00
event/cnxk: support Tx adapter Add support for event eth Tx adapter. Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: Nithin Dabilpuram <ndabilpuram@marvell.com>
2021-07-14 09:02:03 +00:00
* Added Rx/Tx adapter support for event/cnxk when the ethernet device requested
event/cnxk: support Rx adapter Add support for event eth Rx adapter. Resize cn10k workslot fastpath structure to fit in 64B cacheline size. Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-07-14 09:02:01 +00:00
is net/cnxk.
event/cnxk: support vectorized Tx event fast path Add Tx event vector fastpath, integrate event vector Tx routine into Tx burst. Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-07-14 09:02:07 +00:00
* Added support for event vectorization for Rx/Tx adapter.
event/cnxk: support Rx adapter Add support for event eth Rx adapter. Resize cn10k workslot fastpath structure to fit in 64B cacheline size. Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com> Acked-by: Jerin Jacob <jerinj@marvell.com>
2021-07-14 09:02:01 +00:00
power: support cppc_cpufreq driver Currently in DPDK only acpi_cpufreq and pstate_cpufreq drivers are supported, which are both not available on arm64 platforms. Add support for cppc_cpufreq driver which works on most arm64 platforms. Signed-off-by: Richael Zhuang <richael.zhuang@arm.com> Acked-by: David Hunt <david.hunt@intel.com>
2021-07-09 10:55:47 +00:00
* **Added cppc_cpufreq support to Power Management library.**
Added support for cppc_cpufreq driver which works on most arm64 platforms.
power: support callbacks for multiple Rx queues Currently, there is a hard limitation on the PMD power management support that only allows it to support a single queue per lcore. This is not ideal as most DPDK use cases will poll multiple queues per core. The PMD power management mechanism relies on ethdev Rx callbacks, so it is very difficult to implement such support because callbacks are effectively stateless and have no visibility into what the other ethdev devices are doing. This places limitations on what we can do within the framework of Rx callbacks, but the basics of this implementation are as follows: - Replace per-queue structures with per-lcore ones, so that any device polled from the same lcore can share data - Any queue that is going to be polled from a specific lcore has to be added to the list of queues to poll, so that the callback is aware of other queues being polled by the same lcore - Both the empty poll counter and the actual power saving mechanism is shared between all queues polled on a particular lcore, and is only activated when all queues in the list were polled and were determined to have no traffic. - The limitation on UMWAIT-based polling is not removed because UMWAIT is incapable of monitoring more than one address. Also, while we're at it, update and improve the docs. Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Tested-by: David Hunt <david.hunt@intel.com>
2021-07-09 16:08:15 +00:00
* **Added multi-queue support to Ethernet PMD Power Management**
The experimental PMD power management API now supports managing
multiple Ethernet Rx queues per lcore.
version: 21.08-rc0 Start a new release cycle with empty release notes. Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-05-21 16:45:21 +00:00
Removed Items
-------------
.. This section should contain removed items in this release. Sample format:
* Add a short 1-2 sentence description of the removed item
in the past tense.
This section is a comment. Do not overwrite or remove it.
Also, make sure to start the actual text at the margin.
=======================================================
API Changes
-----------
.. This section should contain API changes. Sample format:
* sample: Add a short 1-2 sentence description of the API change
which was announced in the previous releases and made in this release.
Start with a scope label like "ethdev:".
Use fixed width quotes for ``function_names`` or ``struct_names``.
Use the past tense.
This section is a comment. Do not overwrite or remove it.
Also, make sure to start the actual text at the margin.
=======================================================
eal: save error in string copy The string copy api rte_strscpy() did not set rte_errno during failures, instead it just returned negative error number. Set rte_errrno if the destination buffer is too small. Signed-off-by: Thomas Monjalon <thomas@monjalon.net> Signed-off-by: Xueming Li <xuemingl@nvidia.com> Reviewed-by: David Marchand <david.marchand@redhat.com>
2021-06-13 08:24:21 +00:00
* eal: ``rte_strscpy`` sets ``rte_errno`` to ``E2BIG`` in case of string
truncation.
eal: fix argument in 32-bit safe BSF function The first argument to rte_bsf32_safe was incorrectly declared as a 64 bit value. The code only works on 32 bit values and the underlying function rte_bsf32 only accepts 32 bit values. This was a mistake introduced when the safe version was added and probably cause by copy/paste from the 64 bit version. The bug passed silently under the radar until some other code was built with -Wall and -Wextra in C++ and C++ complains about the missing cast. Yes, this is a API signature change, but the original code was wrong. It is an inline so not an ABI change. Fixes: 4e261f551986 ("eal: add 64-bit bsf and 32-bit safe bsf functions") Cc: stable@dpdk.org Signed-off-by: Stephen Hemminger <stephen@networkplumber.org> Acked-by: Tyler Retzlaff <roretzla@linux.microsoft.com>
2021-07-23 15:45:46 +00:00
* eal: ``rte_bsf32_safe`` now takes a 32-bit value for its first argument.
This fixes warnings about loss of precision
when used with some compilers settings.
eal: use callbacks for power monitoring comparison Previously, the semantics of power monitor were such that we were checking current value against the expected value, and if they matched, then the sleep was aborted. This is somewhat inflexible, because it only allowed us to check for a specific value in a specific way. This commit replaces the comparison with a user callback mechanism, so that any PMD (or other code) using `rte_power_monitor()` can define their own comparison semantics and decision making on how to detect the need to abort the entering of power optimized state. Existing implementations are adjusted to follow the new semantics. Suggested-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Tested-by: David Hunt <david.hunt@intel.com> Acked-by: Timothy McDaniel <timothy.mcdaniel@intel.com>
2021-07-09 16:08:10 +00:00
* eal: ``rte_power_monitor`` and the ``rte_power_monitor_cond`` struct changed
to use a callback mechanism.
power: make ethdev power management thread unsafe Currently, we expect that only one callback can be active at any given moment, for a particular queue configuration, which is relatively easy to implement in a thread-safe way. However, we're about to add support for multiple queues per lcore, which will greatly increase the possibility of various race conditions. We could have used something like an RCU for this use case, but absent of a pressing need for thread safety we'll go the easy way and just mandate that the API's are to be called when all affected ports are stopped, and document this limitation. This greatly simplifies the `rte_power_monitor`-related code. Signed-off-by: Anatoly Burakov <anatoly.burakov@intel.com> Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com> Tested-by: David Hunt <david.hunt@intel.com>
2021-07-09 16:08:14 +00:00
* rte_power: The experimental PMD power management API is no longer considered
to be thread safe; all Rx queues affected by the API will now need to be
stopped before making any changes to the power management scheme.
version: 21.08-rc0 Start a new release cycle with empty release notes. Signed-off-by: David Marchand <david.marchand@redhat.com> Acked-by: Thomas Monjalon <thomas@monjalon.net>
2021-05-21 16:45:21 +00:00
ABI Changes
-----------
.. This section should contain ABI changes. Sample format:
* sample: Add a short 1-2 sentence description of the ABI change
which was announced in the previous releases and made in this release.
Start with a scope label like "ethdev:".
Use fixed width quotes for ``function_names`` or ``struct_names``.
Use the past tense.
This section is a comment. Do not overwrite or remove it.
Also, make sure to start the actual text at the margin.
=======================================================
* No ABI change that would break compatibility with 20.11.
Known Issues
------------
.. This section should contain new known issues in this release. Sample format:
* **Add title in present tense with full stop.**
Add a short 1-2 sentence description of the known issue
in the present tense. Add information on any known workarounds.
This section is a comment. Do not overwrite or remove it.
Also, make sure to start the actual text at the margin.
=======================================================
Tested Platforms
----------------
.. This section should contain a list of platforms that were tested
with this release.
The format is:
* <vendor> platform with <vendor> <type of devices> combinations
* List of CPU
* List of OS
* List of devices
* Other relevant details...
This section is a comment. Do not overwrite or remove it.
Also, make sure to start the actual text at the margin.
=======================================================
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