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numam-dpdk/drivers/crypto/Makefile

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drivers: use SPDX tag for Intel copyright files Replace the BSD license header with the SPDX tag for files with only an Intel copyright on them. Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2017-12-19 15:49:01 +00:00
# SPDX-License-Identifier: BSD-3-Clause
# Copyright(c) 2010-2017 Intel Corporation
qat: add driver for QuickAssist devices This patch adds a PMD for the Intel Quick Assist Technology DH895xxC hardware accelerator. This patch depends on a QAT PF driver for device initialization. See the file docs/guides/cryptodevs/qat.rst for configuration details This patch supports a limited subset of QAT device functionality, currently supporting chaining of cipher and hash operations for the following algorithmsd: Cipher algorithms: - RTE_CRYPTO_CIPHER_AES_CBC (with 128-bit, 192-bit and 256-bit keys supported) Hash algorithms: - RTE_CRYPTO_AUTH_SHA1_HMAC - RTE_CRYPTO_AUTH_SHA256_HMAC - RTE_CRYPTO_AUTH_SHA512_HMAC - RTE_CRYPTO_AUTH_AES_XCBC_MAC Some limitation on this patchset which shall be contributed in a subsequent release: - Chained mbufs are not supported. - Hash only is not supported. - Cipher only is not supported. - Only in-place is currently supported (destination address is the same as source address). - Only supports session-oriented API implementation (session-less APIs are not supported). Signed-off-by: Declan Doherty <declan.doherty@intel.com> Signed-off-by: John Griffin <john.griffin@intel.com> Signed-off-by: Des O Dea <des.j.o.dea@intel.com> Signed-off-by: Fiona Trahe <fiona.trahe@intel.com> Acked-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
2015-11-25 13:25:14 +00:00
include $(RTE_SDK)/mk/rte.vars.mk
aesni_gcm: add driver for AES-GCM crypto operations This patch provides the implementation of an AES-NI accelerated crypto PMD which is dependent on Intel's multi-buffer library, see the white paper "Fast Multi-buffer IPsec Implementations on Intel® Architecture Processors" This PMD supports AES_GCM authenticated encryption and authenticated decryption using 128-bit AES keys The patch also contains the related unit tests functions Signed-off-by: Declan Doherty <declan.doherty@intel.com> Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com> Acked-by: John Griffin <john.griffin@intel.com>
2016-03-10 16:41:46 +00:00
DIRS-$(CONFIG_RTE_LIBRTE_PMD_AESNI_GCM) += aesni_gcm
aesni_mb: add driver for multi buffer based crypto This patch provides the initial implementation of the AES-NI multi-buffer based crypto poll mode driver using DPDK's new cryptodev framework. This PMD is dependent on Intel's multibuffer library, see the whitepaper "Fast Multi-buffer IPsec Implementations on Intel® Architecture Processors", see ref 1 for details on the library's design and ref 2 to download the library itself. This initial implementation is limited to supporting the chained operations of "hash then cipher" or "cipher then hash" for the following cipher and hash algorithms: Cipher algorithms: - RTE_CRYPTO_CIPHER_AES_CBC (with 128-bit, 192-bit and 256-bit keys supported) Authentication algorithms: - RTE_CRYPTO_AUTH_SHA1_HMAC - RTE_CRYPTO_AUTH_SHA256_HMAC - RTE_CRYPTO_AUTH_SHA512_HMAC - RTE_CRYPTO_AUTH_AES_XCBC_MAC Important Note: Due to the fact that the multi-buffer library is designed for accelerating IPsec crypto operation, the digest's generated for the HMAC functions are truncated to lengths specified by IPsec RFC's, ie RFC2404 for using HMAC-SHA-1 with IPsec specifies that the digest is truncate from 20 to 12 bytes. Build instructions: To build DPDK with the AESNI_MB_PMD the user is required to download (ref 2) and compile the multi-buffer library on there system before building DPDK. The environmental variable AESNI_MULTI_BUFFER_LIB_PATH must be exported with the path where you extracted and built the multi buffer library and finally set CONFIG_RTE_LIBRTE_PMD_AESNI_MB=y in config/common_linuxapp. Current status: It's doesn't support crypto operation across chained mbufs, or cipher only or hash only operations. ref 1: https://www-ssl.intel.com/content/www/us/en/intelligent-systems/intel-technology/fast-multi-buffer-ipsec-implementations-ia-processors-p ref 2: https://downloadcenter.intel.com/download/22972 Signed-off-by: Declan Doherty <declan.doherty@intel.com> Acked-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
2015-11-25 13:25:15 +00:00
DIRS-$(CONFIG_RTE_LIBRTE_PMD_AESNI_MB) += aesni_mb
crypto/armv8: add PMD optimized for ARMv8 processors This patch introduces crypto poll mode driver using ARMv8 cryptographic extensions. CPU compatibility with this driver is detected in run-time and virtual crypto device will not be created if CPU doesn't provide: AES, SHA1, SHA2 and NEON. This PMD is optimized to provide performance boost for chained crypto operations processing, such as encryption + HMAC generation, decryption + HMAC validation. In particular, cipher only or hash only operations are not provided. The driver currently supports AES-128-CBC in combination with: SHA256 HMAC and SHA1 HMAC and relies on the external armv8_crypto library: https://github.com/caviumnetworks/armv8_crypto Build ARMv8 crypto PMD if compiling for ARM64 and CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO option is enable in the configuration file. ARMV8_CRYPTO_LIB_PATH environment variable will point to the appropriate library directory. Signed-off-by: Zbigniew Bodek <zbigniew.bodek@caviumnetworks.com> Reviewed-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2017-01-18 21:01:54 +01:00
DIRS-$(CONFIG_RTE_LIBRTE_PMD_ARMV8_CRYPTO) += armv8
crypto/ccp: add AMD ccp skeleton PMD Added DPDK crypto PMD for AMD Cryptographic Co-Processors. This patch adds a basic skeleton for PMD. Signed-off-by: Ravi Kumar <ravi1.kumar@amd.com>
2018-03-19 08:23:35 -04:00
DIRS-$(CONFIG_RTE_LIBRTE_PMD_CCP) += ccp
crypto/octeontx: add PMD skeleton Adding OCTEON TX crypto PMD skeleton. Updating the maintainers files to claim responsibility. Also enabling driver by default by adding the component in common_base. Signed-off-by: Ankur Dwivedi <ankur.dwivedi@caviumnetworks.com> Signed-off-by: Anoob Joseph <anoob.joseph@caviumnetworks.com> Signed-off-by: Murthy NSSR <nidadavolu.murthy@caviumnetworks.com> Signed-off-by: Nithin Dabilpuram <nithin.dabilpuram@caviumnetworks.com> Signed-off-by: Ragothaman Jayaraman <rjayaraman@caviumnetworks.com> Signed-off-by: Srisivasubramanian S <ssrinivasan@caviumnetworks.com> Signed-off-by: Tejasree Kondoj <kondoj.tejasree@caviumnetworks.com>
2018-10-09 14:37:34 +05:30
DIRS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX_CRYPTO) += octeontx
crypto/openssl: rename libcrypto to openssl This patch replaces name "libcrypto" to "openssl" from file directories, symbol prefixes and sub-names connected with old name. Renamed poll mode driver files, test files, and documentations. It is done to better name association with library because the cryptography operations are using Openssl library crypto API. Fixes: d61f70b4c918 ("crypto/libcrypto: add driver for OpenSSL library") Signed-off-by: Slawomir Mrozowicz <slawomirx.mrozowicz@intel.com> Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-10-18 13:36:13 +02:00
DIRS-$(CONFIG_RTE_LIBRTE_PMD_OPENSSL) += openssl
crypto/scheduler: enable compilation Adds Makefile for scheduler cryptodev PMD, and updates existing Makefiles. Different than other cryptodev PMDs, scheduler PMD is required to be built as shared libraries. Adds scheduler PMD enable and debug flags to config/common_base. Signed-off-by: Fan Zhang <roy.fan.zhang@intel.com> Acked-by: Pablo de Lara <pablo.de.lara.guarch@intel.com>
2017-01-24 16:23:58 +00:00
DIRS-$(CONFIG_RTE_LIBRTE_PMD_CRYPTO_SCHEDULER) += scheduler
snow3g: add driver for SNOW 3G library Added new SW PMD which makes use of the libsso SW library, which provides wireless algorithms SNOW 3G UEA2 and UIA2 in software. This PMD supports cipher-only, hash-only and chained operations ("cipher then hash" and "hash then cipher") of the following algorithms: - RTE_CRYPTO_SYM_CIPHER_SNOW3G_UEA2 - RTE_CRYPTO_SYM_AUTH_SNOW3G_UIA2 The SNOW 3G hash and cipher algorithms, which are enabled by this crypto PMD are implemented by Intel's libsso software library. For library download and build instructions, see the documentation included (doc/guides/cryptodevs/snow3g.rst) The patch also contains the related unit tests function to test the PMD supported operations. Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com> Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-03-10 16:33:12 +00:00
DIRS-$(CONFIG_RTE_LIBRTE_PMD_SNOW3G) += snow3g
crypto/kasumi: add driver for KASUMI library Added new SW PMD which makes use of the libsso_kasumi SW library, which provides wireless algorithms KASUMI F8 and F9 in software. This PMD supports cipher-only, hash-only and chained operations ("cipher then hash" and "hash then cipher") of the following algorithms: - RTE_CRYPTO_SYM_CIPHER_KASUMI_F8 - RTE_CRYPTO_SYM_AUTH_KASUMI_F9 Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com> Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-06-20 15:40:04 +01:00
DIRS-$(CONFIG_RTE_LIBRTE_PMD_KASUMI) += kasumi
crypto/zuc: add driver for ZUC library Added new SW PMD which makes use of the libsso SW library, which provides wireless algorithms ZUC EEA3 and EIA3 in software. This PMD supports cipher-only, hash-only and chained operations ("cipher then hash" and "hash then cipher") of the following algorithms: - RTE_CRYPTO_SYM_CIPHER_ZUC_EEA3 - RTE_CRYPTO_SYM_AUTH_ZUC_EIA3 The ZUC hash and cipher algorithms, which are enabled by this crypto PMD are implemented by Intel's libsso software library. Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com> Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-09-29 03:59:47 +01:00
DIRS-$(CONFIG_RTE_LIBRTE_PMD_ZUC) += zuc
crypto/mrvl: rename PMD to mvsam Picking a company stock ticker for a PMD name might not be a best approach in a long run since name is too generic. This patch addresses that and renames mrvl to mvsam. Signed-off-by: Natalie Samsonov <nsamsono@marvell.com> Signed-off-by: Tomasz Duszynski <tdu@semihalf.com>
2018-05-08 10:14:04 +02:00
DIRS-$(CONFIG_RTE_LIBRTE_PMD_MVSAM_CRYPTO) += mvsam
null_crypto: add driver for null crypto operations This patch provides the implementation of a NULL crypto PMD, which supports NULL cipher and NULL authentication operations, which can be chained together as follows: - Authentication Only - Cipher Only - Authentication then Cipher - Cipher then Authentication As this is a NULL operation device the crypto operations which are submitted for processing are not actually modified and are stored in a queue pairs processed packets ring ready for collection when rte_cryptodev_burst_dequeue() is called. The patch also contains the related unit tests function to test the PMDs supported operations. Signed-off-by: Declan Doherty <declan.doherty@intel.com> Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-03-11 01:04:10 +00:00
DIRS-$(CONFIG_RTE_LIBRTE_PMD_NULL_CRYPTO) += null
drivers: fix build if security lib disabled RTE_SECURITY is enabled by default. If it is disabled, dpaa2_sec, dpaa_sec and caam_jr compilation fails. This patch fixes compilation by disabling these drivers when rte_security is not available. Fixes: 1ee9569576f6 ("config: enable dpaaX drivers for generic ARMv8") Fixes: 09e1e8d256b0 ("mk: fix dependencies of dpaaX drivers") Fixes: af7c9b5e9ce7 ("crypto/caam_jr: introduce basic driver") Cc: stable@dpdk.org Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
2018-10-23 13:47:06 +00:00
ifeq ($(CONFIG_RTE_LIBRTE_SECURITY),y)
mk: fix dependencies of dpaaX drivers This patch fixes the build dependency of various dpaaX components, when the dpaa or fslmc bus is disabled, or VFIO is disabled. Fixes: 1ee9569576f6 ("config: enable dpaaX drivers for generic ARMv8") Cc: stable@dpdk.org Reported-by: Yongseok Koh <yskoh@mellanox.com> Suggested-by: Thomas Monjalon <thomas@monjalon.net> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2018-02-23 15:28:03 +05:30
ifeq ($(CONFIG_RTE_EAL_VFIO)$(CONFIG_RTE_LIBRTE_FSLMC_BUS),yy)
crypto/dpaa2_sec: introduce poll mode driver Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com> Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
2017-04-20 11:14:16 +05:30
DIRS-$(CONFIG_RTE_LIBRTE_PMD_DPAA2_SEC) += dpaa2_sec
drivers: fix build if security lib disabled RTE_SECURITY is enabled by default. If it is disabled, dpaa2_sec, dpaa_sec and caam_jr compilation fails. This patch fixes compilation by disabling these drivers when rte_security is not available. Fixes: 1ee9569576f6 ("config: enable dpaaX drivers for generic ARMv8") Fixes: 09e1e8d256b0 ("mk: fix dependencies of dpaaX drivers") Fixes: af7c9b5e9ce7 ("crypto/caam_jr: introduce basic driver") Cc: stable@dpdk.org Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
2018-10-23 13:47:06 +00:00
endif # CONFIG_RTE_LIBRTE_FSLMC_BUS
mk: fix dependencies of dpaaX drivers This patch fixes the build dependency of various dpaaX components, when the dpaa or fslmc bus is disabled, or VFIO is disabled. Fixes: 1ee9569576f6 ("config: enable dpaaX drivers for generic ARMv8") Cc: stable@dpdk.org Reported-by: Yongseok Koh <yskoh@mellanox.com> Suggested-by: Thomas Monjalon <thomas@monjalon.net> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2018-02-23 15:28:03 +05:30
ifeq ($(CONFIG_RTE_LIBRTE_DPAA_BUS),y)
crypto/dpaa_sec: add crypto driver for NXP DPAA platform Signed-off-by: Forrest Shi <xuelin.shi@nxp.com> Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com> Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
2017-10-09 19:51:40 +05:30
DIRS-$(CONFIG_RTE_LIBRTE_PMD_DPAA_SEC) += dpaa_sec
drivers: fix build if security lib disabled RTE_SECURITY is enabled by default. If it is disabled, dpaa2_sec, dpaa_sec and caam_jr compilation fails. This patch fixes compilation by disabling these drivers when rte_security is not available. Fixes: 1ee9569576f6 ("config: enable dpaaX drivers for generic ARMv8") Fixes: 09e1e8d256b0 ("mk: fix dependencies of dpaaX drivers") Fixes: af7c9b5e9ce7 ("crypto/caam_jr: introduce basic driver") Cc: stable@dpdk.org Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
2018-10-23 13:47:06 +00:00
DIRS-$(CONFIG_RTE_LIBRTE_PMD_CAAM_JR) += caam_jr
endif # CONFIG_RTE_LIBRTE_PMD_DPAA_SEC
endif # CONFIG_RTE_LIBRTE_SECURITY
crypto/virtio: add virtio crypto PMD The virtio crypto device is a virtual cryptography device as well as a kind of virtual hardware accelerator for virtual machines. The linux kernel virtio-crypto driver has been merged, and this patch introduces virtio crypto PMD to achieve better performance. Signed-off-by: Jay Zhou <jianjay.zhou@huawei.com> Reviewed-by: Fan Zhang <roy.fan.zhang@intel.com>
2018-04-17 17:23:17 +08:00
DIRS-$(CONFIG_RTE_LIBRTE_PMD_VIRTIO_CRYPTO) += virtio
qat: add driver for QuickAssist devices This patch adds a PMD for the Intel Quick Assist Technology DH895xxC hardware accelerator. This patch depends on a QAT PF driver for device initialization. See the file docs/guides/cryptodevs/qat.rst for configuration details This patch supports a limited subset of QAT device functionality, currently supporting chaining of cipher and hash operations for the following algorithmsd: Cipher algorithms: - RTE_CRYPTO_CIPHER_AES_CBC (with 128-bit, 192-bit and 256-bit keys supported) Hash algorithms: - RTE_CRYPTO_AUTH_SHA1_HMAC - RTE_CRYPTO_AUTH_SHA256_HMAC - RTE_CRYPTO_AUTH_SHA512_HMAC - RTE_CRYPTO_AUTH_AES_XCBC_MAC Some limitation on this patchset which shall be contributed in a subsequent release: - Chained mbufs are not supported. - Hash only is not supported. - Cipher only is not supported. - Only in-place is currently supported (destination address is the same as source address). - Only supports session-oriented API implementation (session-less APIs are not supported). Signed-off-by: Declan Doherty <declan.doherty@intel.com> Signed-off-by: John Griffin <john.griffin@intel.com> Signed-off-by: Des O Dea <des.j.o.dea@intel.com> Signed-off-by: Fiona Trahe <fiona.trahe@intel.com> Acked-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
2015-11-25 13:25:14 +00:00
mk: replace the combined library with a linker script The physically linked-together combined library has been an increasing source of problems, as was predicted when library and symbol versioning was introduced. Replace the complex and fragile construction with a simple linker script which achieves the same without all the problems, remove the related kludges from eg mlx drivers. Since creating the linker script is practically zero cost, remove the config option and just create it always. Based on a patch by Sergio Gonzales Monroy, linker script approach initially suggested by Neil Horman. Suggested-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com> Suggested-by: Neil Horman <nhorman@tuxdriver.com> Signed-off-by: Panu Matilainen <pmatilai@redhat.com> Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2015-11-24 16:31:17 +02:00
include $(RTE_SDK)/mk/rte.subdir.mk
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