2017-12-19 15:48:59 +00:00
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2016-2017 Intel Corporation
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2017-01-25 16:27:33 +00:00
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*/
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#include <rte_malloc.h>
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#include <rte_cycles.h>
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#include <rte_crypto.h>
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#include <rte_cryptodev.h>
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#include "cperf_test_throughput.h"
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#include "cperf_ops.h"
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2017-10-04 03:46:06 +00:00
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#include "cperf_test_common.h"
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2017-01-25 16:27:33 +00:00
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struct cperf_throughput_ctx {
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uint8_t dev_id;
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uint16_t qp_id;
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uint8_t lcore_id;
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2017-10-04 03:46:13 +00:00
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struct rte_mempool *pool;
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2017-01-25 16:27:33 +00:00
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struct rte_cryptodev_sym_session *sess;
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cperf_populate_ops_t populate_ops;
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2017-10-04 03:46:13 +00:00
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uint32_t src_buf_offset;
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uint32_t dst_buf_offset;
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2017-01-25 16:27:33 +00:00
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const struct cperf_options *options;
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const struct cperf_test_vector *test_vector;
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};
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static void
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2017-10-04 03:46:06 +00:00
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cperf_throughput_test_free(struct cperf_throughput_ctx *ctx)
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2017-01-25 16:27:33 +00:00
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{
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2019-11-08 10:46:10 +00:00
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if (!ctx)
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return;
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if (ctx->sess) {
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2021-09-16 08:38:38 +00:00
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if (ctx->options->op_type == CPERF_ASYM_MODEX) {
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rte_cryptodev_asym_session_clear(ctx->dev_id,
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(void *)ctx->sess);
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rte_cryptodev_asym_session_free((void *)ctx->sess);
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}
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2020-10-15 15:05:54 +00:00
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#ifdef RTE_LIB_SECURITY
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2021-09-16 08:38:38 +00:00
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else if (ctx->options->op_type == CPERF_PDCP ||
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app/crypto-perf: support lookaside IPsec
Added support for lookaside IPsec protocol offload.
Supported cases:
-AEAD
-Cipher+auth
Command used for testing:
./dpdk-test-crypto-perf -c 0xf -- --devtype crypto_octeontx2 --ptest
throughput --optype ipsec --cipher-algo aes-cbc --pool-sz 16384
--cipher-op encrypt --cipher-key-sz 16 --cipher-iv-sz 16 --auth-algo
sha1-hmac --auth-op generate --digest-sz 16 --total-ops 10000000
--burst-sz 32 --buffer-sz 64,128,256,512,1024,1280,2048
./dpdk-test-crypto-perf -c 0xf -- --devtype crypto_octeontx2 --ptest
throughput --optype ipsec --aead-algo aes-gcm --pool-sz 16384
--aead-op encrypt --aead-key-sz 32 --aead-iv-sz 12 --aead-aad-sz 16
--digest-sz 16 --total-ops 10000000 --burst-sz 32
--buffer-sz 64,128,256,512,1024,1280,2048
Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
2021-10-12 10:07:19 +00:00
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ctx->options->op_type == CPERF_DOCSIS ||
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ctx->options->op_type == CPERF_IPSEC) {
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2019-11-08 10:46:10 +00:00
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struct rte_security_ctx *sec_ctx =
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(struct rte_security_ctx *)
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2021-09-16 08:38:38 +00:00
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rte_cryptodev_get_sec_ctx(ctx->dev_id);
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rte_security_session_destroy(
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sec_ctx,
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2019-11-08 10:46:10 +00:00
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(struct rte_security_session *)ctx->sess);
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2021-09-16 08:38:38 +00:00
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}
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2019-11-08 10:46:10 +00:00
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#endif
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2021-09-16 08:38:38 +00:00
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else {
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2017-07-05 05:26:17 +00:00
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rte_cryptodev_sym_session_clear(ctx->dev_id, ctx->sess);
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rte_cryptodev_sym_session_free(ctx->sess);
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}
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2017-01-25 16:27:33 +00:00
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}
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2019-11-08 10:46:10 +00:00
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if (ctx->pool)
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rte_mempool_free(ctx->pool);
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rte_free(ctx);
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2017-01-25 16:27:33 +00:00
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}
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void *
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2017-07-05 05:26:17 +00:00
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cperf_throughput_test_constructor(struct rte_mempool *sess_mp,
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2019-01-10 14:50:13 +00:00
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struct rte_mempool *sess_priv_mp,
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2017-07-05 05:26:17 +00:00
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uint8_t dev_id, uint16_t qp_id,
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2017-01-25 16:27:33 +00:00
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const struct cperf_options *options,
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const struct cperf_test_vector *test_vector,
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const struct cperf_op_fns *op_fns)
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{
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struct cperf_throughput_ctx *ctx = NULL;
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ctx = rte_malloc(NULL, sizeof(struct cperf_throughput_ctx), 0);
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if (ctx == NULL)
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goto err;
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ctx->dev_id = dev_id;
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ctx->qp_id = qp_id;
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ctx->populate_ops = op_fns->populate_ops;
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ctx->options = options;
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ctx->test_vector = test_vector;
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2017-10-04 03:46:06 +00:00
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/* IV goes at the end of the crypto operation */
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2017-07-02 05:41:14 +00:00
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uint16_t iv_offset = sizeof(struct rte_crypto_op) +
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sizeof(struct rte_crypto_sym_op);
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2019-01-10 14:50:13 +00:00
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ctx->sess = op_fns->sess_create(sess_mp, sess_priv_mp, dev_id, options,
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test_vector, iv_offset);
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2017-01-25 16:27:33 +00:00
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if (ctx->sess == NULL)
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goto err;
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2017-10-04 03:46:12 +00:00
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if (cperf_alloc_common_memory(options, test_vector, dev_id, qp_id, 0,
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2017-10-04 03:46:13 +00:00
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&ctx->src_buf_offset, &ctx->dst_buf_offset,
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&ctx->pool) < 0)
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2017-01-25 16:27:33 +00:00
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goto err;
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return ctx;
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err:
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2017-10-04 03:46:06 +00:00
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cperf_throughput_test_free(ctx);
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2017-01-25 16:27:33 +00:00
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return NULL;
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}
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int
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cperf_throughput_test_runner(void *test_ctx)
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{
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struct cperf_throughput_ctx *ctx = test_ctx;
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2017-03-27 11:26:04 +00:00
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uint16_t test_burst_size;
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uint8_t burst_size_idx = 0;
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2017-12-13 13:14:08 +00:00
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uint32_t imix_idx = 0;
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2017-01-25 16:27:33 +00:00
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2019-06-14 22:28:35 +00:00
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static rte_atomic16_t display_once = RTE_ATOMIC16_INIT(0);
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2017-01-25 16:27:33 +00:00
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2017-03-27 11:26:04 +00:00
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struct rte_crypto_op *ops[ctx->options->max_burst_size];
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struct rte_crypto_op *ops_processed[ctx->options->max_burst_size];
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2017-03-27 11:26:03 +00:00
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uint64_t i;
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2017-01-25 16:27:33 +00:00
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uint32_t lcore = rte_lcore_id();
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#ifdef CPERF_LINEARIZATION_ENABLE
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struct rte_cryptodev_info dev_info;
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int linearize = 0;
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/* Check if source mbufs require coalescing */
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2021-09-16 08:38:38 +00:00
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if ((ctx->options->op_type != CPERF_ASYM_MODEX) &&
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(ctx->options->segment_sz < ctx->options->max_buffer_size)) {
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2017-01-25 16:27:33 +00:00
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rte_cryptodev_info_get(ctx->dev_id, &dev_info);
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if ((dev_info.feature_flags &
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RTE_CRYPTODEV_FF_MBUF_SCATTER_GATHER) == 0)
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linearize = 1;
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}
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#endif /* CPERF_LINEARIZATION_ENABLE */
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ctx->lcore_id = lcore;
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/* Warm up the host CPU before starting the test */
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for (i = 0; i < ctx->options->total_ops; i++)
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rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id, NULL, 0);
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2017-03-27 11:26:04 +00:00
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/* Get first size from range or list */
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if (ctx->options->inc_burst_size != 0)
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test_burst_size = ctx->options->min_burst_size;
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else
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test_burst_size = ctx->options->burst_size_list[0];
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2017-01-25 16:27:33 +00:00
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2017-07-02 05:41:10 +00:00
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uint16_t iv_offset = sizeof(struct rte_crypto_op) +
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sizeof(struct rte_crypto_sym_op);
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2017-03-27 11:26:04 +00:00
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while (test_burst_size <= ctx->options->max_burst_size) {
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uint64_t ops_enqd = 0, ops_enqd_total = 0, ops_enqd_failed = 0;
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uint64_t ops_deqd = 0, ops_deqd_total = 0, ops_deqd_failed = 0;
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2017-10-04 03:46:13 +00:00
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uint64_t tsc_start, tsc_end, tsc_duration;
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2017-01-25 16:27:33 +00:00
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2017-03-27 11:26:03 +00:00
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uint16_t ops_unused = 0;
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2017-03-27 11:26:04 +00:00
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tsc_start = rte_rdtsc_precise();
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while (ops_enqd_total < ctx->options->total_ops) {
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uint16_t burst_size = ((ops_enqd_total + test_burst_size)
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<= ctx->options->total_ops) ?
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test_burst_size :
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ctx->options->total_ops -
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ops_enqd_total;
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2017-01-25 16:27:33 +00:00
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2017-03-27 11:26:04 +00:00
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uint16_t ops_needed = burst_size - ops_unused;
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2017-01-25 16:27:33 +00:00
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2017-10-04 03:46:13 +00:00
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/* Allocate objects containing crypto operations and mbufs */
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if (rte_mempool_get_bulk(ctx->pool, (void **)ops,
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ops_needed) != 0) {
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2017-07-28 02:15:21 +00:00
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RTE_LOG(ERR, USER1,
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"Failed to allocate more crypto operations "
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2017-12-15 12:34:29 +00:00
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"from the crypto operation pool.\n"
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2017-07-28 02:15:21 +00:00
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"Consider increasing the pool size "
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"with --pool-sz\n");
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2017-03-27 11:26:04 +00:00
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return -1;
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2017-07-28 02:15:21 +00:00
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}
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2017-01-25 16:27:33 +00:00
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2017-03-27 11:26:04 +00:00
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/* Setup crypto op, attach mbuf etc */
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2017-10-04 03:46:13 +00:00
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(ctx->populate_ops)(ops, ctx->src_buf_offset,
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ctx->dst_buf_offset,
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ops_needed, ctx->sess,
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ctx->options, ctx->test_vector,
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app/crypto-perf: support lookaside IPsec
Added support for lookaside IPsec protocol offload.
Supported cases:
-AEAD
-Cipher+auth
Command used for testing:
./dpdk-test-crypto-perf -c 0xf -- --devtype crypto_octeontx2 --ptest
throughput --optype ipsec --cipher-algo aes-cbc --pool-sz 16384
--cipher-op encrypt --cipher-key-sz 16 --cipher-iv-sz 16 --auth-algo
sha1-hmac --auth-op generate --digest-sz 16 --total-ops 10000000
--burst-sz 32 --buffer-sz 64,128,256,512,1024,1280,2048
./dpdk-test-crypto-perf -c 0xf -- --devtype crypto_octeontx2 --ptest
throughput --optype ipsec --aead-algo aes-gcm --pool-sz 16384
--aead-op encrypt --aead-key-sz 32 --aead-iv-sz 12 --aead-aad-sz 16
--digest-sz 16 --total-ops 10000000 --burst-sz 32
--buffer-sz 64,128,256,512,1024,1280,2048
Signed-off-by: Akhil Goyal <gakhil@marvell.com>
Signed-off-by: Archana Muniganti <marchana@marvell.com>
2021-10-12 10:07:19 +00:00
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iv_offset, &imix_idx, &tsc_start);
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2017-01-25 16:27:33 +00:00
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2017-04-18 14:48:31 +00:00
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/**
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* When ops_needed is smaller than ops_enqd, the
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* unused ops need to be moved to the front for
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* next round use.
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*/
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if (unlikely(ops_enqd > ops_needed)) {
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size_t nb_b_to_mov = ops_unused * sizeof(
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struct rte_crypto_op *);
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memmove(&ops[ops_needed], &ops[ops_enqd],
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nb_b_to_mov);
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}
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2017-01-25 16:27:33 +00:00
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#ifdef CPERF_LINEARIZATION_ENABLE
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2017-03-27 11:26:04 +00:00
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if (linearize) {
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/* PMD doesn't support scatter-gather and source buffer
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* is segmented.
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* We need to linearize it before enqueuing.
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*/
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for (i = 0; i < burst_size; i++)
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2021-09-16 08:38:38 +00:00
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rte_pktmbuf_linearize(
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ops[i]->sym->m_src);
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2017-03-27 11:26:04 +00:00
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}
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2017-01-25 16:27:33 +00:00
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#endif /* CPERF_LINEARIZATION_ENABLE */
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2017-03-27 11:26:04 +00:00
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/* Enqueue burst of ops on crypto device */
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ops_enqd = rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id,
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ops, burst_size);
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if (ops_enqd < burst_size)
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ops_enqd_failed++;
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2017-01-25 16:27:33 +00:00
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/**
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2017-03-27 11:26:04 +00:00
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* Calculate number of ops not enqueued (mainly for hw
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* accelerators whose ingress queue can fill up).
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2017-01-25 16:27:33 +00:00
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*/
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2017-03-27 11:26:04 +00:00
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ops_unused = burst_size - ops_enqd;
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ops_enqd_total += ops_enqd;
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/* Dequeue processed burst of ops from crypto device */
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ops_deqd = rte_cryptodev_dequeue_burst(ctx->dev_id, ctx->qp_id,
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ops_processed, test_burst_size);
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if (likely(ops_deqd)) {
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2017-10-04 03:46:13 +00:00
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/* Free crypto ops so they can be reused. */
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rte_mempool_put_bulk(ctx->pool,
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2017-06-30 07:56:58 +00:00
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(void **)ops_processed, ops_deqd);
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2017-03-27 11:26:04 +00:00
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ops_deqd_total += ops_deqd;
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} else {
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/**
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* Count dequeue polls which didn't return any
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* processed operations. This statistic is mainly
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* relevant to hw accelerators.
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*/
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ops_deqd_failed++;
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}
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2017-01-25 16:27:33 +00:00
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}
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2017-03-27 11:26:04 +00:00
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/* Dequeue any operations still in the crypto device */
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2017-01-25 16:27:33 +00:00
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2017-03-27 11:26:04 +00:00
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while (ops_deqd_total < ctx->options->total_ops) {
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/* Sending 0 length burst to flush sw crypto device */
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rte_cryptodev_enqueue_burst(ctx->dev_id, ctx->qp_id, NULL, 0);
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2017-01-25 16:27:33 +00:00
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2017-03-27 11:26:04 +00:00
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/* dequeue burst */
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ops_deqd = rte_cryptodev_dequeue_burst(ctx->dev_id, ctx->qp_id,
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ops_processed, test_burst_size);
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if (ops_deqd == 0)
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ops_deqd_failed++;
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else {
|
2017-10-04 03:46:13 +00:00
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rte_mempool_put_bulk(ctx->pool,
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2017-06-30 07:56:58 +00:00
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(void **)ops_processed, ops_deqd);
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2017-03-27 11:26:04 +00:00
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ops_deqd_total += ops_deqd;
|
|
|
|
}
|
|
|
|
}
|
2017-01-25 16:27:33 +00:00
|
|
|
|
2017-03-27 11:26:04 +00:00
|
|
|
tsc_end = rte_rdtsc_precise();
|
|
|
|
tsc_duration = (tsc_end - tsc_start);
|
|
|
|
|
|
|
|
/* Calculate average operations processed per second */
|
|
|
|
double ops_per_second = ((double)ctx->options->total_ops /
|
|
|
|
tsc_duration) * rte_get_tsc_hz();
|
|
|
|
|
|
|
|
/* Calculate average throughput (Gbps) in bits per second */
|
|
|
|
double throughput_gbps = ((ops_per_second *
|
|
|
|
ctx->options->test_buffer_size * 8) / 1000000000);
|
|
|
|
|
|
|
|
/* Calculate average cycles per packet */
|
|
|
|
double cycles_per_packet = ((double)tsc_duration /
|
|
|
|
ctx->options->total_ops);
|
|
|
|
|
|
|
|
if (!ctx->options->csv) {
|
2019-06-14 22:28:35 +00:00
|
|
|
if (rte_atomic16_test_and_set(&display_once))
|
2017-03-27 11:26:04 +00:00
|
|
|
printf("%12s%12s%12s%12s%12s%12s%12s%12s%12s%12s\n\n",
|
|
|
|
"lcore id", "Buf Size", "Burst Size",
|
|
|
|
"Enqueued", "Dequeued", "Failed Enq",
|
|
|
|
"Failed Deq", "MOps", "Gbps",
|
|
|
|
"Cycles/Buf");
|
|
|
|
|
|
|
|
printf("%12u%12u%12u%12"PRIu64"%12"PRIu64"%12"PRIu64
|
|
|
|
"%12"PRIu64"%12.4f%12.4f%12.2f\n",
|
|
|
|
ctx->lcore_id,
|
|
|
|
ctx->options->test_buffer_size,
|
|
|
|
test_burst_size,
|
|
|
|
ops_enqd_total,
|
|
|
|
ops_deqd_total,
|
|
|
|
ops_enqd_failed,
|
|
|
|
ops_deqd_failed,
|
|
|
|
ops_per_second/1000000,
|
|
|
|
throughput_gbps,
|
|
|
|
cycles_per_packet);
|
|
|
|
} else {
|
2019-06-14 22:28:35 +00:00
|
|
|
if (rte_atomic16_test_and_set(&display_once))
|
2017-07-27 23:33:13 +00:00
|
|
|
printf("#lcore id,Buffer Size(B),"
|
2017-03-27 11:26:04 +00:00
|
|
|
"Burst Size,Enqueued,Dequeued,Failed Enq,"
|
|
|
|
"Failed Deq,Ops(Millions),Throughput(Gbps),"
|
|
|
|
"Cycles/Buf\n\n");
|
|
|
|
|
2021-01-20 17:29:29 +00:00
|
|
|
printf("%u,%u,%u,%"PRIu64",%"PRIu64",%"PRIu64",%"PRIu64","
|
|
|
|
"%.3f,%.3f,%.3f\n",
|
2017-03-27 11:26:04 +00:00
|
|
|
ctx->lcore_id,
|
|
|
|
ctx->options->test_buffer_size,
|
|
|
|
test_burst_size,
|
|
|
|
ops_enqd_total,
|
|
|
|
ops_deqd_total,
|
|
|
|
ops_enqd_failed,
|
|
|
|
ops_deqd_failed,
|
|
|
|
ops_per_second/1000000,
|
|
|
|
throughput_gbps,
|
|
|
|
cycles_per_packet);
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get next size from range or list */
|
|
|
|
if (ctx->options->inc_burst_size != 0)
|
|
|
|
test_burst_size += ctx->options->inc_burst_size;
|
|
|
|
else {
|
|
|
|
if (++burst_size_idx == ctx->options->burst_size_count)
|
|
|
|
break;
|
|
|
|
test_burst_size = ctx->options->burst_size_list[burst_size_idx];
|
2017-01-25 16:27:33 +00:00
|
|
|
}
|
|
|
|
|
2017-03-27 11:26:03 +00:00
|
|
|
}
|
2017-01-25 16:27:33 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
void
|
|
|
|
cperf_throughput_test_destructor(void *arg)
|
|
|
|
{
|
|
|
|
struct cperf_throughput_ctx *ctx = arg;
|
|
|
|
|
|
|
|
if (ctx == NULL)
|
|
|
|
return;
|
|
|
|
|
2017-10-04 03:46:06 +00:00
|
|
|
cperf_throughput_test_free(ctx);
|
2017-01-25 16:27:33 +00:00
|
|
|
}
|