2017-07-04 10:24:03 +00:00
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/*-
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* BSD LICENSE
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*
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* Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
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* Copyright(c) 2017, Linaro Limited
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __L3FWD_LPM_NEON_H__
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#define __L3FWD_LPM_NEON_H__
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#include <arm_neon.h>
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#include "l3fwd_neon.h"
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/*
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* Read packet_type and destination IPV4 addresses from 4 mbufs.
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*/
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static inline void
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processx4_step1(struct rte_mbuf *pkt[FWDSTEP],
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int32x4_t *dip,
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uint32_t *ipv4_flag)
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{
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struct ipv4_hdr *ipv4_hdr;
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struct ether_hdr *eth_hdr;
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int32_t dst[FWDSTEP];
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eth_hdr = rte_pktmbuf_mtod(pkt[0], struct ether_hdr *);
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ipv4_hdr = (struct ipv4_hdr *)(eth_hdr + 1);
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dst[0] = ipv4_hdr->dst_addr;
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ipv4_flag[0] = pkt[0]->packet_type & RTE_PTYPE_L3_IPV4;
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eth_hdr = rte_pktmbuf_mtod(pkt[1], struct ether_hdr *);
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ipv4_hdr = (struct ipv4_hdr *)(eth_hdr + 1);
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dst[1] = ipv4_hdr->dst_addr;
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ipv4_flag[0] &= pkt[1]->packet_type;
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eth_hdr = rte_pktmbuf_mtod(pkt[2], struct ether_hdr *);
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ipv4_hdr = (struct ipv4_hdr *)(eth_hdr + 1);
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dst[2] = ipv4_hdr->dst_addr;
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ipv4_flag[0] &= pkt[2]->packet_type;
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eth_hdr = rte_pktmbuf_mtod(pkt[3], struct ether_hdr *);
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ipv4_hdr = (struct ipv4_hdr *)(eth_hdr + 1);
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dst[3] = ipv4_hdr->dst_addr;
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ipv4_flag[0] &= pkt[3]->packet_type;
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dip[0] = vld1q_s32(dst);
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}
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/*
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* Lookup into LPM for destination port.
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* If lookup fails, use incoming port (portid) as destination port.
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*/
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static inline void
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processx4_step2(const struct lcore_conf *qconf,
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int32x4_t dip,
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uint32_t ipv4_flag,
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2017-09-29 07:17:24 +00:00
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uint16_t portid,
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2017-07-04 10:24:03 +00:00
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struct rte_mbuf *pkt[FWDSTEP],
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uint16_t dprt[FWDSTEP])
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{
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rte_xmm_t dst;
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dip = vreinterpretq_s32_u8(vrev32q_u8(vreinterpretq_u8_s32(dip)));
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/* if all 4 packets are IPV4. */
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if (likely(ipv4_flag)) {
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rte_lpm_lookupx4(qconf->ipv4_lookup_struct, dip, dst.u32,
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portid);
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/* get rid of unused upper 16 bit for each dport. */
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vst1_s16((int16_t *)dprt, vqmovn_s32(dst.x));
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} else {
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dst.x = dip;
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dprt[0] = lpm_get_dst_port_with_ipv4(qconf, pkt[0],
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dst.u32[0], portid);
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dprt[1] = lpm_get_dst_port_with_ipv4(qconf, pkt[1],
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dst.u32[1], portid);
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dprt[2] = lpm_get_dst_port_with_ipv4(qconf, pkt[2],
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dst.u32[2], portid);
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dprt[3] = lpm_get_dst_port_with_ipv4(qconf, pkt[3],
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dst.u32[3], portid);
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}
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}
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/*
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* Buffer optimized handling of packets, invoked
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* from main_loop.
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*/
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static inline void
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l3fwd_lpm_send_packets(int nb_rx, struct rte_mbuf **pkts_burst,
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2017-09-29 07:17:24 +00:00
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uint16_t portid, struct lcore_conf *qconf)
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2017-07-04 10:24:03 +00:00
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{
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int32_t i = 0, j = 0;
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uint16_t dst_port[MAX_PKT_BURST];
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int32x4_t dip;
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uint32_t ipv4_flag;
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const int32_t k = RTE_ALIGN_FLOOR(nb_rx, FWDSTEP);
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const int32_t m = nb_rx % FWDSTEP;
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if (k) {
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for (i = 0; i < FWDSTEP; i++) {
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rte_prefetch0(rte_pktmbuf_mtod(pkts_burst[i],
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struct ether_hdr *) + 1);
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}
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for (j = 0; j != k - FWDSTEP; j += FWDSTEP) {
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for (i = 0; i < FWDSTEP; i++) {
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rte_prefetch0(rte_pktmbuf_mtod(
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pkts_burst[j + i + FWDSTEP],
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struct ether_hdr *) + 1);
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}
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processx4_step1(&pkts_burst[j], &dip, &ipv4_flag);
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processx4_step2(qconf, dip, ipv4_flag, portid,
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&pkts_burst[j], &dst_port[j]);
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}
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processx4_step1(&pkts_burst[j], &dip, &ipv4_flag);
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processx4_step2(qconf, dip, ipv4_flag, portid, &pkts_burst[j],
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&dst_port[j]);
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j += FWDSTEP;
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}
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if (m) {
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/* Prefetch last up to 3 packets one by one */
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switch (m) {
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case 3:
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rte_prefetch0(rte_pktmbuf_mtod(pkts_burst[j],
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struct ether_hdr *) + 1);
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j++;
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/* fallthrough */
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case 2:
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rte_prefetch0(rte_pktmbuf_mtod(pkts_burst[j],
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struct ether_hdr *) + 1);
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j++;
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/* fallthrough */
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case 1:
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rte_prefetch0(rte_pktmbuf_mtod(pkts_burst[j],
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struct ether_hdr *) + 1);
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j++;
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}
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j -= m;
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/* Classify last up to 3 packets one by one */
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switch (m) {
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case 3:
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dst_port[j] = lpm_get_dst_port(qconf, pkts_burst[j],
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portid);
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j++;
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/* fallthrough */
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case 2:
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dst_port[j] = lpm_get_dst_port(qconf, pkts_burst[j],
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portid);
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j++;
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/* fallthrough */
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case 1:
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dst_port[j] = lpm_get_dst_port(qconf, pkts_burst[j],
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portid);
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}
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}
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send_packets_multi(qconf, pkts_burst, dst_port, nb_rx);
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}
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#endif /* __L3FWD_LPM_NEON_H__ */
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