424 lines
13 KiB
C
424 lines
13 KiB
C
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/*-
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* BSD LICENSE
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*
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* Copyright(c) 2010-2014 Intel Corporation. All rights reserved.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "acl_run.h"
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#include "acl_vect.h"
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enum {
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SHUFFLE32_SLOT1 = 0xe5,
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SHUFFLE32_SLOT2 = 0xe6,
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SHUFFLE32_SLOT3 = 0xe7,
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SHUFFLE32_SWAP64 = 0x4e,
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};
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static const rte_xmm_t xmm_shuffle_input = {
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.u32 = {0x00000000, 0x04040404, 0x08080808, 0x0c0c0c0c},
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};
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static const rte_xmm_t xmm_ones_16 = {
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.u16 = {1, 1, 1, 1, 1, 1, 1, 1},
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};
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static const rte_xmm_t xmm_match_mask = {
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.u32 = {
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RTE_ACL_NODE_MATCH,
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RTE_ACL_NODE_MATCH,
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RTE_ACL_NODE_MATCH,
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RTE_ACL_NODE_MATCH,
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},
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};
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static const rte_xmm_t xmm_index_mask = {
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.u32 = {
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RTE_ACL_NODE_INDEX,
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RTE_ACL_NODE_INDEX,
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RTE_ACL_NODE_INDEX,
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RTE_ACL_NODE_INDEX,
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},
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};
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/*
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* Resolve priority for multiple results (sse version).
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* This consists comparing the priority of the current traversal with the
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* running set of results for the packet.
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* For each result, keep a running array of the result (rule number) and
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* its priority for each category.
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*/
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static inline void
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resolve_priority_sse(uint64_t transition, int n, const struct rte_acl_ctx *ctx,
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struct parms *parms, const struct rte_acl_match_results *p,
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uint32_t categories)
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{
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uint32_t x;
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xmm_t results, priority, results1, priority1, selector;
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xmm_t *saved_results, *saved_priority;
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for (x = 0; x < categories; x += RTE_ACL_RESULTS_MULTIPLIER) {
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saved_results = (xmm_t *)(&parms[n].cmplt->results[x]);
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saved_priority =
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(xmm_t *)(&parms[n].cmplt->priority[x]);
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/* get results and priorities for completed trie */
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results = MM_LOADU((const xmm_t *)&p[transition].results[x]);
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priority = MM_LOADU((const xmm_t *)&p[transition].priority[x]);
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/* if this is not the first completed trie */
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if (parms[n].cmplt->count != ctx->num_tries) {
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/* get running best results and their priorities */
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results1 = MM_LOADU(saved_results);
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priority1 = MM_LOADU(saved_priority);
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/* select results that are highest priority */
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selector = MM_CMPGT32(priority1, priority);
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results = MM_BLENDV8(results, results1, selector);
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priority = MM_BLENDV8(priority, priority1, selector);
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}
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/* save running best results and their priorities */
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MM_STOREU(saved_results, results);
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MM_STOREU(saved_priority, priority);
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}
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}
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/*
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* Extract transitions from an XMM register and check for any matches
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*/
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static void
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acl_process_matches(xmm_t *indices, int slot, const struct rte_acl_ctx *ctx,
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struct parms *parms, struct acl_flow_data *flows)
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{
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uint64_t transition1, transition2;
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/* extract transition from low 64 bits. */
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transition1 = MM_CVT64(*indices);
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/* extract transition from high 64 bits. */
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*indices = MM_SHUFFLE32(*indices, SHUFFLE32_SWAP64);
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transition2 = MM_CVT64(*indices);
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transition1 = acl_match_check(transition1, slot, ctx,
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parms, flows, resolve_priority_sse);
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transition2 = acl_match_check(transition2, slot + 1, ctx,
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parms, flows, resolve_priority_sse);
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/* update indices with new transitions. */
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*indices = MM_SET64(transition2, transition1);
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}
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/*
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* Check for any match in 4 transitions (contained in 2 SSE registers)
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*/
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static inline __attribute__((always_inline)) void
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acl_match_check_x4(int slot, const struct rte_acl_ctx *ctx, struct parms *parms,
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struct acl_flow_data *flows, xmm_t *indices1, xmm_t *indices2,
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xmm_t match_mask)
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{
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xmm_t temp;
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/* put low 32 bits of each transition into one register */
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temp = (xmm_t)MM_SHUFFLEPS((__m128)*indices1, (__m128)*indices2,
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0x88);
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/* test for match node */
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temp = MM_AND(match_mask, temp);
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while (!MM_TESTZ(temp, temp)) {
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acl_process_matches(indices1, slot, ctx, parms, flows);
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acl_process_matches(indices2, slot + 2, ctx, parms, flows);
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temp = (xmm_t)MM_SHUFFLEPS((__m128)*indices1,
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(__m128)*indices2,
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0x88);
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temp = MM_AND(match_mask, temp);
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}
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}
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/*
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* Calculate the address of the next transition for
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* all types of nodes. Note that only DFA nodes and range
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* nodes actually transition to another node. Match
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* nodes don't move.
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*/
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static inline __attribute__((always_inline)) xmm_t
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calc_addr_sse(xmm_t index_mask, xmm_t next_input, xmm_t shuffle_input,
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xmm_t ones_16, xmm_t indices1, xmm_t indices2)
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{
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xmm_t addr, node_types, range, temp;
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xmm_t dfa_msk, dfa_ofs, quad_ofs;
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xmm_t in, r, t;
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const xmm_t range_base = _mm_set_epi32(0xffffff0c, 0xffffff08,
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0xffffff04, 0xffffff00);
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/*
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* Note that no transition is done for a match
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* node and therefore a stream freezes when
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* it reaches a match.
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*/
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/* Shuffle low 32 into temp and high 32 into indices2 */
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temp = (xmm_t)MM_SHUFFLEPS((__m128)indices1, (__m128)indices2, 0x88);
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range = (xmm_t)MM_SHUFFLEPS((__m128)indices1, (__m128)indices2, 0xdd);
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t = MM_XOR(index_mask, index_mask);
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/* shuffle input byte to all 4 positions of 32 bit value */
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in = MM_SHUFFLE8(next_input, shuffle_input);
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/* Calc node type and node addr */
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node_types = MM_ANDNOT(index_mask, temp);
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addr = MM_AND(index_mask, temp);
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/*
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* Calc addr for DFAs - addr = dfa_index + input_byte
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*/
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/* mask for DFA type (0) nodes */
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dfa_msk = MM_CMPEQ32(node_types, t);
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r = _mm_srli_epi32(in, 30);
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r = _mm_add_epi8(r, range_base);
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t = _mm_srli_epi32(in, 24);
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r = _mm_shuffle_epi8(range, r);
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dfa_ofs = _mm_sub_epi32(t, r);
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/*
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* Calculate number of range boundaries that are less than the
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* input value. Range boundaries for each node are in signed 8 bit,
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* ordered from -128 to 127 in the indices2 register.
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* This is effectively a popcnt of bytes that are greater than the
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* input byte.
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*/
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/* check ranges */
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temp = MM_CMPGT8(in, range);
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/* convert -1 to 1 (bytes greater than input byte */
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temp = MM_SIGN8(temp, temp);
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/* horizontal add pairs of bytes into words */
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temp = MM_MADD8(temp, temp);
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/* horizontal add pairs of words into dwords */
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quad_ofs = MM_MADD16(temp, ones_16);
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/* mask to range type nodes */
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temp = _mm_blendv_epi8(quad_ofs, dfa_ofs, dfa_msk);
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/* add index into node position */
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return MM_ADD32(addr, temp);
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}
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/*
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* Process 4 transitions (in 2 SIMD registers) in parallel
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*/
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static inline __attribute__((always_inline)) xmm_t
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transition4(xmm_t next_input, const uint64_t *trans,
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xmm_t *indices1, xmm_t *indices2)
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{
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xmm_t addr;
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uint64_t trans0, trans2;
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/* Calculate the address (array index) for all 4 transitions. */
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addr = calc_addr_sse(xmm_index_mask.x, next_input, xmm_shuffle_input.x,
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xmm_ones_16.x, *indices1, *indices2);
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/* Gather 64 bit transitions and pack back into 2 registers. */
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trans0 = trans[MM_CVT32(addr)];
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/* get slot 2 */
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/* {x0, x1, x2, x3} -> {x2, x1, x2, x3} */
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addr = MM_SHUFFLE32(addr, SHUFFLE32_SLOT2);
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trans2 = trans[MM_CVT32(addr)];
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/* get slot 1 */
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/* {x2, x1, x2, x3} -> {x1, x1, x2, x3} */
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addr = MM_SHUFFLE32(addr, SHUFFLE32_SLOT1);
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*indices1 = MM_SET64(trans[MM_CVT32(addr)], trans0);
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/* get slot 3 */
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/* {x1, x1, x2, x3} -> {x3, x1, x2, x3} */
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addr = MM_SHUFFLE32(addr, SHUFFLE32_SLOT3);
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*indices2 = MM_SET64(trans[MM_CVT32(addr)], trans2);
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return MM_SRL32(next_input, CHAR_BIT);
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}
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/*
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* Execute trie traversal with 8 traversals in parallel
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*/
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static inline int
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search_sse_8(const struct rte_acl_ctx *ctx, const uint8_t **data,
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uint32_t *results, uint32_t total_packets, uint32_t categories)
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{
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int n;
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struct acl_flow_data flows;
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uint64_t index_array[MAX_SEARCHES_SSE8];
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struct completion cmplt[MAX_SEARCHES_SSE8];
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struct parms parms[MAX_SEARCHES_SSE8];
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xmm_t input0, input1;
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xmm_t indices1, indices2, indices3, indices4;
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acl_set_flow(&flows, cmplt, RTE_DIM(cmplt), data, results,
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total_packets, categories, ctx->trans_table);
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for (n = 0; n < MAX_SEARCHES_SSE8; n++) {
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cmplt[n].count = 0;
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index_array[n] = acl_start_next_trie(&flows, parms, n, ctx);
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}
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/*
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* indices1 contains index_array[0,1]
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* indices2 contains index_array[2,3]
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* indices3 contains index_array[4,5]
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* indices4 contains index_array[6,7]
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*/
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indices1 = MM_LOADU((xmm_t *) &index_array[0]);
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indices2 = MM_LOADU((xmm_t *) &index_array[2]);
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indices3 = MM_LOADU((xmm_t *) &index_array[4]);
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indices4 = MM_LOADU((xmm_t *) &index_array[6]);
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/* Check for any matches. */
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acl_match_check_x4(0, ctx, parms, &flows,
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&indices1, &indices2, xmm_match_mask.x);
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acl_match_check_x4(4, ctx, parms, &flows,
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&indices3, &indices4, xmm_match_mask.x);
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while (flows.started > 0) {
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/* Gather 4 bytes of input data for each stream. */
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input0 = _mm_cvtsi32_si128(GET_NEXT_4BYTES(parms, 0));
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input1 = _mm_cvtsi32_si128(GET_NEXT_4BYTES(parms, 4));
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input0 = MM_INSERT32(input0, GET_NEXT_4BYTES(parms, 1), 1);
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input1 = MM_INSERT32(input1, GET_NEXT_4BYTES(parms, 5), 1);
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input0 = MM_INSERT32(input0, GET_NEXT_4BYTES(parms, 2), 2);
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input1 = MM_INSERT32(input1, GET_NEXT_4BYTES(parms, 6), 2);
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input0 = MM_INSERT32(input0, GET_NEXT_4BYTES(parms, 3), 3);
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input1 = MM_INSERT32(input1, GET_NEXT_4BYTES(parms, 7), 3);
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/* Process the 4 bytes of input on each stream. */
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input0 = transition4(input0, flows.trans,
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&indices1, &indices2);
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input1 = transition4(input1, flows.trans,
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&indices3, &indices4);
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input0 = transition4(input0, flows.trans,
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&indices1, &indices2);
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input1 = transition4(input1, flows.trans,
|
||
|
|
&indices3, &indices4);
|
||
|
|
|
||
|
|
input0 = transition4(input0, flows.trans,
|
||
|
|
&indices1, &indices2);
|
||
|
|
input1 = transition4(input1, flows.trans,
|
||
|
|
&indices3, &indices4);
|
||
|
|
|
||
|
|
input0 = transition4(input0, flows.trans,
|
||
|
|
&indices1, &indices2);
|
||
|
|
input1 = transition4(input1, flows.trans,
|
||
|
|
&indices3, &indices4);
|
||
|
|
|
||
|
|
/* Check for any matches. */
|
||
|
|
acl_match_check_x4(0, ctx, parms, &flows,
|
||
|
|
&indices1, &indices2, xmm_match_mask.x);
|
||
|
|
acl_match_check_x4(4, ctx, parms, &flows,
|
||
|
|
&indices3, &indices4, xmm_match_mask.x);
|
||
|
|
}
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
/*
|
||
|
|
* Execute trie traversal with 4 traversals in parallel
|
||
|
|
*/
|
||
|
|
static inline int
|
||
|
|
search_sse_4(const struct rte_acl_ctx *ctx, const uint8_t **data,
|
||
|
|
uint32_t *results, int total_packets, uint32_t categories)
|
||
|
|
{
|
||
|
|
int n;
|
||
|
|
struct acl_flow_data flows;
|
||
|
|
uint64_t index_array[MAX_SEARCHES_SSE4];
|
||
|
|
struct completion cmplt[MAX_SEARCHES_SSE4];
|
||
|
|
struct parms parms[MAX_SEARCHES_SSE4];
|
||
|
|
xmm_t input, indices1, indices2;
|
||
|
|
|
||
|
|
acl_set_flow(&flows, cmplt, RTE_DIM(cmplt), data, results,
|
||
|
|
total_packets, categories, ctx->trans_table);
|
||
|
|
|
||
|
|
for (n = 0; n < MAX_SEARCHES_SSE4; n++) {
|
||
|
|
cmplt[n].count = 0;
|
||
|
|
index_array[n] = acl_start_next_trie(&flows, parms, n, ctx);
|
||
|
|
}
|
||
|
|
|
||
|
|
indices1 = MM_LOADU((xmm_t *) &index_array[0]);
|
||
|
|
indices2 = MM_LOADU((xmm_t *) &index_array[2]);
|
||
|
|
|
||
|
|
/* Check for any matches. */
|
||
|
|
acl_match_check_x4(0, ctx, parms, &flows,
|
||
|
|
&indices1, &indices2, xmm_match_mask.x);
|
||
|
|
|
||
|
|
while (flows.started > 0) {
|
||
|
|
|
||
|
|
/* Gather 4 bytes of input data for each stream. */
|
||
|
|
input = _mm_cvtsi32_si128(GET_NEXT_4BYTES(parms, 0));
|
||
|
|
input = MM_INSERT32(input, GET_NEXT_4BYTES(parms, 1), 1);
|
||
|
|
input = MM_INSERT32(input, GET_NEXT_4BYTES(parms, 2), 2);
|
||
|
|
input = MM_INSERT32(input, GET_NEXT_4BYTES(parms, 3), 3);
|
||
|
|
|
||
|
|
/* Process the 4 bytes of input on each stream. */
|
||
|
|
input = transition4(input, flows.trans, &indices1, &indices2);
|
||
|
|
input = transition4(input, flows.trans, &indices1, &indices2);
|
||
|
|
input = transition4(input, flows.trans, &indices1, &indices2);
|
||
|
|
input = transition4(input, flows.trans, &indices1, &indices2);
|
||
|
|
|
||
|
|
/* Check for any matches. */
|
||
|
|
acl_match_check_x4(0, ctx, parms, &flows,
|
||
|
|
&indices1, &indices2, xmm_match_mask.x);
|
||
|
|
}
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|