2019-10-30 16:26:44 +00:00
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(C) 2019 Marvell International Ltd.
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*/
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#include <stdbool.h>
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#include <getopt.h>
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#include <rte_cycles.h>
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#include <rte_ethdev.h>
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#include <rte_eventdev.h>
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#include <rte_event_eth_rx_adapter.h>
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#include <rte_event_eth_tx_adapter.h>
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#include <rte_lcore.h>
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#include <rte_spinlock.h>
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#include "l2fwd_common.h"
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#include "l2fwd_event.h"
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2019-10-30 16:26:45 +00:00
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static uint32_t
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l2fwd_event_device_setup_internal_port(struct l2fwd_resources *rsrc)
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{
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struct l2fwd_event_resources *evt_rsrc = rsrc->evt_rsrc;
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struct rte_event_dev_config event_d_conf = {
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.nb_events_limit = 4096,
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.nb_event_queue_flows = 1024,
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.nb_event_port_dequeue_depth = 128,
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.nb_event_port_enqueue_depth = 128
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};
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struct rte_event_dev_info dev_info;
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const uint8_t event_d_id = 0; /* Always use first event device only */
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uint32_t event_queue_cfg = 0;
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uint16_t ethdev_count = 0;
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uint16_t num_workers = 0;
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uint16_t port_id;
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int ret;
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RTE_ETH_FOREACH_DEV(port_id) {
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if ((rsrc->enabled_port_mask & (1 << port_id)) == 0)
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continue;
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ethdev_count++;
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}
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/* Event device configurtion */
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rte_event_dev_info_get(event_d_id, &dev_info);
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2019-12-20 14:27:41 +00:00
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/* Enable implicit release */
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if (dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_IMPLICIT_RELEASE_DISABLE)
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evt_rsrc->disable_implicit_release = 0;
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2019-10-30 16:26:45 +00:00
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if (dev_info.event_dev_cap & RTE_EVENT_DEV_CAP_QUEUE_ALL_TYPES)
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event_queue_cfg |= RTE_EVENT_QUEUE_CFG_ALL_TYPES;
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event_d_conf.nb_event_queues = ethdev_count;
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if (dev_info.max_event_queues < event_d_conf.nb_event_queues)
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event_d_conf.nb_event_queues = dev_info.max_event_queues;
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if (dev_info.max_num_events < event_d_conf.nb_events_limit)
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event_d_conf.nb_events_limit = dev_info.max_num_events;
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if (dev_info.max_event_queue_flows < event_d_conf.nb_event_queue_flows)
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event_d_conf.nb_event_queue_flows =
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dev_info.max_event_queue_flows;
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if (dev_info.max_event_port_dequeue_depth <
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event_d_conf.nb_event_port_dequeue_depth)
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event_d_conf.nb_event_port_dequeue_depth =
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dev_info.max_event_port_dequeue_depth;
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if (dev_info.max_event_port_enqueue_depth <
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event_d_conf.nb_event_port_enqueue_depth)
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event_d_conf.nb_event_port_enqueue_depth =
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dev_info.max_event_port_enqueue_depth;
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2019-12-20 14:27:41 +00:00
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/* Ignore Master core. */
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num_workers = rte_lcore_count() - 1;
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2019-10-30 16:26:45 +00:00
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if (dev_info.max_event_ports < num_workers)
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num_workers = dev_info.max_event_ports;
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event_d_conf.nb_event_ports = num_workers;
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evt_rsrc->evp.nb_ports = num_workers;
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evt_rsrc->evq.nb_queues = event_d_conf.nb_event_queues;
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evt_rsrc->has_burst = !!(dev_info.event_dev_cap &
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RTE_EVENT_DEV_CAP_BURST_MODE);
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ret = rte_event_dev_configure(event_d_id, &event_d_conf);
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if (ret < 0)
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rte_panic("Error in configuring event device\n");
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evt_rsrc->event_d_id = event_d_id;
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return event_queue_cfg;
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}
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2019-10-30 16:26:46 +00:00
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static void
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l2fwd_event_port_setup_internal_port(struct l2fwd_resources *rsrc)
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{
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struct l2fwd_event_resources *evt_rsrc = rsrc->evt_rsrc;
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uint8_t event_d_id = evt_rsrc->event_d_id;
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struct rte_event_port_conf event_p_conf = {
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.dequeue_depth = 32,
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.enqueue_depth = 32,
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.new_event_threshold = 4096
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};
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struct rte_event_port_conf def_p_conf;
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uint8_t event_p_id;
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int32_t ret;
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evt_rsrc->evp.event_p_id = (uint8_t *)malloc(sizeof(uint8_t) *
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evt_rsrc->evp.nb_ports);
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if (!evt_rsrc->evp.event_p_id)
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rte_panic("Failed to allocate memory for Event Ports\n");
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2020-01-30 08:19:12 +00:00
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ret = rte_event_port_default_conf_get(event_d_id, 0, &def_p_conf);
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if (ret < 0)
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rte_panic("Error to get default configuration of event port\n");
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2019-10-30 16:26:46 +00:00
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if (def_p_conf.new_event_threshold < event_p_conf.new_event_threshold)
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event_p_conf.new_event_threshold =
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def_p_conf.new_event_threshold;
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if (def_p_conf.dequeue_depth < event_p_conf.dequeue_depth)
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event_p_conf.dequeue_depth = def_p_conf.dequeue_depth;
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if (def_p_conf.enqueue_depth < event_p_conf.enqueue_depth)
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event_p_conf.enqueue_depth = def_p_conf.enqueue_depth;
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event_p_conf.disable_implicit_release =
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evt_rsrc->disable_implicit_release;
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for (event_p_id = 0; event_p_id < evt_rsrc->evp.nb_ports;
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event_p_id++) {
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ret = rte_event_port_setup(event_d_id, event_p_id,
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&event_p_conf);
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if (ret < 0)
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rte_panic("Error in configuring event port %d\n",
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event_p_id);
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ret = rte_event_port_link(event_d_id, event_p_id, NULL,
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NULL, 0);
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if (ret < 0)
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rte_panic("Error in linking event port %d to queue\n",
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event_p_id);
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evt_rsrc->evp.event_p_id[event_p_id] = event_p_id;
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/* init spinlock */
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rte_spinlock_init(&evt_rsrc->evp.lock);
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}
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evt_rsrc->def_p_conf = event_p_conf;
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}
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static void
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l2fwd_event_queue_setup_internal_port(struct l2fwd_resources *rsrc,
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uint32_t event_queue_cfg)
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{
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struct l2fwd_event_resources *evt_rsrc = rsrc->evt_rsrc;
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uint8_t event_d_id = evt_rsrc->event_d_id;
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struct rte_event_queue_conf event_q_conf = {
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.nb_atomic_flows = 1024,
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.nb_atomic_order_sequences = 1024,
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.event_queue_cfg = event_queue_cfg,
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.priority = RTE_EVENT_DEV_PRIORITY_NORMAL
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};
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struct rte_event_queue_conf def_q_conf;
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uint8_t event_q_id = 0;
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int32_t ret;
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2020-01-30 08:19:12 +00:00
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ret = rte_event_queue_default_conf_get(event_d_id, event_q_id,
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&def_q_conf);
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if (ret < 0)
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rte_panic("Error to get default config of event queue\n");
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2019-10-30 16:26:46 +00:00
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if (def_q_conf.nb_atomic_flows < event_q_conf.nb_atomic_flows)
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event_q_conf.nb_atomic_flows = def_q_conf.nb_atomic_flows;
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if (def_q_conf.nb_atomic_order_sequences <
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event_q_conf.nb_atomic_order_sequences)
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event_q_conf.nb_atomic_order_sequences =
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def_q_conf.nb_atomic_order_sequences;
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event_q_conf.event_queue_cfg = event_queue_cfg;
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event_q_conf.schedule_type = rsrc->sched_type;
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evt_rsrc->evq.event_q_id = (uint8_t *)malloc(sizeof(uint8_t) *
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evt_rsrc->evq.nb_queues);
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if (!evt_rsrc->evq.event_q_id)
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rte_panic("Memory allocation failure\n");
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for (event_q_id = 0; event_q_id < evt_rsrc->evq.nb_queues;
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event_q_id++) {
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ret = rte_event_queue_setup(event_d_id, event_q_id,
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&event_q_conf);
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if (ret < 0)
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rte_panic("Error in configuring event queue\n");
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evt_rsrc->evq.event_q_id[event_q_id] = event_q_id;
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}
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}
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2019-10-30 16:26:47 +00:00
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static void
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l2fwd_rx_tx_adapter_setup_internal_port(struct l2fwd_resources *rsrc)
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{
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struct l2fwd_event_resources *evt_rsrc = rsrc->evt_rsrc;
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2019-11-08 10:04:42 +00:00
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struct rte_event_eth_rx_adapter_queue_conf eth_q_conf;
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2019-10-30 16:26:47 +00:00
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uint8_t event_d_id = evt_rsrc->event_d_id;
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uint16_t adapter_id = 0;
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uint16_t nb_adapter = 0;
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uint16_t port_id;
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uint8_t q_id = 0;
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int ret;
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2019-11-08 10:04:42 +00:00
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memset(ð_q_conf, 0, sizeof(eth_q_conf));
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eth_q_conf.ev.priority = RTE_EVENT_DEV_PRIORITY_NORMAL;
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2019-10-30 16:26:47 +00:00
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RTE_ETH_FOREACH_DEV(port_id) {
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if ((rsrc->enabled_port_mask & (1 << port_id)) == 0)
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continue;
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nb_adapter++;
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}
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evt_rsrc->rx_adptr.nb_rx_adptr = nb_adapter;
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evt_rsrc->rx_adptr.rx_adptr = (uint8_t *)malloc(sizeof(uint8_t) *
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evt_rsrc->rx_adptr.nb_rx_adptr);
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if (!evt_rsrc->rx_adptr.rx_adptr) {
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free(evt_rsrc->evp.event_p_id);
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free(evt_rsrc->evq.event_q_id);
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rte_panic("Failed to allocate memery for Rx adapter\n");
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}
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RTE_ETH_FOREACH_DEV(port_id) {
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if ((rsrc->enabled_port_mask & (1 << port_id)) == 0)
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continue;
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ret = rte_event_eth_rx_adapter_create(adapter_id, event_d_id,
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&evt_rsrc->def_p_conf);
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if (ret)
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rte_panic("Failed to create rx adapter[%d]\n",
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adapter_id);
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/* Configure user requested sched type*/
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eth_q_conf.ev.sched_type = rsrc->sched_type;
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eth_q_conf.ev.queue_id = evt_rsrc->evq.event_q_id[q_id];
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ret = rte_event_eth_rx_adapter_queue_add(adapter_id, port_id,
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-1, ð_q_conf);
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if (ret)
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rte_panic("Failed to add queues to Rx adapter\n");
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ret = rte_event_eth_rx_adapter_start(adapter_id);
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if (ret)
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rte_panic("Rx adapter[%d] start Failed\n", adapter_id);
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evt_rsrc->rx_adptr.rx_adptr[adapter_id] = adapter_id;
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adapter_id++;
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if (q_id < evt_rsrc->evq.nb_queues)
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q_id++;
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}
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evt_rsrc->tx_adptr.nb_tx_adptr = nb_adapter;
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evt_rsrc->tx_adptr.tx_adptr = (uint8_t *)malloc(sizeof(uint8_t) *
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evt_rsrc->tx_adptr.nb_tx_adptr);
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if (!evt_rsrc->tx_adptr.tx_adptr) {
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free(evt_rsrc->rx_adptr.rx_adptr);
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free(evt_rsrc->evp.event_p_id);
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free(evt_rsrc->evq.event_q_id);
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rte_panic("Failed to allocate memery for Rx adapter\n");
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}
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adapter_id = 0;
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RTE_ETH_FOREACH_DEV(port_id) {
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if ((rsrc->enabled_port_mask & (1 << port_id)) == 0)
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continue;
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ret = rte_event_eth_tx_adapter_create(adapter_id, event_d_id,
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&evt_rsrc->def_p_conf);
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if (ret)
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rte_panic("Failed to create tx adapter[%d]\n",
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adapter_id);
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ret = rte_event_eth_tx_adapter_queue_add(adapter_id, port_id,
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-1);
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if (ret)
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rte_panic("Failed to add queues to Tx adapter\n");
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ret = rte_event_eth_tx_adapter_start(adapter_id);
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if (ret)
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rte_panic("Tx adapter[%d] start Failed\n", adapter_id);
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evt_rsrc->tx_adptr.tx_adptr[adapter_id] = adapter_id;
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adapter_id++;
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}
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}
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2019-10-30 16:26:44 +00:00
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void
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l2fwd_event_set_internal_port_ops(struct event_setup_ops *ops)
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{
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2019-10-30 16:26:45 +00:00
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ops->event_device_setup = l2fwd_event_device_setup_internal_port;
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2019-10-30 16:26:46 +00:00
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ops->event_queue_setup = l2fwd_event_queue_setup_internal_port;
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ops->event_port_setup = l2fwd_event_port_setup_internal_port;
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2019-10-30 16:26:47 +00:00
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ops->adapter_setup = l2fwd_rx_tx_adapter_setup_internal_port;
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2019-10-30 16:26:44 +00:00
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}
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