2019-01-11 12:24:49 +00:00
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/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
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*
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* Copyright 2013-2016 Freescale Semiconductor Inc.
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2021-02-24 12:42:58 +00:00
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* Copyright 2018-2021 NXP
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2019-01-11 12:24:49 +00:00
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*
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*/
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#ifndef _FSL_DPDMUX_CMD_H
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#define _FSL_DPDMUX_CMD_H
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/* DPDMUX Version */
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#define DPDMUX_VER_MAJOR 6
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#define DPDMUX_VER_MINOR 9
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#define DPDMUX_CMD_BASE_VERSION 1
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#define DPDMUX_CMD_VERSION_2 2
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#define DPDMUX_CMD_VERSION_3 3
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#define DPDMUX_CMD_VERSION_4 4
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#define DPDMUX_CMD_ID_OFFSET 4
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#define DPDMUX_CMD(id) (((id) << DPDMUX_CMD_ID_OFFSET) |\
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DPDMUX_CMD_BASE_VERSION)
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#define DPDMUX_CMD_V2(id) (((id) << DPDMUX_CMD_ID_OFFSET) | \
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DPDMUX_CMD_VERSION_2)
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#define DPDMUX_CMD_V3(id) (((id) << DPDMUX_CMD_ID_OFFSET) |\
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DPDMUX_CMD_VERSION_3)
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#define DPDMUX_CMD_V4(id) (((id) << DPDMUX_CMD_ID_OFFSET) |\
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DPDMUX_CMD_VERSION_4)
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/* Command IDs */
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#define DPDMUX_CMDID_CLOSE DPDMUX_CMD(0x800)
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#define DPDMUX_CMDID_OPEN DPDMUX_CMD(0x806)
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#define DPDMUX_CMDID_CREATE DPDMUX_CMD_V4(0x906)
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#define DPDMUX_CMDID_DESTROY DPDMUX_CMD(0x986)
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#define DPDMUX_CMDID_GET_API_VERSION DPDMUX_CMD(0xa06)
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#define DPDMUX_CMDID_ENABLE DPDMUX_CMD(0x002)
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#define DPDMUX_CMDID_DISABLE DPDMUX_CMD(0x003)
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#define DPDMUX_CMDID_GET_ATTR DPDMUX_CMD_V2(0x004)
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#define DPDMUX_CMDID_RESET DPDMUX_CMD(0x005)
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#define DPDMUX_CMDID_IS_ENABLED DPDMUX_CMD(0x006)
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#define DPDMUX_CMDID_SET_MAX_FRAME_LENGTH DPDMUX_CMD(0x0a1)
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#define DPDMUX_CMDID_GET_MAX_FRAME_LENGTH DPDMUX_CMD(0x0a2)
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#define DPDMUX_CMDID_UL_RESET_COUNTERS DPDMUX_CMD(0x0a3)
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#define DPDMUX_CMDID_IF_SET_ACCEPTED_FRAMES DPDMUX_CMD(0x0a7)
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#define DPDMUX_CMDID_IF_GET_ATTR DPDMUX_CMD(0x0a8)
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#define DPDMUX_CMDID_IF_ENABLE DPDMUX_CMD(0x0a9)
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#define DPDMUX_CMDID_IF_DISABLE DPDMUX_CMD(0x0aa)
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#define DPDMUX_CMDID_IF_ADD_L2_RULE DPDMUX_CMD(0x0b0)
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#define DPDMUX_CMDID_IF_REMOVE_L2_RULE DPDMUX_CMD(0x0b1)
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#define DPDMUX_CMDID_IF_GET_COUNTER DPDMUX_CMD(0x0b2)
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#define DPDMUX_CMDID_IF_SET_LINK_CFG DPDMUX_CMD_V2(0x0b3)
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#define DPDMUX_CMDID_IF_GET_LINK_STATE DPDMUX_CMD_V2(0x0b4)
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#define DPDMUX_CMDID_SET_CUSTOM_KEY DPDMUX_CMD(0x0b5)
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#define DPDMUX_CMDID_ADD_CUSTOM_CLS_ENTRY DPDMUX_CMD_V2(0x0b6)
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#define DPDMUX_CMDID_REMOVE_CUSTOM_CLS_ENTRY DPDMUX_CMD(0x0b7)
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#define DPDMUX_CMDID_IF_SET_DEFAULT DPDMUX_CMD(0x0b8)
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#define DPDMUX_CMDID_IF_GET_DEFAULT DPDMUX_CMD(0x0b9)
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#define DPDMUX_CMDID_SET_RESETABLE DPDMUX_CMD(0x0ba)
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#define DPDMUX_CMDID_GET_RESETABLE DPDMUX_CMD(0x0bb)
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#define DPDMUX_CMDID_SET_ERRORS_BEHAVIOR DPDMUX_CMD(0x0bf)
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#define DPDMUX_MASK(field) \
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GENMASK(DPDMUX_##field##_SHIFT + DPDMUX_##field##_SIZE - 1, \
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DPDMUX_##field##_SHIFT)
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#define dpdmux_set_field(var, field, val) \
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((var) |= (((val) << DPDMUX_##field##_SHIFT) & DPDMUX_MASK(field)))
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#define dpdmux_get_field(var, field) \
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(((var) & DPDMUX_MASK(field)) >> DPDMUX_##field##_SHIFT)
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#pragma pack(push, 1)
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struct dpdmux_cmd_open {
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uint32_t dpdmux_id;
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};
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struct dpdmux_cmd_create {
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uint8_t method;
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uint8_t manip;
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uint16_t num_ifs;
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uint16_t default_if;
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uint16_t pad;
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uint16_t adv_max_dmat_entries;
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uint16_t adv_max_mc_groups;
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uint16_t adv_max_vlan_ids;
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uint16_t mem_size;
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uint64_t options;
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};
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struct dpdmux_cmd_destroy {
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uint32_t dpdmux_id;
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};
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#define DPDMUX_ENABLE_SHIFT 0
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#define DPDMUX_ENABLE_SIZE 1
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#define DPDMUX_IS_DEFAULT_SHIFT 1
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#define DPDMUX_IS_DEFAULT_SIZE 1
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struct dpdmux_rsp_is_enabled {
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uint8_t en;
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};
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struct dpdmux_rsp_get_attr {
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uint8_t method;
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uint8_t manip;
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uint16_t num_ifs;
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uint16_t mem_size;
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uint16_t default_if;
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uint64_t pad1;
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uint32_t id;
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uint32_t pad2;
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uint64_t options;
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};
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struct dpdmux_cmd_set_max_frame_length {
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uint16_t max_frame_length;
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};
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2021-10-06 17:01:22 +00:00
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struct dpdmux_cmd_get_max_frame_len {
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uint16_t if_id;
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};
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struct dpdmux_rsp_get_max_frame_len {
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uint16_t max_len;
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};
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#define DPDMUX_ACCEPTED_FRAMES_TYPE_SHIFT 0
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#define DPDMUX_ACCEPTED_FRAMES_TYPE_SIZE 4
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#define DPDMUX_UNACCEPTED_FRAMES_ACTION_SHIFT 4
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#define DPDMUX_UNACCEPTED_FRAMES_ACTION_SIZE 4
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struct dpdmux_cmd_if_set_accepted_frames {
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uint16_t if_id;
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uint8_t frames_options;
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};
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struct dpdmux_cmd_if {
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uint16_t if_id;
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};
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struct dpdmux_rsp_if_get_attr {
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uint8_t pad[3];
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uint8_t enabled;
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uint8_t pad1[3];
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uint8_t accepted_frames_type;
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uint32_t rate;
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};
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struct dpdmux_cmd_if_l2_rule {
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uint16_t if_id;
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uint8_t mac_addr5;
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uint8_t mac_addr4;
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uint8_t mac_addr3;
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uint8_t mac_addr2;
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uint8_t mac_addr1;
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uint8_t mac_addr0;
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uint32_t pad;
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uint16_t vlan_id;
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};
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struct dpdmux_cmd_if_get_counter {
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uint16_t if_id;
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uint8_t counter_type;
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};
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struct dpdmux_rsp_if_get_counter {
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uint64_t pad;
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uint64_t counter;
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};
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struct dpdmux_cmd_if_set_link_cfg {
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uint16_t if_id;
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uint16_t pad[3];
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uint32_t rate;
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uint32_t pad1;
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uint64_t options;
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uint64_t advertising;
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};
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struct dpdmux_cmd_if_get_link_state {
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uint16_t if_id;
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};
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#define DPDMUX_UP_SHIFT 0
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#define DPDMUX_UP_SIZE 1
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#define DPDMUX_STATE_VALID_SHIFT 1
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#define DPDMUX_STATE_VALID_SIZE 1
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struct dpdmux_rsp_if_get_link_state {
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uint32_t pad;
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uint8_t up;
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uint8_t pad1[3];
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uint32_t rate;
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uint32_t pad2;
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uint64_t options;
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uint64_t supported;
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uint64_t advertising;
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};
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struct dpdmux_rsp_get_api_version {
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uint16_t major;
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uint16_t minor;
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};
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struct dpdmux_set_custom_key {
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uint64_t pad[6];
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uint64_t key_cfg_iova;
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};
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struct dpdmux_cmd_add_custom_cls_entry {
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uint8_t pad[3];
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uint8_t key_size;
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uint16_t entry_index;
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uint16_t dest_if;
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uint64_t key_iova;
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uint64_t mask_iova;
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};
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struct dpdmux_cmd_remove_custom_cls_entry {
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uint8_t pad[3];
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uint8_t key_size;
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uint32_t pad1;
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uint64_t key_iova;
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uint64_t mask_iova;
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};
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#define DPDMUX_SKIP_RESET_FLAGS_SHIFT 0
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#define DPDMUX_SKIP_RESET_FLAGS_SIZE 3
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struct dpdmux_cmd_set_skip_reset_flags {
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uint8_t skip_reset_flags;
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};
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struct dpdmux_rsp_get_skip_reset_flags {
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uint8_t skip_reset_flags;
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};
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#define DPDMUX_ERROR_ACTION_SHIFT 0
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#define DPDMUX_ERROR_ACTION_SIZE 4
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struct dpdmux_cmd_set_errors_behavior {
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uint32_t errors;
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uint16_t flags;
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uint16_t if_id;
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};
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2019-01-11 12:24:49 +00:00
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#pragma pack(pop)
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#endif /* _FSL_DPDMUX_CMD_H */
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