2018-07-27 15:47:27 +00:00
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/* SPDX-License-Identifier: BSD-3-Clause
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2015-07-20 16:33:18 +00:00
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* Copyright (c) 2013-2015 Brocade Communications Systems, Inc.
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2018-05-23 20:56:56 +00:00
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* Copyright (c) 2015-2018 Cavium Inc.
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2015-07-20 16:33:18 +00:00
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* All rights reserved.
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2018-05-23 20:56:56 +00:00
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* www.cavium.com
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2015-07-20 16:33:18 +00:00
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*/
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#include "bnx2x.h"
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#include "bnx2x_rxtx.h"
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static const struct rte_memzone *
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ring_dma_zone_reserve(struct rte_eth_dev *dev, const char *ring_name,
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uint16_t queue_id, uint32_t ring_size, int socket_id)
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{
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2018-10-11 12:58:49 +00:00
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return rte_eth_dma_zone_reserve(dev, ring_name, queue_id,
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ring_size, BNX2X_PAGE_SIZE, socket_id);
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2015-07-20 16:33:18 +00:00
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}
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static void
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bnx2x_rx_queue_release(struct bnx2x_rx_queue *rx_queue)
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{
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uint16_t i;
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struct rte_mbuf **sw_ring;
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if (NULL != rx_queue) {
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sw_ring = rx_queue->sw_ring;
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if (NULL != sw_ring) {
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for (i = 0; i < rx_queue->nb_rx_desc; i++) {
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if (NULL != sw_ring[i])
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rte_pktmbuf_free(sw_ring[i]);
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}
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rte_free(sw_ring);
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}
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rte_free(rx_queue);
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}
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}
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void
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2021-10-06 11:18:22 +00:00
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bnx2x_dev_rx_queue_release(struct rte_eth_dev *dev, uint16_t queue_idx)
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2015-07-20 16:33:18 +00:00
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{
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2021-10-06 11:18:22 +00:00
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bnx2x_rx_queue_release(dev->data->rx_queues[queue_idx]);
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2015-07-20 16:33:18 +00:00
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}
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int
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bnx2x_dev_rx_queue_setup(struct rte_eth_dev *dev,
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uint16_t queue_idx,
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uint16_t nb_desc,
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unsigned int socket_id,
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2016-10-11 23:04:55 +00:00
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__rte_unused const struct rte_eth_rxconf *rx_conf,
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2015-07-20 16:33:18 +00:00
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struct rte_mempool *mp)
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{
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uint16_t j, idx;
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const struct rte_memzone *dma;
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struct bnx2x_rx_queue *rxq;
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uint32_t dma_size;
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struct rte_mbuf *mbuf;
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struct bnx2x_softc *sc = dev->data->dev_private;
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struct bnx2x_fastpath *fp = &sc->fp[queue_idx];
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struct eth_rx_cqe_next_page *nextpg;
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2017-10-20 12:31:31 +00:00
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rte_iova_t *rx_bd;
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rte_iova_t busaddr;
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2015-07-20 16:33:18 +00:00
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/* First allocate the rx queue data structure */
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rxq = rte_zmalloc_socket("ethdev RX queue", sizeof(struct bnx2x_rx_queue),
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RTE_CACHE_LINE_SIZE, socket_id);
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if (NULL == rxq) {
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2018-09-29 05:42:29 +00:00
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PMD_DRV_LOG(ERR, sc, "rte_zmalloc for rxq failed!");
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2016-01-27 13:58:30 +00:00
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return -ENOMEM;
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2015-07-20 16:33:18 +00:00
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}
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rxq->sc = sc;
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rxq->mb_pool = mp;
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rxq->queue_id = queue_idx;
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rxq->port_id = dev->data->port_id;
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rxq->nb_rx_pages = 1;
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while (USABLE_RX_BD(rxq) < nb_desc)
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rxq->nb_rx_pages <<= 1;
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rxq->nb_rx_desc = TOTAL_RX_BD(rxq);
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sc->rx_ring_size = USABLE_RX_BD(rxq);
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rxq->nb_cq_pages = RCQ_BD_PAGES(rxq);
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2018-09-29 05:42:29 +00:00
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PMD_DRV_LOG(DEBUG, sc, "fp[%02d] req_bd=%u, usable_bd=%lu, "
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2015-07-20 16:33:18 +00:00
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"total_bd=%lu, rx_pages=%u, cq_pages=%u",
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2016-10-11 23:04:55 +00:00
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queue_idx, nb_desc, (unsigned long)USABLE_RX_BD(rxq),
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2015-12-11 06:36:40 +00:00
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(unsigned long)TOTAL_RX_BD(rxq), rxq->nb_rx_pages,
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rxq->nb_cq_pages);
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2015-07-20 16:33:18 +00:00
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/* Allocate RX ring hardware descriptors */
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dma_size = rxq->nb_rx_desc * sizeof(struct eth_rx_bd);
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dma = ring_dma_zone_reserve(dev, "hw_ring", queue_idx, dma_size, socket_id);
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if (NULL == dma) {
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PMD_RX_LOG(ERR, "ring_dma_zone_reserve for rx_ring failed!");
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bnx2x_rx_queue_release(rxq);
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2016-01-27 13:58:30 +00:00
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return -ENOMEM;
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2015-07-20 16:33:18 +00:00
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}
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2017-11-04 01:22:28 +00:00
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fp->rx_desc_mapping = rxq->rx_ring_phys_addr = (uint64_t)dma->iova;
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2015-07-20 16:33:18 +00:00
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rxq->rx_ring = (uint64_t*)dma->addr;
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memset((void *)rxq->rx_ring, 0, dma_size);
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/* Link the RX chain pages. */
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for (j = 1; j <= rxq->nb_rx_pages; j++) {
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rx_bd = &rxq->rx_ring[TOTAL_RX_BD_PER_PAGE * j - 2];
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busaddr = rxq->rx_ring_phys_addr + BNX2X_PAGE_SIZE * (j % rxq->nb_rx_pages);
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*rx_bd = busaddr;
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}
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/* Allocate software ring */
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dma_size = rxq->nb_rx_desc * sizeof(struct bnx2x_rx_entry);
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rxq->sw_ring = rte_zmalloc_socket("sw_ring", dma_size,
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RTE_CACHE_LINE_SIZE,
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socket_id);
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if (NULL == rxq->sw_ring) {
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PMD_RX_LOG(ERR, "rte_zmalloc for sw_ring failed!");
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bnx2x_rx_queue_release(rxq);
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2016-01-27 13:58:30 +00:00
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return -ENOMEM;
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2015-07-20 16:33:18 +00:00
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}
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/* Initialize software ring entries */
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for (idx = 0; idx < rxq->nb_rx_desc; idx = NEXT_RX_BD(idx)) {
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2016-05-11 14:43:46 +00:00
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mbuf = rte_mbuf_raw_alloc(mp);
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2015-07-20 16:33:18 +00:00
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if (NULL == mbuf) {
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PMD_RX_LOG(ERR, "RX mbuf alloc failed queue_id=%u, idx=%d",
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(unsigned)rxq->queue_id, idx);
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bnx2x_rx_queue_release(rxq);
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2016-01-27 13:58:30 +00:00
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return -ENOMEM;
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2015-07-20 16:33:18 +00:00
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}
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rxq->sw_ring[idx] = mbuf;
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2018-02-06 11:20:33 +00:00
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rxq->rx_ring[idx] =
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rte_cpu_to_le_64(rte_mbuf_data_iova_default(mbuf));
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2015-07-20 16:33:18 +00:00
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}
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rxq->pkt_first_seg = NULL;
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rxq->pkt_last_seg = NULL;
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rxq->rx_bd_head = 0;
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2015-12-09 22:11:04 +00:00
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rxq->rx_bd_tail = rxq->nb_rx_desc;
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2015-07-20 16:33:18 +00:00
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/* Allocate CQ chain. */
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dma_size = BNX2X_RX_CHAIN_PAGE_SZ * rxq->nb_cq_pages;
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dma = ring_dma_zone_reserve(dev, "bnx2x_rcq", queue_idx, dma_size, socket_id);
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if (NULL == dma) {
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PMD_RX_LOG(ERR, "RCQ alloc failed");
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2016-01-27 13:58:30 +00:00
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return -ENOMEM;
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2015-07-20 16:33:18 +00:00
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}
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2017-11-04 01:22:28 +00:00
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fp->rx_comp_mapping = rxq->cq_ring_phys_addr = (uint64_t)dma->iova;
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2015-07-20 16:33:18 +00:00
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rxq->cq_ring = (union eth_rx_cqe*)dma->addr;
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/* Link the CQ chain pages. */
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for (j = 1; j <= rxq->nb_cq_pages; j++) {
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nextpg = &rxq->cq_ring[TOTAL_RCQ_ENTRIES_PER_PAGE * j - 1].next_page_cqe;
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busaddr = rxq->cq_ring_phys_addr + BNX2X_PAGE_SIZE * (j % rxq->nb_cq_pages);
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nextpg->addr_hi = rte_cpu_to_le_32(U64_HI(busaddr));
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nextpg->addr_lo = rte_cpu_to_le_32(U64_LO(busaddr));
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}
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rxq->rx_cq_head = 0;
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rxq->rx_cq_tail = TOTAL_RCQ_ENTRIES(rxq);
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dev->data->rx_queues[queue_idx] = rxq;
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if (!sc->rx_queues) sc->rx_queues = dev->data->rx_queues;
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return 0;
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}
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static void
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bnx2x_tx_queue_release(struct bnx2x_tx_queue *tx_queue)
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{
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uint16_t i;
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struct rte_mbuf **sw_ring;
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if (NULL != tx_queue) {
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sw_ring = tx_queue->sw_ring;
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if (NULL != sw_ring) {
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for (i = 0; i < tx_queue->nb_tx_desc; i++) {
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if (NULL != sw_ring[i])
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rte_pktmbuf_free(sw_ring[i]);
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}
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rte_free(sw_ring);
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}
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rte_free(tx_queue);
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}
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}
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void
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2021-10-06 11:18:22 +00:00
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bnx2x_dev_tx_queue_release(struct rte_eth_dev *dev, uint16_t queue_idx)
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2015-07-20 16:33:18 +00:00
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{
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2021-10-06 11:18:22 +00:00
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bnx2x_tx_queue_release(dev->data->tx_queues[queue_idx]);
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2015-07-20 16:33:18 +00:00
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}
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static uint16_t
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bnx2x_xmit_pkts(void *p_txq, struct rte_mbuf **tx_pkts, uint16_t nb_pkts)
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{
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struct bnx2x_tx_queue *txq;
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struct bnx2x_softc *sc;
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struct bnx2x_fastpath *fp;
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2016-05-12 00:06:23 +00:00
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uint16_t nb_tx_pkts;
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uint16_t nb_pkt_sent = 0;
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2016-05-12 00:06:24 +00:00
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uint32_t ret;
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2015-07-20 16:33:18 +00:00
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txq = p_txq;
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sc = txq->sc;
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fp = &sc->fp[txq->queue_id];
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2016-05-12 00:06:23 +00:00
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if ((unlikely((txq->nb_tx_desc - txq->nb_tx_avail) >
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txq->tx_free_thresh)))
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bnx2x_txeof(sc, fp);
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2015-07-20 16:33:18 +00:00
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2016-05-12 00:06:23 +00:00
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nb_tx_pkts = RTE_MIN(nb_pkts, txq->nb_tx_avail / BDS_PER_TX_PKT);
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if (unlikely(nb_tx_pkts == 0))
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return 0;
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2015-07-20 16:33:18 +00:00
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2016-05-12 00:06:23 +00:00
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while (nb_tx_pkts--) {
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2016-05-12 00:06:24 +00:00
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struct rte_mbuf *m = *tx_pkts++;
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2016-05-12 00:06:23 +00:00
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assert(m != NULL);
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2016-05-12 00:06:24 +00:00
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ret = bnx2x_tx_encap(txq, m);
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fp->tx_db.data.prod += ret;
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2016-05-12 00:06:23 +00:00
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nb_pkt_sent++;
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}
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2015-07-20 16:33:18 +00:00
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2016-05-12 00:06:24 +00:00
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bnx2x_update_fp_sb_idx(fp);
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mb();
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DOORBELL(sc, txq->queue_id, fp->tx_db.raw);
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mb();
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if ((txq->nb_tx_desc - txq->nb_tx_avail) >
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txq->tx_free_thresh)
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bnx2x_txeof(sc, fp);
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2016-05-12 00:06:23 +00:00
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return nb_pkt_sent;
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2015-07-20 16:33:18 +00:00
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}
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int
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bnx2x_dev_tx_queue_setup(struct rte_eth_dev *dev,
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uint16_t queue_idx,
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uint16_t nb_desc,
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unsigned int socket_id,
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const struct rte_eth_txconf *tx_conf)
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{
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uint16_t i;
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unsigned int tsize;
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const struct rte_memzone *tz;
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struct bnx2x_tx_queue *txq;
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struct eth_tx_next_bd *tx_n_bd;
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uint64_t busaddr;
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struct bnx2x_softc *sc = dev->data->dev_private;
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struct bnx2x_fastpath *fp = &sc->fp[queue_idx];
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/* First allocate the tx queue data structure */
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txq = rte_zmalloc("ethdev TX queue", sizeof(struct bnx2x_tx_queue),
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RTE_CACHE_LINE_SIZE);
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if (txq == NULL)
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2016-01-27 13:58:30 +00:00
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return -ENOMEM;
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2015-07-20 16:33:18 +00:00
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txq->sc = sc;
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txq->nb_tx_pages = 1;
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while (USABLE_TX_BD(txq) < nb_desc)
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txq->nb_tx_pages <<= 1;
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txq->nb_tx_desc = TOTAL_TX_BD(txq);
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sc->tx_ring_size = TOTAL_TX_BD(txq);
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txq->tx_free_thresh = tx_conf->tx_free_thresh ?
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tx_conf->tx_free_thresh : DEFAULT_TX_FREE_THRESH;
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2017-02-10 20:12:06 +00:00
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txq->tx_free_thresh = min(txq->tx_free_thresh,
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txq->nb_tx_desc - BDS_PER_TX_PKT);
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2015-07-20 16:33:18 +00:00
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2018-09-29 05:42:29 +00:00
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PMD_DRV_LOG(DEBUG, sc, "fp[%02d] req_bd=%u, thresh=%u, usable_bd=%lu, "
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2015-07-20 16:33:18 +00:00
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"total_bd=%lu, tx_pages=%u",
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2015-12-11 06:36:40 +00:00
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queue_idx, nb_desc, txq->tx_free_thresh,
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(unsigned long)USABLE_TX_BD(txq),
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(unsigned long)TOTAL_TX_BD(txq), txq->nb_tx_pages);
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2015-07-20 16:33:18 +00:00
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/* Allocate TX ring hardware descriptors */
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tsize = txq->nb_tx_desc * sizeof(union eth_tx_bd_types);
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tz = ring_dma_zone_reserve(dev, "tx_hw_ring", queue_idx, tsize, socket_id);
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if (tz == NULL) {
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bnx2x_tx_queue_release(txq);
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2016-01-27 13:58:30 +00:00
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return -ENOMEM;
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2015-07-20 16:33:18 +00:00
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}
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2017-11-04 01:22:28 +00:00
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fp->tx_desc_mapping = txq->tx_ring_phys_addr = (uint64_t)tz->iova;
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2015-07-20 16:33:18 +00:00
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|
|
txq->tx_ring = (union eth_tx_bd_types *) tz->addr;
|
|
|
|
memset(txq->tx_ring, 0, tsize);
|
|
|
|
|
|
|
|
/* Allocate software ring */
|
|
|
|
tsize = txq->nb_tx_desc * sizeof(struct rte_mbuf *);
|
|
|
|
txq->sw_ring = rte_zmalloc("tx_sw_ring", tsize,
|
|
|
|
RTE_CACHE_LINE_SIZE);
|
|
|
|
if (txq->sw_ring == NULL) {
|
|
|
|
bnx2x_tx_queue_release(txq);
|
2016-01-27 13:58:30 +00:00
|
|
|
return -ENOMEM;
|
2015-07-20 16:33:18 +00:00
|
|
|
}
|
|
|
|
|
2018-09-29 05:42:29 +00:00
|
|
|
/* PMD_DRV_LOG(DEBUG, sc, "sw_ring=%p hw_ring=%p dma_addr=0x%"PRIx64,
|
2015-07-20 16:33:18 +00:00
|
|
|
txq->sw_ring, txq->tx_ring, txq->tx_ring_phys_addr); */
|
|
|
|
|
|
|
|
/* Link TX pages */
|
|
|
|
for (i = 1; i <= txq->nb_tx_pages; i++) {
|
|
|
|
tx_n_bd = &txq->tx_ring[TOTAL_TX_BD_PER_PAGE * i - 1].next_bd;
|
|
|
|
busaddr = txq->tx_ring_phys_addr + BNX2X_PAGE_SIZE * (i % txq->nb_tx_pages);
|
|
|
|
tx_n_bd->addr_hi = rte_cpu_to_le_32(U64_HI(busaddr));
|
|
|
|
tx_n_bd->addr_lo = rte_cpu_to_le_32(U64_LO(busaddr));
|
2018-09-29 05:42:29 +00:00
|
|
|
/* PMD_DRV_LOG(DEBUG, sc, "link tx page %lu",
|
|
|
|
* (TOTAL_TX_BD_PER_PAGE * i - 1));
|
|
|
|
*/
|
2015-07-20 16:33:18 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
txq->queue_id = queue_idx;
|
|
|
|
txq->port_id = dev->data->port_id;
|
|
|
|
txq->tx_pkt_tail = 0;
|
|
|
|
txq->tx_pkt_head = 0;
|
|
|
|
txq->tx_bd_tail = 0;
|
|
|
|
txq->tx_bd_head = 0;
|
|
|
|
txq->nb_tx_avail = txq->nb_tx_desc;
|
|
|
|
dev->data->tx_queues[queue_idx] = txq;
|
|
|
|
if (!sc->tx_queues) sc->tx_queues = dev->data->tx_queues;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static inline void
|
|
|
|
bnx2x_upd_rx_prod_fast(struct bnx2x_softc *sc, struct bnx2x_fastpath *fp,
|
|
|
|
uint16_t rx_bd_prod, uint16_t rx_cq_prod)
|
|
|
|
{
|
net/bnx2x: fix build with GCC 11
Reproduced with '--buildtype=debugoptimized' config,
compiler version: gcc (GCC) 12.0.0 20210509 (experimental)
Build error:
In file included from ../drivers/net/bnx2x/bnx2x_rxtx.c:8:
../drivers/net/bnx2x/bnx2x_rxtx.c: In function ‘bnx2x_upd_rx_prod_fast’:
../drivers/net/bnx2x/bnx2x.h:1528:35:
warning: ‘rx_prods’ is used uninitialized [-Wuninitialized]
#define REG_WR32(sc, offset, val) bnx2x_reg_write32(sc, (offset), val)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/net/bnx2x/bnx2x.h:1531:33:
note: in expansion of macro ‘REG_WR32’
1531 | #define REG_WR(sc, offset, val) REG_WR32(sc, offset, val)
| ^~~~~~~~
../drivers/net/bnx2x/bnx2x_rxtx.c:331:9:
note: in expansion of macro ‘REG_WR’
331 | REG_WR(sc, fp->ustorm_rx_prods_offset, val[0]);
| ^~~~~~
../drivers/net/bnx2x/bnx2x_rxtx.c:324:40: note: ‘rx_prods’ declared here
324 | struct ustorm_eth_rx_producers rx_prods = { 0 };
| ^~~~~~~~
REG_WR32 requires 'uint32_t', use union instead of cast to 'uint32_t'.
Bugzilla ID: 692
Fixes: 38dff79ba736 ("net/bnx2x: update HSI")
Cc: stable@dpdk.org
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Kevin Traynor <ktraynor@redhat.com>
2021-05-11 13:14:32 +00:00
|
|
|
union {
|
|
|
|
struct ustorm_eth_rx_producers rx_prods;
|
|
|
|
uint32_t val;
|
|
|
|
} val = { {0} };
|
2015-07-20 16:33:18 +00:00
|
|
|
|
net/bnx2x: fix build with GCC 11
Reproduced with '--buildtype=debugoptimized' config,
compiler version: gcc (GCC) 12.0.0 20210509 (experimental)
Build error:
In file included from ../drivers/net/bnx2x/bnx2x_rxtx.c:8:
../drivers/net/bnx2x/bnx2x_rxtx.c: In function ‘bnx2x_upd_rx_prod_fast’:
../drivers/net/bnx2x/bnx2x.h:1528:35:
warning: ‘rx_prods’ is used uninitialized [-Wuninitialized]
#define REG_WR32(sc, offset, val) bnx2x_reg_write32(sc, (offset), val)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/net/bnx2x/bnx2x.h:1531:33:
note: in expansion of macro ‘REG_WR32’
1531 | #define REG_WR(sc, offset, val) REG_WR32(sc, offset, val)
| ^~~~~~~~
../drivers/net/bnx2x/bnx2x_rxtx.c:331:9:
note: in expansion of macro ‘REG_WR’
331 | REG_WR(sc, fp->ustorm_rx_prods_offset, val[0]);
| ^~~~~~
../drivers/net/bnx2x/bnx2x_rxtx.c:324:40: note: ‘rx_prods’ declared here
324 | struct ustorm_eth_rx_producers rx_prods = { 0 };
| ^~~~~~~~
REG_WR32 requires 'uint32_t', use union instead of cast to 'uint32_t'.
Bugzilla ID: 692
Fixes: 38dff79ba736 ("net/bnx2x: update HSI")
Cc: stable@dpdk.org
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Kevin Traynor <ktraynor@redhat.com>
2021-05-11 13:14:32 +00:00
|
|
|
val.rx_prods.bd_prod = rx_bd_prod;
|
|
|
|
val.rx_prods.cqe_prod = rx_cq_prod;
|
2015-07-20 16:33:18 +00:00
|
|
|
|
net/bnx2x: fix build with GCC 11
Reproduced with '--buildtype=debugoptimized' config,
compiler version: gcc (GCC) 12.0.0 20210509 (experimental)
Build error:
In file included from ../drivers/net/bnx2x/bnx2x_rxtx.c:8:
../drivers/net/bnx2x/bnx2x_rxtx.c: In function ‘bnx2x_upd_rx_prod_fast’:
../drivers/net/bnx2x/bnx2x.h:1528:35:
warning: ‘rx_prods’ is used uninitialized [-Wuninitialized]
#define REG_WR32(sc, offset, val) bnx2x_reg_write32(sc, (offset), val)
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
../drivers/net/bnx2x/bnx2x.h:1531:33:
note: in expansion of macro ‘REG_WR32’
1531 | #define REG_WR(sc, offset, val) REG_WR32(sc, offset, val)
| ^~~~~~~~
../drivers/net/bnx2x/bnx2x_rxtx.c:331:9:
note: in expansion of macro ‘REG_WR’
331 | REG_WR(sc, fp->ustorm_rx_prods_offset, val[0]);
| ^~~~~~
../drivers/net/bnx2x/bnx2x_rxtx.c:324:40: note: ‘rx_prods’ declared here
324 | struct ustorm_eth_rx_producers rx_prods = { 0 };
| ^~~~~~~~
REG_WR32 requires 'uint32_t', use union instead of cast to 'uint32_t'.
Bugzilla ID: 692
Fixes: 38dff79ba736 ("net/bnx2x: update HSI")
Cc: stable@dpdk.org
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
Acked-by: Kevin Traynor <ktraynor@redhat.com>
2021-05-11 13:14:32 +00:00
|
|
|
REG_WR(sc, fp->ustorm_rx_prods_offset, val.val);
|
2015-07-20 16:33:18 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static uint16_t
|
|
|
|
bnx2x_recv_pkts(void *p_rxq, struct rte_mbuf **rx_pkts, uint16_t nb_pkts)
|
|
|
|
{
|
|
|
|
struct bnx2x_rx_queue *rxq = p_rxq;
|
|
|
|
struct bnx2x_softc *sc = rxq->sc;
|
|
|
|
struct bnx2x_fastpath *fp = &sc->fp[rxq->queue_id];
|
|
|
|
uint32_t nb_rx = 0;
|
|
|
|
uint16_t hw_cq_cons, sw_cq_cons, sw_cq_prod;
|
|
|
|
uint16_t bd_cons, bd_prod;
|
|
|
|
struct rte_mbuf *new_mb;
|
|
|
|
uint16_t rx_pref;
|
|
|
|
struct eth_fast_path_rx_cqe *cqe_fp;
|
2020-05-05 03:08:12 +00:00
|
|
|
uint16_t len, pad, bd_len, buf_len;
|
2015-07-20 16:33:18 +00:00
|
|
|
struct rte_mbuf *rx_mb = NULL;
|
2020-05-05 03:08:12 +00:00
|
|
|
static bool log_once = true;
|
2015-07-20 16:33:18 +00:00
|
|
|
|
2020-01-26 22:54:19 +00:00
|
|
|
rte_spinlock_lock(&(fp)->rx_mtx);
|
|
|
|
|
2015-07-20 16:33:18 +00:00
|
|
|
hw_cq_cons = le16toh(*fp->rx_cq_cons_sb);
|
|
|
|
if ((hw_cq_cons & USABLE_RCQ_ENTRIES_PER_PAGE) ==
|
|
|
|
USABLE_RCQ_ENTRIES_PER_PAGE) {
|
|
|
|
++hw_cq_cons;
|
|
|
|
}
|
|
|
|
|
|
|
|
bd_cons = rxq->rx_bd_head;
|
|
|
|
bd_prod = rxq->rx_bd_tail;
|
|
|
|
sw_cq_cons = rxq->rx_cq_head;
|
|
|
|
sw_cq_prod = rxq->rx_cq_tail;
|
|
|
|
|
2020-01-26 22:54:19 +00:00
|
|
|
if (sw_cq_cons == hw_cq_cons) {
|
|
|
|
rte_spinlock_unlock(&(fp)->rx_mtx);
|
2015-12-11 18:31:54 +00:00
|
|
|
return 0;
|
2020-01-26 22:54:19 +00:00
|
|
|
}
|
2015-12-11 18:31:54 +00:00
|
|
|
|
2015-07-20 16:33:18 +00:00
|
|
|
while (nb_rx < nb_pkts && sw_cq_cons != hw_cq_cons) {
|
|
|
|
|
|
|
|
bd_prod &= MAX_RX_BD(rxq);
|
|
|
|
bd_cons &= MAX_RX_BD(rxq);
|
|
|
|
|
|
|
|
cqe_fp = &rxq->cq_ring[sw_cq_cons & MAX_RX_BD(rxq)].fast_path_cqe;
|
|
|
|
|
|
|
|
if (unlikely(CQE_TYPE_SLOW(cqe_fp->type_error_flags & ETH_FAST_PATH_RX_CQE_TYPE))) {
|
|
|
|
PMD_RX_LOG(ERR, "slowpath event during traffic processing");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (unlikely(cqe_fp->type_error_flags & ETH_FAST_PATH_RX_CQE_PHY_DECODE_ERR_FLG)) {
|
|
|
|
PMD_RX_LOG(ERR, "flags 0x%x rx packet %u",
|
|
|
|
cqe_fp->type_error_flags, sw_cq_cons);
|
|
|
|
goto next_rx;
|
|
|
|
}
|
|
|
|
|
|
|
|
len = cqe_fp->pkt_len_or_gro_seg_len;
|
|
|
|
pad = cqe_fp->placement_offset;
|
2020-05-05 03:08:12 +00:00
|
|
|
bd_len = cqe_fp->len_on_bd;
|
|
|
|
buf_len = rxq->sw_ring[bd_cons]->buf_len;
|
|
|
|
|
|
|
|
/* Check for sufficient buffer length */
|
|
|
|
if (unlikely(buf_len < len + (pad + RTE_PKTMBUF_HEADROOM))) {
|
|
|
|
if (unlikely(log_once)) {
|
|
|
|
PMD_DRV_LOG(ERR, sc, "mbuf size %d is not enough to hold Rx packet length more than %d",
|
|
|
|
buf_len - RTE_PKTMBUF_HEADROOM,
|
|
|
|
buf_len -
|
|
|
|
(pad + RTE_PKTMBUF_HEADROOM));
|
|
|
|
log_once = false;
|
|
|
|
}
|
|
|
|
goto next_rx;
|
|
|
|
}
|
2015-07-20 16:33:18 +00:00
|
|
|
|
2016-05-11 14:43:46 +00:00
|
|
|
new_mb = rte_mbuf_raw_alloc(rxq->mb_pool);
|
2015-07-20 16:33:18 +00:00
|
|
|
if (unlikely(!new_mb)) {
|
|
|
|
PMD_RX_LOG(ERR, "mbuf alloc fail fp[%02d]", fp->index);
|
2016-05-12 00:06:21 +00:00
|
|
|
rte_eth_devices[rxq->port_id].data->
|
|
|
|
rx_mbuf_alloc_failed++;
|
2015-07-20 16:33:18 +00:00
|
|
|
goto next_rx;
|
|
|
|
}
|
|
|
|
|
|
|
|
rx_mb = rxq->sw_ring[bd_cons];
|
|
|
|
rxq->sw_ring[bd_cons] = new_mb;
|
2018-02-06 11:20:33 +00:00
|
|
|
rxq->rx_ring[bd_prod] =
|
|
|
|
rte_cpu_to_le_64(rte_mbuf_data_iova_default(new_mb));
|
2015-07-20 16:33:18 +00:00
|
|
|
|
|
|
|
rx_pref = NEXT_RX_BD(bd_cons) & MAX_RX_BD(rxq);
|
|
|
|
rte_prefetch0(rxq->sw_ring[rx_pref]);
|
|
|
|
if ((rx_pref & 0x3) == 0) {
|
|
|
|
rte_prefetch0(&rxq->rx_ring[rx_pref]);
|
|
|
|
rte_prefetch0(&rxq->sw_ring[rx_pref]);
|
|
|
|
}
|
|
|
|
|
2018-02-06 11:20:33 +00:00
|
|
|
rx_mb->data_off = pad + RTE_PKTMBUF_HEADROOM;
|
2015-07-20 16:33:18 +00:00
|
|
|
rx_mb->nb_segs = 1;
|
|
|
|
rx_mb->next = NULL;
|
2020-05-05 03:08:12 +00:00
|
|
|
rx_mb->pkt_len = len;
|
|
|
|
rx_mb->data_len = bd_len;
|
2015-07-20 16:33:18 +00:00
|
|
|
rx_mb->port = rxq->port_id;
|
|
|
|
rte_prefetch1(rte_pktmbuf_mtod(rx_mb, void *));
|
|
|
|
|
|
|
|
/*
|
|
|
|
* If we received a packet with a vlan tag,
|
|
|
|
* attach that information to the packet.
|
|
|
|
*/
|
|
|
|
if (cqe_fp->pars_flags.flags & PARSING_FLAGS_VLAN) {
|
|
|
|
rx_mb->vlan_tci = cqe_fp->vlan_tag;
|
2021-10-15 19:24:08 +00:00
|
|
|
rx_mb->ol_flags |= RTE_MBUF_F_RX_VLAN | RTE_MBUF_F_RX_VLAN_STRIPPED;
|
2015-07-20 16:33:18 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
rx_pkts[nb_rx] = rx_mb;
|
|
|
|
nb_rx++;
|
|
|
|
|
|
|
|
/* limit spinning on the queue */
|
|
|
|
if (unlikely(nb_rx == sc->rx_budget)) {
|
|
|
|
PMD_RX_LOG(ERR, "Limit spinning on the queue");
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
next_rx:
|
|
|
|
bd_cons = NEXT_RX_BD(bd_cons);
|
|
|
|
bd_prod = NEXT_RX_BD(bd_prod);
|
|
|
|
sw_cq_prod = NEXT_RCQ_IDX(sw_cq_prod);
|
|
|
|
sw_cq_cons = NEXT_RCQ_IDX(sw_cq_cons);
|
|
|
|
}
|
|
|
|
rxq->rx_bd_head = bd_cons;
|
|
|
|
rxq->rx_bd_tail = bd_prod;
|
|
|
|
rxq->rx_cq_head = sw_cq_cons;
|
|
|
|
rxq->rx_cq_tail = sw_cq_prod;
|
|
|
|
|
|
|
|
bnx2x_upd_rx_prod_fast(sc, fp, bd_prod, sw_cq_prod);
|
|
|
|
|
2020-01-26 22:54:19 +00:00
|
|
|
rte_spinlock_unlock(&(fp)->rx_mtx);
|
|
|
|
|
2015-07-20 16:33:18 +00:00
|
|
|
return nb_rx;
|
|
|
|
}
|
|
|
|
|
2019-04-12 01:47:40 +00:00
|
|
|
static uint16_t
|
|
|
|
bnx2x_rxtx_pkts_dummy(__rte_unused void *p_rxq,
|
|
|
|
__rte_unused struct rte_mbuf **rx_pkts,
|
|
|
|
__rte_unused uint16_t nb_pkts)
|
2015-07-20 16:33:18 +00:00
|
|
|
{
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2019-04-12 01:47:40 +00:00
|
|
|
void bnx2x_dev_rxtx_init_dummy(struct rte_eth_dev *dev)
|
|
|
|
{
|
|
|
|
dev->rx_pkt_burst = bnx2x_rxtx_pkts_dummy;
|
|
|
|
dev->tx_pkt_burst = bnx2x_rxtx_pkts_dummy;
|
|
|
|
}
|
|
|
|
|
|
|
|
void bnx2x_dev_rxtx_init(struct rte_eth_dev *dev)
|
|
|
|
{
|
|
|
|
dev->rx_pkt_burst = bnx2x_recv_pkts;
|
|
|
|
dev->tx_pkt_burst = bnx2x_xmit_pkts;
|
|
|
|
}
|
|
|
|
|
2015-07-20 16:33:18 +00:00
|
|
|
void
|
|
|
|
bnx2x_dev_clear_queues(struct rte_eth_dev *dev)
|
|
|
|
{
|
2018-09-29 05:42:29 +00:00
|
|
|
struct bnx2x_softc *sc = dev->data->dev_private;
|
2015-07-20 16:33:18 +00:00
|
|
|
uint8_t i;
|
|
|
|
|
2018-09-29 05:42:29 +00:00
|
|
|
PMD_INIT_FUNC_TRACE(sc);
|
2015-07-20 16:33:18 +00:00
|
|
|
|
|
|
|
for (i = 0; i < dev->data->nb_tx_queues; i++) {
|
|
|
|
struct bnx2x_tx_queue *txq = dev->data->tx_queues[i];
|
|
|
|
if (txq != NULL) {
|
|
|
|
bnx2x_tx_queue_release(txq);
|
|
|
|
dev->data->tx_queues[i] = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < dev->data->nb_rx_queues; i++) {
|
|
|
|
struct bnx2x_rx_queue *rxq = dev->data->rx_queues[i];
|
|
|
|
if (rxq != NULL) {
|
|
|
|
bnx2x_rx_queue_release(rxq);
|
|
|
|
dev->data->rx_queues[i] = NULL;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|