49 lines
1.1 KiB
C
49 lines
1.1 KiB
C
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2018 Intel Corporation
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*/
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#ifndef _IPSEC_SQN_H_
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#define _IPSEC_SQN_H_
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#define WINDOW_BUCKET_BITS 6 /* uint64_t */
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#define WINDOW_BUCKET_SIZE (1 << WINDOW_BUCKET_BITS)
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#define WINDOW_BIT_LOC_MASK (WINDOW_BUCKET_SIZE - 1)
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/* minimum number of bucket, power of 2*/
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#define WINDOW_BUCKET_MIN 2
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#define WINDOW_BUCKET_MAX (INT16_MAX + 1)
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#define IS_ESN(sa) ((sa)->sqn_mask == UINT64_MAX)
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/*
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* for given size, calculate required number of buckets.
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*/
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static uint32_t
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replay_num_bucket(uint32_t wsz)
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{
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uint32_t nb;
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nb = rte_align32pow2(RTE_ALIGN_MUL_CEIL(wsz, WINDOW_BUCKET_SIZE) /
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WINDOW_BUCKET_SIZE);
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nb = RTE_MAX(nb, (uint32_t)WINDOW_BUCKET_MIN);
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return nb;
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}
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/**
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* Based on number of buckets calculated required size for the
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* structure that holds replay window and sequence number (RSN) information.
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*/
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static size_t
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rsn_size(uint32_t nb_bucket)
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{
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size_t sz;
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struct replay_sqn *rsn;
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sz = sizeof(*rsn) + nb_bucket * sizeof(rsn->window[0]);
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sz = RTE_ALIGN_CEIL(sz, RTE_CACHE_LINE_SIZE);
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return sz;
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}
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#endif /* _IPSEC_SQN_H_ */
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