682 lines
14 KiB
C
682 lines
14 KiB
C
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2015-2017 Intel Corporation
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*/
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#include <string.h>
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#include <rte_common.h>
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#include <rte_malloc.h>
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#include <rte_cryptodev_pmd.h>
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#include "rte_aesni_mb_pmd_private.h"
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static const struct rte_cryptodev_capabilities aesni_mb_pmd_capabilities[] = {
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{ /* MD5 HMAC */
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.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
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{.sym = {
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.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
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{.auth = {
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.algo = RTE_CRYPTO_AUTH_MD5_HMAC,
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.block_size = 64,
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.key_size = {
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.min = 1,
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.max = 64,
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.increment = 1
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},
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.digest_size = {
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.min = 1,
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.max = 16,
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.increment = 1
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},
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.iv_size = { 0 }
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}, }
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}, }
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},
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{ /* SHA1 HMAC */
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.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
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{.sym = {
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.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
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{.auth = {
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.algo = RTE_CRYPTO_AUTH_SHA1_HMAC,
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.block_size = 64,
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.key_size = {
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.min = 1,
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.max = 65535,
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.increment = 1
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},
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.digest_size = {
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.min = 1,
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.max = 20,
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.increment = 1
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},
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.iv_size = { 0 }
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}, }
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}, }
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},
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{ /* SHA224 HMAC */
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.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
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{.sym = {
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.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
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{.auth = {
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.algo = RTE_CRYPTO_AUTH_SHA224_HMAC,
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.block_size = 64,
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.key_size = {
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.min = 1,
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.max = 65535,
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.increment = 1
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},
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.digest_size = {
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.min = 1,
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.max = 28,
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.increment = 1
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},
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.iv_size = { 0 }
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}, }
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}, }
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},
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{ /* SHA256 HMAC */
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.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
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{.sym = {
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.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
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{.auth = {
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.algo = RTE_CRYPTO_AUTH_SHA256_HMAC,
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.block_size = 64,
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.key_size = {
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.min = 1,
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.max = 65535,
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.increment = 1
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},
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.digest_size = {
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.min = 1,
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.max = 32,
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.increment = 1
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},
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.iv_size = { 0 }
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}, }
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}, }
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},
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{ /* SHA384 HMAC */
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.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
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{.sym = {
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.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
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{.auth = {
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.algo = RTE_CRYPTO_AUTH_SHA384_HMAC,
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.block_size = 128,
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.key_size = {
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.min = 1,
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.max = 65535,
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.increment = 1
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},
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.digest_size = {
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.min = 1,
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.max = 48,
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.increment = 1
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},
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.iv_size = { 0 }
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}, }
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}, }
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},
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{ /* SHA512 HMAC */
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.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
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{.sym = {
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.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
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{.auth = {
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.algo = RTE_CRYPTO_AUTH_SHA512_HMAC,
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.block_size = 128,
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.key_size = {
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.min = 1,
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.max = 65535,
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.increment = 1
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},
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.digest_size = {
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.min = 1,
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.max = 64,
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.increment = 1
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},
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.iv_size = { 0 }
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}, }
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}, }
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},
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{ /* AES XCBC HMAC */
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.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
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{.sym = {
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.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
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{.auth = {
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.algo = RTE_CRYPTO_AUTH_AES_XCBC_MAC,
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.block_size = 16,
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.key_size = {
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.min = 16,
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.max = 16,
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.increment = 0
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},
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.digest_size = {
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.min = 12,
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.max = 12,
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.increment = 0
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},
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.iv_size = { 0 }
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}, }
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}, }
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},
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{ /* AES CBC */
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.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
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{.sym = {
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.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
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{.cipher = {
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.algo = RTE_CRYPTO_CIPHER_AES_CBC,
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.block_size = 16,
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.key_size = {
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.min = 16,
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.max = 32,
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.increment = 8
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},
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.iv_size = {
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.min = 16,
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.max = 16,
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.increment = 0
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}
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}, }
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}, }
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},
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{ /* AES CTR */
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.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
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{.sym = {
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.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
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{.cipher = {
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.algo = RTE_CRYPTO_CIPHER_AES_CTR,
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.block_size = 16,
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.key_size = {
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.min = 16,
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.max = 32,
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.increment = 8
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},
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.iv_size = {
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.min = 12,
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.max = 16,
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.increment = 4
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}
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}, }
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}, }
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},
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{ /* AES DOCSIS BPI */
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.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
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{.sym = {
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.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
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{.cipher = {
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.algo = RTE_CRYPTO_CIPHER_AES_DOCSISBPI,
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.block_size = 16,
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.key_size = {
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.min = 16,
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.max = 16,
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.increment = 0
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},
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.iv_size = {
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.min = 16,
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.max = 16,
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.increment = 0
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}
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}, }
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}, }
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},
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{ /* DES CBC */
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.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
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{.sym = {
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.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
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{.cipher = {
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.algo = RTE_CRYPTO_CIPHER_DES_CBC,
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.block_size = 8,
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.key_size = {
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.min = 8,
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.max = 8,
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.increment = 0
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},
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.iv_size = {
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.min = 8,
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.max = 8,
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.increment = 0
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}
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}, }
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}, }
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},
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{ /* 3DES CBC */
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.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
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{.sym = {
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.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
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{.cipher = {
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.algo = RTE_CRYPTO_CIPHER_3DES_CBC,
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.block_size = 8,
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.key_size = {
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.min = 8,
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.max = 24,
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.increment = 8
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},
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.iv_size = {
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.min = 8,
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.max = 8,
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.increment = 0
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}
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}, }
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}, }
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},
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{ /* DES DOCSIS BPI */
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.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
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{.sym = {
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.xform_type = RTE_CRYPTO_SYM_XFORM_CIPHER,
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{.cipher = {
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.algo = RTE_CRYPTO_CIPHER_DES_DOCSISBPI,
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.block_size = 8,
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.key_size = {
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.min = 8,
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.max = 8,
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.increment = 0
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},
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.iv_size = {
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.min = 8,
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.max = 8,
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.increment = 0
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}
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}, }
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}, }
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},
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{ /* AES CCM */
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.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
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{.sym = {
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.xform_type = RTE_CRYPTO_SYM_XFORM_AEAD,
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{.aead = {
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.algo = RTE_CRYPTO_AEAD_AES_CCM,
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.block_size = 16,
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.key_size = {
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.min = 16,
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.max = 16,
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.increment = 0
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},
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.digest_size = {
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.min = 4,
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.max = 16,
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.increment = 2
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},
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.aad_size = {
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.min = 0,
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.max = 46,
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.increment = 1
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},
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.iv_size = {
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.min = 7,
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.max = 13,
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.increment = 1
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},
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}, }
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}, }
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},
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{ /* AES CMAC */
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.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
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{.sym = {
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.xform_type = RTE_CRYPTO_SYM_XFORM_AUTH,
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{.auth = {
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.algo = RTE_CRYPTO_AUTH_AES_CMAC,
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.block_size = 16,
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.key_size = {
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.min = 16,
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.max = 16,
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.increment = 0
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},
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.digest_size = {
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.min = 1,
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.max = 16,
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.increment = 1
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},
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.iv_size = { 0 }
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}, }
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}, }
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},
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{ /* AES GCM */
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.op = RTE_CRYPTO_OP_TYPE_SYMMETRIC,
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{.sym = {
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.xform_type = RTE_CRYPTO_SYM_XFORM_AEAD,
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{.aead = {
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.algo = RTE_CRYPTO_AEAD_AES_GCM,
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.block_size = 16,
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.key_size = {
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.min = 16,
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.max = 32,
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.increment = 8
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},
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.digest_size = {
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.min = 8,
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.max = 16,
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.increment = 4
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},
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.aad_size = {
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.min = 0,
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.max = 65535,
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.increment = 1
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},
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.iv_size = {
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.min = 12,
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.max = 12,
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.increment = 0
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}
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}, }
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}, }
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},
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RTE_CRYPTODEV_END_OF_CAPABILITIES_LIST()
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};
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/** Configure device */
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static int
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aesni_mb_pmd_config(__rte_unused struct rte_cryptodev *dev,
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__rte_unused struct rte_cryptodev_config *config)
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{
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return 0;
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}
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/** Start device */
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static int
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aesni_mb_pmd_start(__rte_unused struct rte_cryptodev *dev)
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{
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return 0;
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}
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/** Stop device */
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static void
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aesni_mb_pmd_stop(__rte_unused struct rte_cryptodev *dev)
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{
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}
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/** Close device */
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static int
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aesni_mb_pmd_close(__rte_unused struct rte_cryptodev *dev)
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{
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return 0;
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}
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/** Get device statistics */
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static void
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aesni_mb_pmd_stats_get(struct rte_cryptodev *dev,
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struct rte_cryptodev_stats *stats)
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{
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int qp_id;
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|
|
||
|
|
for (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {
|
||
|
|
struct aesni_mb_qp *qp = dev->data->queue_pairs[qp_id];
|
||
|
|
|
||
|
|
stats->enqueued_count += qp->stats.enqueued_count;
|
||
|
|
stats->dequeued_count += qp->stats.dequeued_count;
|
||
|
|
|
||
|
|
stats->enqueue_err_count += qp->stats.enqueue_err_count;
|
||
|
|
stats->dequeue_err_count += qp->stats.dequeue_err_count;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/** Reset device statistics */
|
||
|
|
static void
|
||
|
|
aesni_mb_pmd_stats_reset(struct rte_cryptodev *dev)
|
||
|
|
{
|
||
|
|
int qp_id;
|
||
|
|
|
||
|
|
for (qp_id = 0; qp_id < dev->data->nb_queue_pairs; qp_id++) {
|
||
|
|
struct aesni_mb_qp *qp = dev->data->queue_pairs[qp_id];
|
||
|
|
|
||
|
|
memset(&qp->stats, 0, sizeof(qp->stats));
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
|
||
|
|
/** Get device info */
|
||
|
|
static void
|
||
|
|
aesni_mb_pmd_info_get(struct rte_cryptodev *dev,
|
||
|
|
struct rte_cryptodev_info *dev_info)
|
||
|
|
{
|
||
|
|
struct aesni_mb_private *internals = dev->data->dev_private;
|
||
|
|
|
||
|
|
if (dev_info != NULL) {
|
||
|
|
dev_info->driver_id = dev->driver_id;
|
||
|
|
dev_info->feature_flags = dev->feature_flags;
|
||
|
|
dev_info->capabilities = aesni_mb_pmd_capabilities;
|
||
|
|
dev_info->max_nb_queue_pairs = internals->max_nb_queue_pairs;
|
||
|
|
/* No limit of number of sessions */
|
||
|
|
dev_info->sym.max_nb_sessions = 0;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
/** Release queue pair */
|
||
|
|
static int
|
||
|
|
aesni_mb_pmd_qp_release(struct rte_cryptodev *dev, uint16_t qp_id)
|
||
|
|
{
|
||
|
|
struct aesni_mb_qp *qp = dev->data->queue_pairs[qp_id];
|
||
|
|
struct rte_ring *r = NULL;
|
||
|
|
|
||
|
|
if (qp != NULL) {
|
||
|
|
r = rte_ring_lookup(qp->name);
|
||
|
|
if (r)
|
||
|
|
rte_ring_free(r);
|
||
|
|
if (qp->mb_mgr)
|
||
|
|
free_mb_mgr(qp->mb_mgr);
|
||
|
|
rte_free(qp);
|
||
|
|
dev->data->queue_pairs[qp_id] = NULL;
|
||
|
|
}
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
/** set a unique name for the queue pair based on it's name, dev_id and qp_id */
|
||
|
|
static int
|
||
|
|
aesni_mb_pmd_qp_set_unique_name(struct rte_cryptodev *dev,
|
||
|
|
struct aesni_mb_qp *qp)
|
||
|
|
{
|
||
|
|
unsigned n = snprintf(qp->name, sizeof(qp->name),
|
||
|
|
"aesni_mb_pmd_%u_qp_%u",
|
||
|
|
dev->data->dev_id, qp->id);
|
||
|
|
|
||
|
|
if (n >= sizeof(qp->name))
|
||
|
|
return -1;
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
/** Create a ring to place processed operations on */
|
||
|
|
static struct rte_ring *
|
||
|
|
aesni_mb_pmd_qp_create_processed_ops_ring(struct aesni_mb_qp *qp,
|
||
|
|
unsigned int ring_size, int socket_id)
|
||
|
|
{
|
||
|
|
struct rte_ring *r;
|
||
|
|
char ring_name[RTE_CRYPTODEV_NAME_MAX_LEN];
|
||
|
|
|
||
|
|
unsigned int n = snprintf(ring_name, sizeof(ring_name), "%s", qp->name);
|
||
|
|
|
||
|
|
if (n >= sizeof(ring_name))
|
||
|
|
return NULL;
|
||
|
|
|
||
|
|
r = rte_ring_lookup(ring_name);
|
||
|
|
if (r) {
|
||
|
|
if (rte_ring_get_size(r) >= ring_size) {
|
||
|
|
AESNI_MB_LOG(INFO, "Reusing existing ring %s for processed ops",
|
||
|
|
ring_name);
|
||
|
|
return r;
|
||
|
|
}
|
||
|
|
|
||
|
|
AESNI_MB_LOG(ERR, "Unable to reuse existing ring %s for processed ops",
|
||
|
|
ring_name);
|
||
|
|
return NULL;
|
||
|
|
}
|
||
|
|
|
||
|
|
return rte_ring_create(ring_name, ring_size, socket_id,
|
||
|
|
RING_F_SP_ENQ | RING_F_SC_DEQ);
|
||
|
|
}
|
||
|
|
|
||
|
|
/** Setup a queue pair */
|
||
|
|
static int
|
||
|
|
aesni_mb_pmd_qp_setup(struct rte_cryptodev *dev, uint16_t qp_id,
|
||
|
|
const struct rte_cryptodev_qp_conf *qp_conf,
|
||
|
|
int socket_id, struct rte_mempool *session_pool)
|
||
|
|
{
|
||
|
|
struct aesni_mb_qp *qp = NULL;
|
||
|
|
struct aesni_mb_private *internals = dev->data->dev_private;
|
||
|
|
int ret = -1;
|
||
|
|
|
||
|
|
/* Free memory prior to re-allocation if needed. */
|
||
|
|
if (dev->data->queue_pairs[qp_id] != NULL)
|
||
|
|
aesni_mb_pmd_qp_release(dev, qp_id);
|
||
|
|
|
||
|
|
/* Allocate the queue pair data structure. */
|
||
|
|
qp = rte_zmalloc_socket("AES-NI PMD Queue Pair", sizeof(*qp),
|
||
|
|
RTE_CACHE_LINE_SIZE, socket_id);
|
||
|
|
if (qp == NULL)
|
||
|
|
return -ENOMEM;
|
||
|
|
|
||
|
|
qp->id = qp_id;
|
||
|
|
dev->data->queue_pairs[qp_id] = qp;
|
||
|
|
|
||
|
|
if (aesni_mb_pmd_qp_set_unique_name(dev, qp))
|
||
|
|
goto qp_setup_cleanup;
|
||
|
|
|
||
|
|
|
||
|
|
qp->mb_mgr = alloc_mb_mgr(0);
|
||
|
|
if (qp->mb_mgr == NULL) {
|
||
|
|
ret = -ENOMEM;
|
||
|
|
goto qp_setup_cleanup;
|
||
|
|
}
|
||
|
|
|
||
|
|
switch (internals->vector_mode) {
|
||
|
|
case RTE_AESNI_MB_SSE:
|
||
|
|
dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_SSE;
|
||
|
|
init_mb_mgr_sse(qp->mb_mgr);
|
||
|
|
break;
|
||
|
|
case RTE_AESNI_MB_AVX:
|
||
|
|
dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX;
|
||
|
|
init_mb_mgr_avx(qp->mb_mgr);
|
||
|
|
break;
|
||
|
|
case RTE_AESNI_MB_AVX2:
|
||
|
|
dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX2;
|
||
|
|
init_mb_mgr_avx2(qp->mb_mgr);
|
||
|
|
break;
|
||
|
|
case RTE_AESNI_MB_AVX512:
|
||
|
|
dev->feature_flags |= RTE_CRYPTODEV_FF_CPU_AVX512;
|
||
|
|
init_mb_mgr_avx512(qp->mb_mgr);
|
||
|
|
break;
|
||
|
|
default:
|
||
|
|
AESNI_MB_LOG(ERR, "Unsupported vector mode %u\n",
|
||
|
|
internals->vector_mode);
|
||
|
|
goto qp_setup_cleanup;
|
||
|
|
}
|
||
|
|
|
||
|
|
qp->ingress_queue = aesni_mb_pmd_qp_create_processed_ops_ring(qp,
|
||
|
|
qp_conf->nb_descriptors, socket_id);
|
||
|
|
if (qp->ingress_queue == NULL) {
|
||
|
|
ret = -1;
|
||
|
|
goto qp_setup_cleanup;
|
||
|
|
}
|
||
|
|
|
||
|
|
qp->sess_mp = session_pool;
|
||
|
|
|
||
|
|
memset(&qp->stats, 0, sizeof(qp->stats));
|
||
|
|
|
||
|
|
char mp_name[RTE_MEMPOOL_NAMESIZE];
|
||
|
|
|
||
|
|
snprintf(mp_name, RTE_MEMPOOL_NAMESIZE,
|
||
|
|
"digest_mp_%u_%u", dev->data->dev_id, qp_id);
|
||
|
|
return 0;
|
||
|
|
|
||
|
|
qp_setup_cleanup:
|
||
|
|
if (qp) {
|
||
|
|
if (qp->mb_mgr)
|
||
|
|
free_mb_mgr(qp->mb_mgr);
|
||
|
|
rte_free(qp);
|
||
|
|
}
|
||
|
|
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
/** Return the number of allocated queue pairs */
|
||
|
|
static uint32_t
|
||
|
|
aesni_mb_pmd_qp_count(struct rte_cryptodev *dev)
|
||
|
|
{
|
||
|
|
return dev->data->nb_queue_pairs;
|
||
|
|
}
|
||
|
|
|
||
|
|
/** Returns the size of the aesni multi-buffer session structure */
|
||
|
|
static unsigned
|
||
|
|
aesni_mb_pmd_sym_session_get_size(struct rte_cryptodev *dev __rte_unused)
|
||
|
|
{
|
||
|
|
return sizeof(struct aesni_mb_session);
|
||
|
|
}
|
||
|
|
|
||
|
|
/** Configure a aesni multi-buffer session from a crypto xform chain */
|
||
|
|
static int
|
||
|
|
aesni_mb_pmd_sym_session_configure(struct rte_cryptodev *dev,
|
||
|
|
struct rte_crypto_sym_xform *xform,
|
||
|
|
struct rte_cryptodev_sym_session *sess,
|
||
|
|
struct rte_mempool *mempool)
|
||
|
|
{
|
||
|
|
void *sess_private_data;
|
||
|
|
struct aesni_mb_private *internals = dev->data->dev_private;
|
||
|
|
int ret;
|
||
|
|
|
||
|
|
if (unlikely(sess == NULL)) {
|
||
|
|
AESNI_MB_LOG(ERR, "invalid session struct");
|
||
|
|
return -EINVAL;
|
||
|
|
}
|
||
|
|
|
||
|
|
if (rte_mempool_get(mempool, &sess_private_data)) {
|
||
|
|
AESNI_MB_LOG(ERR,
|
||
|
|
"Couldn't get object from session mempool");
|
||
|
|
return -ENOMEM;
|
||
|
|
}
|
||
|
|
|
||
|
|
ret = aesni_mb_set_session_parameters(internals->mb_mgr,
|
||
|
|
sess_private_data, xform);
|
||
|
|
if (ret != 0) {
|
||
|
|
AESNI_MB_LOG(ERR, "failed configure session parameters");
|
||
|
|
|
||
|
|
/* Return session to mempool */
|
||
|
|
rte_mempool_put(mempool, sess_private_data);
|
||
|
|
return ret;
|
||
|
|
}
|
||
|
|
|
||
|
|
set_sym_session_private_data(sess, dev->driver_id,
|
||
|
|
sess_private_data);
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
/** Clear the memory of session so it doesn't leave key material behind */
|
||
|
|
static void
|
||
|
|
aesni_mb_pmd_sym_session_clear(struct rte_cryptodev *dev,
|
||
|
|
struct rte_cryptodev_sym_session *sess)
|
||
|
|
{
|
||
|
|
uint8_t index = dev->driver_id;
|
||
|
|
void *sess_priv = get_sym_session_private_data(sess, index);
|
||
|
|
|
||
|
|
/* Zero out the whole structure */
|
||
|
|
if (sess_priv) {
|
||
|
|
memset(sess_priv, 0, sizeof(struct aesni_mb_session));
|
||
|
|
struct rte_mempool *sess_mp = rte_mempool_from_obj(sess_priv);
|
||
|
|
set_sym_session_private_data(sess, index, NULL);
|
||
|
|
rte_mempool_put(sess_mp, sess_priv);
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
struct rte_cryptodev_ops aesni_mb_pmd_ops = {
|
||
|
|
.dev_configure = aesni_mb_pmd_config,
|
||
|
|
.dev_start = aesni_mb_pmd_start,
|
||
|
|
.dev_stop = aesni_mb_pmd_stop,
|
||
|
|
.dev_close = aesni_mb_pmd_close,
|
||
|
|
|
||
|
|
.stats_get = aesni_mb_pmd_stats_get,
|
||
|
|
.stats_reset = aesni_mb_pmd_stats_reset,
|
||
|
|
|
||
|
|
.dev_infos_get = aesni_mb_pmd_info_get,
|
||
|
|
|
||
|
|
.queue_pair_setup = aesni_mb_pmd_qp_setup,
|
||
|
|
.queue_pair_release = aesni_mb_pmd_qp_release,
|
||
|
|
.queue_pair_count = aesni_mb_pmd_qp_count,
|
||
|
|
|
||
|
|
.sym_session_get_size = aesni_mb_pmd_sym_session_get_size,
|
||
|
|
.sym_session_configure = aesni_mb_pmd_sym_session_configure,
|
||
|
|
.sym_session_clear = aesni_mb_pmd_sym_session_clear
|
||
|
|
};
|
||
|
|
|
||
|
|
struct rte_cryptodev_ops *rte_aesni_mb_pmd_ops = &aesni_mb_pmd_ops;
|