2021-07-09 10:55:47 +00:00
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2010-2021 Intel Corporation
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* Copyright(c) 2021 Arm Limited
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*/
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2022-08-27 11:32:22 +00:00
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#include <stdlib.h>
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2021-07-09 10:55:47 +00:00
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#include <rte_memcpy.h>
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#include "power_cppc_cpufreq.h"
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#include "power_common.h"
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/* macros used for rounding frequency to nearest 100000 */
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#define FREQ_ROUNDING_DELTA 50000
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#define ROUND_FREQ_TO_N_100000 100000
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/* the unit of highest_perf and nominal_perf differs on different arm platforms.
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* For highest_perf, it maybe 300 or 3000000, both means 3.0GHz.
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*/
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#define UNIT_DIFF 10000
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#define POWER_CONVERT_TO_DECIMAL 10
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#define POWER_GOVERNOR_USERSPACE "userspace"
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#define POWER_SYSFILE_SETSPEED \
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"/sys/devices/system/cpu/cpu%u/cpufreq/scaling_setspeed"
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#define POWER_SYSFILE_SCALING_MAX_FREQ \
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"/sys/devices/system/cpu/cpu%u/cpufreq/scaling_max_freq"
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#define POWER_SYSFILE_SCALING_MIN_FREQ \
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"/sys/devices/system/cpu/cpu%u/cpufreq/scaling_min_freq"
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#define POWER_SYSFILE_HIGHEST_PERF \
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"/sys/devices/system/cpu/cpu%u/acpi_cppc/highest_perf"
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#define POWER_SYSFILE_NOMINAL_PERF \
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"/sys/devices/system/cpu/cpu%u/acpi_cppc/nominal_perf"
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#define POWER_SYSFILE_SYS_MAX \
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"/sys/devices/system/cpu/cpu%u/cpufreq/cpuinfo_max_freq"
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#define POWER_CPPC_DRIVER "cppc-cpufreq"
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#define BUS_FREQ 100000
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enum power_state {
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POWER_IDLE = 0,
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POWER_ONGOING,
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POWER_USED,
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POWER_UNKNOWN
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};
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/**
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* Power info per lcore.
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*/
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struct cppc_power_info {
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unsigned int lcore_id; /**< Logical core id */
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uint32_t state; /**< Power in use state */
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FILE *f; /**< FD of scaling_setspeed */
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char governor_ori[32]; /**< Original governor name */
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uint32_t curr_idx; /**< Freq index in freqs array */
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uint32_t highest_perf; /**< system wide max freq */
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uint32_t nominal_perf; /**< system wide nominal freq */
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uint16_t turbo_available; /**< Turbo Boost available */
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uint16_t turbo_enable; /**< Turbo Boost enable/disable */
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uint32_t nb_freqs; /**< number of available freqs */
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uint32_t freqs[RTE_MAX_LCORE_FREQS]; /**< Frequency array */
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} __rte_cache_aligned;
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static struct cppc_power_info lcore_power_info[RTE_MAX_LCORE];
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/**
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* It is to set specific freq for specific logical core, according to the index
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* of supported frequencies.
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*/
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static int
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set_freq_internal(struct cppc_power_info *pi, uint32_t idx)
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{
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if (idx >= RTE_MAX_LCORE_FREQS || idx >= pi->nb_freqs) {
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RTE_LOG(ERR, POWER, "Invalid frequency index %u, which "
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"should be less than %u\n", idx, pi->nb_freqs);
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return -1;
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}
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/* Check if it is the same as current */
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if (idx == pi->curr_idx)
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return 0;
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POWER_DEBUG_TRACE("Frequency[%u] %u to be set for lcore %u\n",
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idx, pi->freqs[idx], pi->lcore_id);
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if (fseek(pi->f, 0, SEEK_SET) < 0) {
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RTE_LOG(ERR, POWER, "Fail to set file position indicator to 0 "
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"for setting frequency for lcore %u\n", pi->lcore_id);
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return -1;
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}
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if (fprintf(pi->f, "%u", pi->freqs[idx]) < 0) {
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RTE_LOG(ERR, POWER, "Fail to write new frequency for "
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"lcore %u\n", pi->lcore_id);
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return -1;
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}
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fflush(pi->f);
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pi->curr_idx = idx;
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return 1;
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}
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/**
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* It is to check the current scaling governor by reading sys file, and then
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* set it into 'userspace' if it is not by writing the sys file. The original
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* governor will be saved for rolling back.
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*/
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static int
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power_set_governor_userspace(struct cppc_power_info *pi)
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{
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return power_set_governor(pi->lcore_id, POWER_GOVERNOR_USERSPACE,
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pi->governor_ori, sizeof(pi->governor_ori));
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}
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static int
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power_check_turbo(struct cppc_power_info *pi)
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{
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FILE *f_nom = NULL, *f_max = NULL, *f_cmax = NULL;
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int ret = -1;
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uint32_t nominal_perf = 0, highest_perf = 0, cpuinfo_max_freq = 0;
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open_core_sysfs_file(&f_max, "r", POWER_SYSFILE_HIGHEST_PERF,
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pi->lcore_id);
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if (f_max == NULL) {
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RTE_LOG(ERR, POWER, "failed to open %s\n",
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POWER_SYSFILE_HIGHEST_PERF);
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goto err;
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}
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open_core_sysfs_file(&f_nom, "r", POWER_SYSFILE_NOMINAL_PERF,
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pi->lcore_id);
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if (f_nom == NULL) {
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RTE_LOG(ERR, POWER, "failed to open %s\n",
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POWER_SYSFILE_NOMINAL_PERF);
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goto err;
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}
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open_core_sysfs_file(&f_cmax, "r", POWER_SYSFILE_SYS_MAX,
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pi->lcore_id);
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if (f_cmax == NULL) {
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RTE_LOG(ERR, POWER, "failed to open %s\n",
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POWER_SYSFILE_SYS_MAX);
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goto err;
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}
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ret = read_core_sysfs_u32(f_max, &highest_perf);
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if (ret < 0) {
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RTE_LOG(ERR, POWER, "Failed to read %s\n",
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POWER_SYSFILE_HIGHEST_PERF);
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goto err;
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}
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ret = read_core_sysfs_u32(f_nom, &nominal_perf);
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if (ret < 0) {
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RTE_LOG(ERR, POWER, "Failed to read %s\n",
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POWER_SYSFILE_NOMINAL_PERF);
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goto err;
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}
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ret = read_core_sysfs_u32(f_cmax, &cpuinfo_max_freq);
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if (ret < 0) {
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RTE_LOG(ERR, POWER, "Failed to read %s\n",
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POWER_SYSFILE_SYS_MAX);
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goto err;
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}
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pi->highest_perf = highest_perf;
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pi->nominal_perf = nominal_perf;
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if ((highest_perf > nominal_perf) && ((cpuinfo_max_freq == highest_perf)
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|| cpuinfo_max_freq == highest_perf * UNIT_DIFF)) {
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pi->turbo_available = 1;
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pi->turbo_enable = 1;
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ret = 0;
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POWER_DEBUG_TRACE("Lcore %u can do Turbo Boost! highest perf %u, "
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"nominal perf %u\n",
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pi->lcore_id, highest_perf, nominal_perf);
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} else {
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pi->turbo_available = 0;
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pi->turbo_enable = 0;
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POWER_DEBUG_TRACE("Lcore %u Turbo not available! highest perf %u, "
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"nominal perf %u\n",
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pi->lcore_id, highest_perf, nominal_perf);
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}
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err:
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if (f_max != NULL)
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fclose(f_max);
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if (f_nom != NULL)
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fclose(f_nom);
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if (f_cmax != NULL)
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fclose(f_cmax);
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return ret;
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}
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/**
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* It is to get the available frequencies of the specific lcore by reading the
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* sys file.
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*/
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static int
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power_get_available_freqs(struct cppc_power_info *pi)
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{
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FILE *f_min = NULL, *f_max = NULL;
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int ret = -1;
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uint32_t scaling_min_freq = 0, scaling_max_freq = 0, nominal_perf = 0;
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uint32_t i, num_freqs = 0;
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open_core_sysfs_file(&f_max, "r", POWER_SYSFILE_SCALING_MAX_FREQ,
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pi->lcore_id);
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if (f_max == NULL) {
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RTE_LOG(ERR, POWER, "failed to open %s\n",
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POWER_SYSFILE_SCALING_MAX_FREQ);
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goto out;
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}
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open_core_sysfs_file(&f_min, "r", POWER_SYSFILE_SCALING_MIN_FREQ,
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pi->lcore_id);
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if (f_min == NULL) {
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RTE_LOG(ERR, POWER, "failed to open %s\n",
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POWER_SYSFILE_SCALING_MIN_FREQ);
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goto out;
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}
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ret = read_core_sysfs_u32(f_max, &scaling_max_freq);
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if (ret < 0) {
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RTE_LOG(ERR, POWER, "Failed to read %s\n",
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POWER_SYSFILE_SCALING_MAX_FREQ);
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goto out;
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}
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ret = read_core_sysfs_u32(f_min, &scaling_min_freq);
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if (ret < 0) {
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RTE_LOG(ERR, POWER, "Failed to read %s\n",
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POWER_SYSFILE_SCALING_MIN_FREQ);
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goto out;
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}
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power_check_turbo(pi);
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if (scaling_max_freq < scaling_min_freq)
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goto out;
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/* If turbo is available then there is one extra freq bucket
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* to store the sys max freq which value is scaling_max_freq
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*/
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nominal_perf = (pi->nominal_perf < UNIT_DIFF) ?
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pi->nominal_perf * UNIT_DIFF : pi->nominal_perf;
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num_freqs = (nominal_perf - scaling_min_freq) / BUS_FREQ + 1 +
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pi->turbo_available;
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2021-07-23 02:22:42 +00:00
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if (num_freqs >= RTE_MAX_LCORE_FREQS) {
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RTE_LOG(ERR, POWER, "Too many available frequencies: %d\n",
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num_freqs);
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goto out;
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}
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2021-07-09 10:55:47 +00:00
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/* Generate the freq bucket array. */
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for (i = 0, pi->nb_freqs = 0; i < num_freqs; i++) {
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if ((i == 0) && pi->turbo_available)
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pi->freqs[pi->nb_freqs++] = scaling_max_freq;
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else
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pi->freqs[pi->nb_freqs++] =
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nominal_perf - (i - pi->turbo_available) * BUS_FREQ;
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}
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ret = 0;
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POWER_DEBUG_TRACE("%d frequency(s) of lcore %u are available\n",
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num_freqs, pi->lcore_id);
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out:
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if (f_min != NULL)
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fclose(f_min);
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if (f_max != NULL)
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fclose(f_max);
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return ret;
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}
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/**
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* It is to fopen the sys file for the future setting the lcore frequency.
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*/
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static int
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power_init_for_setting_freq(struct cppc_power_info *pi)
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{
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FILE *f = NULL;
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char buf[BUFSIZ];
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uint32_t i, freq;
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int ret;
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open_core_sysfs_file(&f, "rw+", POWER_SYSFILE_SETSPEED, pi->lcore_id);
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if (f == NULL) {
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RTE_LOG(ERR, POWER, "failed to open %s\n",
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POWER_SYSFILE_SETSPEED);
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goto err;
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}
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ret = read_core_sysfs_s(f, buf, sizeof(buf));
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if (ret < 0) {
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RTE_LOG(ERR, POWER, "Failed to read %s\n",
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POWER_SYSFILE_SETSPEED);
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goto err;
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}
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freq = strtoul(buf, NULL, POWER_CONVERT_TO_DECIMAL);
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/* convert the frequency to nearest 100000 value
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* Ex: if freq=1396789 then freq_conv=1400000
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* Ex: if freq=800030 then freq_conv=800000
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*/
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unsigned int freq_conv = 0;
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freq_conv = (freq + FREQ_ROUNDING_DELTA)
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/ ROUND_FREQ_TO_N_100000;
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freq_conv = freq_conv * ROUND_FREQ_TO_N_100000;
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for (i = 0; i < pi->nb_freqs; i++) {
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if (freq_conv == pi->freqs[i]) {
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pi->curr_idx = i;
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pi->f = f;
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return 0;
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}
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}
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err:
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if (f != NULL)
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fclose(f);
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return -1;
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}
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int
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power_cppc_cpufreq_check_supported(void)
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{
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return cpufreq_check_scaling_driver(POWER_CPPC_DRIVER);
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}
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int
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power_cppc_cpufreq_init(unsigned int lcore_id)
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{
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struct cppc_power_info *pi;
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uint32_t exp_state;
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if (lcore_id >= RTE_MAX_LCORE) {
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RTE_LOG(ERR, POWER, "Lcore id %u can not exceeds %u\n",
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lcore_id, RTE_MAX_LCORE - 1U);
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return -1;
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}
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pi = &lcore_power_info[lcore_id];
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exp_state = POWER_IDLE;
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/* The power in use state works as a guard variable between
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* the CPU frequency control initialization and exit process.
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* The ACQUIRE memory ordering here pairs with the RELEASE
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|
* ordering below as lock to make sure the frequency operations
|
|
|
|
* in the critical section are done under the correct state.
|
|
|
|
*/
|
|
|
|
if (!__atomic_compare_exchange_n(&(pi->state), &exp_state,
|
|
|
|
POWER_ONGOING, 0,
|
|
|
|
__ATOMIC_ACQUIRE, __ATOMIC_RELAXED)) {
|
|
|
|
RTE_LOG(INFO, POWER, "Power management of lcore %u is "
|
|
|
|
"in use\n", lcore_id);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
pi->lcore_id = lcore_id;
|
|
|
|
/* Check and set the governor */
|
|
|
|
if (power_set_governor_userspace(pi) < 0) {
|
|
|
|
RTE_LOG(ERR, POWER, "Cannot set governor of lcore %u to "
|
|
|
|
"userspace\n", lcore_id);
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get the available frequencies */
|
|
|
|
if (power_get_available_freqs(pi) < 0) {
|
|
|
|
RTE_LOG(ERR, POWER, "Cannot get available frequencies of "
|
|
|
|
"lcore %u\n", lcore_id);
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Init for setting lcore frequency */
|
|
|
|
if (power_init_for_setting_freq(pi) < 0) {
|
|
|
|
RTE_LOG(ERR, POWER, "Cannot init for setting frequency for "
|
|
|
|
"lcore %u\n", lcore_id);
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Set freq to max by default */
|
|
|
|
if (power_cppc_cpufreq_freq_max(lcore_id) < 0) {
|
|
|
|
RTE_LOG(ERR, POWER, "Cannot set frequency of lcore %u "
|
|
|
|
"to max\n", lcore_id);
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
RTE_LOG(INFO, POWER, "Initialized successfully for lcore %u "
|
|
|
|
"power management\n", lcore_id);
|
|
|
|
|
|
|
|
__atomic_store_n(&(pi->state), POWER_USED, __ATOMIC_RELEASE);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
fail:
|
|
|
|
__atomic_store_n(&(pi->state), POWER_UNKNOWN, __ATOMIC_RELEASE);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/**
|
|
|
|
* It is to check the governor and then set the original governor back if
|
|
|
|
* needed by writing the sys file.
|
|
|
|
*/
|
|
|
|
static int
|
|
|
|
power_set_governor_original(struct cppc_power_info *pi)
|
|
|
|
{
|
|
|
|
return power_set_governor(pi->lcore_id, pi->governor_ori, NULL, 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
power_cppc_cpufreq_exit(unsigned int lcore_id)
|
|
|
|
{
|
|
|
|
struct cppc_power_info *pi;
|
|
|
|
uint32_t exp_state;
|
|
|
|
|
|
|
|
if (lcore_id >= RTE_MAX_LCORE) {
|
|
|
|
RTE_LOG(ERR, POWER, "Lcore id %u can not exceeds %u\n",
|
|
|
|
lcore_id, RTE_MAX_LCORE - 1U);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
pi = &lcore_power_info[lcore_id];
|
|
|
|
exp_state = POWER_USED;
|
|
|
|
/* The power in use state works as a guard variable between
|
|
|
|
* the CPU frequency control initialization and exit process.
|
|
|
|
* The ACQUIRE memory ordering here pairs with the RELEASE
|
|
|
|
* ordering below as lock to make sure the frequency operations
|
|
|
|
* in the critical section are done under the correct state.
|
|
|
|
*/
|
|
|
|
if (!__atomic_compare_exchange_n(&(pi->state), &exp_state,
|
|
|
|
POWER_ONGOING, 0,
|
|
|
|
__ATOMIC_ACQUIRE, __ATOMIC_RELAXED)) {
|
|
|
|
RTE_LOG(INFO, POWER, "Power management of lcore %u is "
|
|
|
|
"not used\n", lcore_id);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Close FD of setting freq */
|
|
|
|
fclose(pi->f);
|
|
|
|
pi->f = NULL;
|
|
|
|
|
|
|
|
/* Set the governor back to the original */
|
|
|
|
if (power_set_governor_original(pi) < 0) {
|
|
|
|
RTE_LOG(ERR, POWER, "Cannot set the governor of %u back "
|
|
|
|
"to the original\n", lcore_id);
|
|
|
|
goto fail;
|
|
|
|
}
|
|
|
|
|
|
|
|
RTE_LOG(INFO, POWER, "Power management of lcore %u has exited from "
|
|
|
|
"'userspace' mode and been set back to the "
|
|
|
|
"original\n", lcore_id);
|
|
|
|
__atomic_store_n(&(pi->state), POWER_IDLE, __ATOMIC_RELEASE);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
fail:
|
|
|
|
__atomic_store_n(&(pi->state), POWER_UNKNOWN, __ATOMIC_RELEASE);
|
|
|
|
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t
|
|
|
|
power_cppc_cpufreq_freqs(unsigned int lcore_id, uint32_t *freqs, uint32_t num)
|
|
|
|
{
|
|
|
|
struct cppc_power_info *pi;
|
|
|
|
|
|
|
|
if (lcore_id >= RTE_MAX_LCORE) {
|
|
|
|
RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (freqs == NULL) {
|
|
|
|
RTE_LOG(ERR, POWER, "NULL buffer supplied\n");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
pi = &lcore_power_info[lcore_id];
|
|
|
|
if (num < pi->nb_freqs) {
|
|
|
|
RTE_LOG(ERR, POWER, "Buffer size is not enough\n");
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
rte_memcpy(freqs, pi->freqs, pi->nb_freqs * sizeof(uint32_t));
|
|
|
|
|
|
|
|
return pi->nb_freqs;
|
|
|
|
}
|
|
|
|
|
|
|
|
uint32_t
|
|
|
|
power_cppc_cpufreq_get_freq(unsigned int lcore_id)
|
|
|
|
{
|
|
|
|
if (lcore_id >= RTE_MAX_LCORE) {
|
|
|
|
RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
|
|
|
|
return RTE_POWER_INVALID_FREQ_INDEX;
|
|
|
|
}
|
|
|
|
|
|
|
|
return lcore_power_info[lcore_id].curr_idx;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
power_cppc_cpufreq_set_freq(unsigned int lcore_id, uint32_t index)
|
|
|
|
{
|
|
|
|
if (lcore_id >= RTE_MAX_LCORE) {
|
|
|
|
RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
return set_freq_internal(&(lcore_power_info[lcore_id]), index);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
power_cppc_cpufreq_freq_down(unsigned int lcore_id)
|
|
|
|
{
|
|
|
|
struct cppc_power_info *pi;
|
|
|
|
|
|
|
|
if (lcore_id >= RTE_MAX_LCORE) {
|
|
|
|
RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
pi = &lcore_power_info[lcore_id];
|
|
|
|
if (pi->curr_idx + 1 == pi->nb_freqs)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
/* Frequencies in the array are from high to low. */
|
|
|
|
return set_freq_internal(pi, pi->curr_idx + 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
power_cppc_cpufreq_freq_up(unsigned int lcore_id)
|
|
|
|
{
|
|
|
|
struct cppc_power_info *pi;
|
|
|
|
|
|
|
|
if (lcore_id >= RTE_MAX_LCORE) {
|
|
|
|
RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
pi = &lcore_power_info[lcore_id];
|
|
|
|
if (pi->curr_idx == 0 || (pi->curr_idx == 1 &&
|
|
|
|
pi->turbo_available && !pi->turbo_enable))
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
/* Frequencies in the array are from high to low. */
|
|
|
|
return set_freq_internal(pi, pi->curr_idx - 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
power_cppc_cpufreq_freq_max(unsigned int lcore_id)
|
|
|
|
{
|
|
|
|
if (lcore_id >= RTE_MAX_LCORE) {
|
|
|
|
RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Frequencies in the array are from high to low. */
|
|
|
|
if (lcore_power_info[lcore_id].turbo_available) {
|
|
|
|
if (lcore_power_info[lcore_id].turbo_enable)
|
|
|
|
/* Set to Turbo */
|
|
|
|
return set_freq_internal(
|
|
|
|
&lcore_power_info[lcore_id], 0);
|
|
|
|
else
|
|
|
|
/* Set to max non-turbo */
|
|
|
|
return set_freq_internal(
|
|
|
|
&lcore_power_info[lcore_id], 1);
|
|
|
|
} else
|
|
|
|
return set_freq_internal(&lcore_power_info[lcore_id], 0);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
power_cppc_cpufreq_freq_min(unsigned int lcore_id)
|
|
|
|
{
|
|
|
|
struct cppc_power_info *pi;
|
|
|
|
|
|
|
|
if (lcore_id >= RTE_MAX_LCORE) {
|
|
|
|
RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
pi = &lcore_power_info[lcore_id];
|
|
|
|
|
|
|
|
/* Frequencies in the array are from high to low. */
|
|
|
|
return set_freq_internal(pi, pi->nb_freqs - 1);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
power_cppc_turbo_status(unsigned int lcore_id)
|
|
|
|
{
|
|
|
|
struct cppc_power_info *pi;
|
|
|
|
|
|
|
|
if (lcore_id >= RTE_MAX_LCORE) {
|
|
|
|
RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
pi = &lcore_power_info[lcore_id];
|
|
|
|
|
|
|
|
return pi->turbo_enable;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
power_cppc_enable_turbo(unsigned int lcore_id)
|
|
|
|
{
|
|
|
|
struct cppc_power_info *pi;
|
|
|
|
|
|
|
|
if (lcore_id >= RTE_MAX_LCORE) {
|
|
|
|
RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
pi = &lcore_power_info[lcore_id];
|
|
|
|
|
|
|
|
if (pi->turbo_available)
|
|
|
|
pi->turbo_enable = 1;
|
|
|
|
else {
|
|
|
|
pi->turbo_enable = 0;
|
|
|
|
RTE_LOG(ERR, POWER,
|
|
|
|
"Failed to enable turbo on lcore %u\n",
|
|
|
|
lcore_id);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
2021-11-29 16:08:02 +00:00
|
|
|
/* TODO: must set to max once enabling Turbo? Considering add condition:
|
2021-07-09 10:55:47 +00:00
|
|
|
* if ((pi->turbo_available) && (pi->curr_idx <= 1))
|
|
|
|
*/
|
|
|
|
/* Max may have changed, so call to max function */
|
|
|
|
if (power_cppc_cpufreq_freq_max(lcore_id) < 0) {
|
|
|
|
RTE_LOG(ERR, POWER,
|
|
|
|
"Failed to set frequency of lcore %u to max\n",
|
|
|
|
lcore_id);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
power_cppc_disable_turbo(unsigned int lcore_id)
|
|
|
|
{
|
|
|
|
struct cppc_power_info *pi;
|
|
|
|
|
|
|
|
if (lcore_id >= RTE_MAX_LCORE) {
|
|
|
|
RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
pi = &lcore_power_info[lcore_id];
|
|
|
|
|
|
|
|
pi->turbo_enable = 0;
|
|
|
|
|
|
|
|
if ((pi->turbo_available) && (pi->curr_idx <= 1)) {
|
|
|
|
/* Try to set freq to max by default coming out of turbo */
|
|
|
|
if (power_cppc_cpufreq_freq_max(lcore_id) < 0) {
|
|
|
|
RTE_LOG(ERR, POWER,
|
|
|
|
"Failed to set frequency of lcore %u to max\n",
|
|
|
|
lcore_id);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
power_cppc_get_capabilities(unsigned int lcore_id,
|
|
|
|
struct rte_power_core_capabilities *caps)
|
|
|
|
{
|
|
|
|
struct cppc_power_info *pi;
|
|
|
|
|
|
|
|
if (lcore_id >= RTE_MAX_LCORE) {
|
|
|
|
RTE_LOG(ERR, POWER, "Invalid lcore ID\n");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
if (caps == NULL) {
|
|
|
|
RTE_LOG(ERR, POWER, "Invalid argument\n");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
pi = &lcore_power_info[lcore_id];
|
|
|
|
caps->capabilities = 0;
|
|
|
|
caps->turbo = !!(pi->turbo_available);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|