2014-11-25 17:26:43 +00:00
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/*
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* Copyright 2008-2014 Cisco Systems, Inc. All rights reserved.
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* Copyright 2007 Nuova Systems, Inc. All rights reserved.
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*
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* Copyright (c) 2014, Cisco Systems, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
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* COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
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* BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#ifndef _ENIC_COMPAT_H_
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#define _ENIC_COMPAT_H_
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#include <stdio.h>
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2014-11-29 07:17:37 +00:00
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#include <unistd.h>
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2014-11-25 17:26:43 +00:00
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#include <rte_atomic.h>
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#include <rte_malloc.h>
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2015-02-14 15:32:58 +00:00
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#include <rte_log.h>
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2017-01-18 01:21:33 +00:00
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#include <rte_io.h>
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2014-11-25 17:26:43 +00:00
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2015-02-20 16:13:20 +00:00
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#define ENIC_PAGE_ALIGN 4096UL
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2014-11-25 17:26:43 +00:00
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#define ENIC_ALIGN ENIC_PAGE_ALIGN
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#define NAME_MAX 255
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#define ETH_ALEN 6
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#define __iomem
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#define rmb() rte_rmb() /* dpdk rte provided rmb */
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#define wmb() rte_wmb() /* dpdk rte provided wmb */
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#define le16_to_cpu
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#define le32_to_cpu
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#define le64_to_cpu
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#define cpu_to_le16
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#define cpu_to_le32
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#define cpu_to_le64
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#ifndef offsetof
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#define offsetof(t, m) ((size_t) &((t *)0)->m)
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#endif
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#define pr_err(y, args...) dev_err(0, y, ##args)
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#define pr_warn(y, args...) dev_warning(0, y, ##args)
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#define BUG() pr_err("BUG at %s:%d", __func__, __LINE__)
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2015-02-17 02:08:08 +00:00
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#define VNIC_ALIGN(x, a) __ALIGN_MASK(x, (typeof(x))(a)-1)
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2014-11-25 17:26:43 +00:00
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#define __ALIGN_MASK(x, mask) (((x)+(mask))&~(mask))
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#define udelay usleep
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#define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d))
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#define kzalloc(size, flags) calloc(1, size)
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#define kfree(x) free(x)
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2015-02-14 15:32:58 +00:00
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#define dev_printk(level, fmt, args...) \
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RTE_LOG(level, PMD, "rte_enic_pmd: " fmt, ## args)
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#define dev_err(x, args...) dev_printk(ERR, args)
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#define dev_info(x, args...) dev_printk(INFO, args)
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#define dev_warning(x, args...) dev_printk(WARNING, args)
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#define dev_debug(x, args...) dev_printk(DEBUG, args)
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2014-11-25 17:26:43 +00:00
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#define __le16 u16
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#define __le32 u32
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#define __le64 u64
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typedef unsigned char u8;
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typedef unsigned short u16;
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typedef unsigned int u32;
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typedef unsigned long long u64;
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typedef unsigned long long dma_addr_t;
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2014-11-28 09:38:19 +00:00
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static inline uint32_t ioread32(volatile void *addr)
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2014-11-25 17:26:43 +00:00
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{
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2017-01-18 01:21:33 +00:00
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return rte_read32(addr);
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2014-11-25 17:26:43 +00:00
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}
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2014-11-28 09:38:19 +00:00
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static inline uint16_t ioread16(volatile void *addr)
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2014-11-25 17:26:43 +00:00
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{
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2017-01-18 01:21:33 +00:00
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return rte_read16(addr);
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2014-11-25 17:26:43 +00:00
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}
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2014-11-28 09:38:19 +00:00
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static inline uint8_t ioread8(volatile void *addr)
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2014-11-25 17:26:43 +00:00
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{
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2017-01-18 01:21:33 +00:00
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return rte_read8(addr);
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2014-11-25 17:26:43 +00:00
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}
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2014-11-28 09:38:19 +00:00
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static inline void iowrite32(uint32_t val, volatile void *addr)
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2014-11-25 17:26:43 +00:00
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{
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2017-01-18 01:21:33 +00:00
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rte_write32(val, addr);
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}
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static inline void iowrite32_relaxed(uint32_t val, volatile void *addr)
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{
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rte_write32_relaxed(val, addr);
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2014-11-25 17:26:43 +00:00
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}
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2014-11-28 09:38:19 +00:00
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static inline void iowrite16(uint16_t val, volatile void *addr)
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2014-11-25 17:26:43 +00:00
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{
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2017-01-18 01:21:33 +00:00
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rte_write16(val, addr);
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2014-11-25 17:26:43 +00:00
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}
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2014-11-28 09:38:19 +00:00
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static inline void iowrite8(uint8_t val, volatile void *addr)
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2014-11-25 17:26:43 +00:00
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{
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2017-01-18 01:21:33 +00:00
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rte_write8(val, addr);
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2014-11-25 17:26:43 +00:00
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}
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static inline unsigned int readl(volatile void __iomem *addr)
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{
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2017-01-18 01:21:33 +00:00
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return rte_read32(addr);
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}
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static inline unsigned int readl_relaxed(volatile void __iomem *addr)
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{
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return rte_read32_relaxed(addr);
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2014-11-25 17:26:43 +00:00
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}
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static inline void writel(unsigned int val, volatile void __iomem *addr)
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{
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2017-01-18 01:21:33 +00:00
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rte_write32(val, addr);
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2014-11-25 17:26:43 +00:00
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}
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#define min_t(type, x, y) ({ \
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type __min1 = (x); \
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type __min2 = (y); \
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__min1 < __min2 ? __min1 : __min2; })
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#define max_t(type, x, y) ({ \
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type __max1 = (x); \
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type __max2 = (y); \
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__max1 > __max2 ? __max1 : __max2; })
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#endif /* _ENIC_COMPAT_H_ */
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