2018-01-29 13:11:30 +00:00
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright 2015 6WIND S.A.
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2018-03-20 19:20:35 +00:00
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* Copyright 2015 Mellanox Technologies, Ltd
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2015-10-30 18:55:11 +00:00
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*/
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#include <stddef.h>
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#include <stdint.h>
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#include <errno.h>
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#include <string.h>
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#include <rte_malloc.h>
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2021-01-29 16:48:19 +00:00
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#include <ethdev_driver.h>
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2015-10-30 18:55:11 +00:00
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2020-06-28 07:35:26 +00:00
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#include <mlx5_malloc.h>
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2018-01-03 09:14:19 +00:00
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#include "mlx5_defs.h"
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2020-01-29 12:38:27 +00:00
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#include "mlx5.h"
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2015-10-30 18:55:11 +00:00
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#include "mlx5_rxtx.h"
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/**
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* DPDK callback to update the RSS hash configuration.
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*
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* @param dev
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* Pointer to Ethernet device structure.
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* @param[in] rss_conf
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* RSS configuration data.
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*
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* @return
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2018-03-05 12:21:06 +00:00
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* 0 on success, a negative errno value otherwise and rte_errno is set.
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2015-10-30 18:55:11 +00:00
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*/
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int
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mlx5_rss_hash_update(struct rte_eth_dev *dev,
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struct rte_eth_rss_conf *rss_conf)
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{
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2019-02-21 09:29:14 +00:00
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struct mlx5_priv *priv = dev->data->dev_private;
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2018-03-21 12:47:51 +00:00
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unsigned int i;
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unsigned int idx;
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2015-10-30 18:55:11 +00:00
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2018-01-03 09:14:19 +00:00
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if (rss_conf->rss_hf & MLX5_RSS_HF_MASK) {
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2018-03-05 12:21:06 +00:00
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rte_errno = EINVAL;
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return -rte_errno;
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2018-01-03 09:14:19 +00:00
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}
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2017-10-23 11:17:57 +00:00
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if (rss_conf->rss_key && rss_conf->rss_key_len) {
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2018-07-12 09:30:59 +00:00
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if (rss_conf->rss_key_len != MLX5_RSS_HASH_KEY_LEN) {
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2018-03-26 10:12:18 +00:00
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DRV_LOG(ERR,
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2018-07-12 09:30:59 +00:00
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"port %u RSS key len must be %s Bytes long",
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dev->data->port_id,
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RTE_STR(MLX5_RSS_HASH_KEY_LEN));
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2018-03-26 10:12:18 +00:00
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rte_errno = EINVAL;
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return -rte_errno;
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}
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2020-06-28 07:35:26 +00:00
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priv->rss_conf.rss_key = mlx5_realloc(priv->rss_conf.rss_key,
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MLX5_MEM_RTE,
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rss_conf->rss_key_len,
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0, SOCKET_ID_ANY);
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2017-10-09 14:44:56 +00:00
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if (!priv->rss_conf.rss_key) {
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2018-03-05 12:21:06 +00:00
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rte_errno = ENOMEM;
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return -rte_errno;
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2017-10-09 14:44:56 +00:00
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}
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2017-10-23 11:17:57 +00:00
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memcpy(priv->rss_conf.rss_key, rss_conf->rss_key,
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2017-10-09 14:44:56 +00:00
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rss_conf->rss_key_len);
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priv->rss_conf.rss_key_len = rss_conf->rss_key_len;
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}
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priv->rss_conf.rss_hf = rss_conf->rss_hf;
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2018-03-21 12:47:51 +00:00
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/* Enable the RSS hash in all Rx queues. */
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for (i = 0, idx = 0; idx != priv->rxqs_n; ++i) {
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if (!(*priv->rxqs)[i])
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continue;
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(*priv->rxqs)[i]->rss_hash = !!rss_conf->rss_hf &&
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!!(dev->data->dev_conf.rxmode.mq_mode & ETH_MQ_RX_RSS);
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++idx;
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}
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2018-03-05 12:21:06 +00:00
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return 0;
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2015-10-30 18:55:11 +00:00
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}
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/**
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* DPDK callback to get the RSS hash configuration.
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*
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* @param dev
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* Pointer to Ethernet device structure.
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* @param[in, out] rss_conf
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* RSS configuration data.
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*
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* @return
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2018-03-05 12:21:06 +00:00
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* 0 on success, a negative errno value otherwise and rte_errno is set.
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2015-10-30 18:55:11 +00:00
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*/
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int
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mlx5_rss_hash_conf_get(struct rte_eth_dev *dev,
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struct rte_eth_rss_conf *rss_conf)
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{
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2019-02-21 09:29:14 +00:00
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struct mlx5_priv *priv = dev->data->dev_private;
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2015-10-30 18:55:11 +00:00
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2018-03-05 12:21:06 +00:00
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if (!rss_conf) {
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rte_errno = EINVAL;
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return -rte_errno;
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}
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2017-10-23 11:17:57 +00:00
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if (rss_conf->rss_key &&
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(rss_conf->rss_key_len >= priv->rss_conf.rss_key_len)) {
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memcpy(rss_conf->rss_key, priv->rss_conf.rss_key,
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priv->rss_conf.rss_key_len);
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2017-10-09 14:44:56 +00:00
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}
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2017-10-23 11:17:57 +00:00
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rss_conf->rss_key_len = priv->rss_conf.rss_key_len;
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rss_conf->rss_hf = priv->rss_conf.rss_hf;
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return 0;
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2015-10-30 18:55:11 +00:00
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}
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2015-11-02 18:11:57 +00:00
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/**
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* Allocate/reallocate RETA index table.
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*
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2018-03-05 12:21:04 +00:00
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* @param dev
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* Pointer to Ethernet device.
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2015-11-02 18:11:57 +00:00
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* @praram reta_size
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* The size of the array to allocate.
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*
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* @return
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2018-03-05 12:21:06 +00:00
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* 0 on success, a negative errno value otherwise and rte_errno is set.
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2015-11-02 18:11:57 +00:00
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*/
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int
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2018-03-05 12:21:04 +00:00
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mlx5_rss_reta_index_resize(struct rte_eth_dev *dev, unsigned int reta_size)
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2015-11-02 18:11:57 +00:00
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{
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2019-02-21 09:29:14 +00:00
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struct mlx5_priv *priv = dev->data->dev_private;
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2015-11-02 18:11:57 +00:00
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void *mem;
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unsigned int old_size = priv->reta_idx_n;
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if (priv->reta_idx_n == reta_size)
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return 0;
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2020-06-28 07:35:26 +00:00
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mem = mlx5_realloc(priv->reta_idx, MLX5_MEM_RTE,
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reta_size * sizeof((*priv->reta_idx)[0]), 0,
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SOCKET_ID_ANY);
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2018-03-05 12:21:06 +00:00
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if (!mem) {
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rte_errno = ENOMEM;
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return -rte_errno;
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}
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2015-11-02 18:11:57 +00:00
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priv->reta_idx = mem;
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priv->reta_idx_n = reta_size;
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if (old_size < reta_size)
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memset(&(*priv->reta_idx)[old_size], 0,
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(reta_size - old_size) *
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sizeof((*priv->reta_idx)[0]));
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return 0;
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}
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/**
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2018-03-05 12:21:04 +00:00
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* DPDK callback to get the RETA indirection table.
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2015-11-02 18:11:57 +00:00
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*
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2018-03-05 12:21:04 +00:00
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* @param dev
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* Pointer to Ethernet device structure.
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* @param reta_conf
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* Pointer to RETA configuration structure array.
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2015-11-02 18:11:57 +00:00
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* @param reta_size
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2018-03-05 12:21:04 +00:00
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* Size of the RETA table.
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2015-11-02 18:11:57 +00:00
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*
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* @return
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2018-03-05 12:21:06 +00:00
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* 0 on success, a negative errno value otherwise and rte_errno is set.
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2015-11-02 18:11:57 +00:00
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*/
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2018-03-05 12:21:04 +00:00
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int
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mlx5_dev_rss_reta_query(struct rte_eth_dev *dev,
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2015-11-02 18:11:57 +00:00
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struct rte_eth_rss_reta_entry64 *reta_conf,
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2018-03-05 12:21:04 +00:00
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uint16_t reta_size)
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2015-11-02 18:11:57 +00:00
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{
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2019-02-21 09:29:14 +00:00
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struct mlx5_priv *priv = dev->data->dev_private;
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2015-11-02 18:11:57 +00:00
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unsigned int idx;
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unsigned int i;
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2018-03-05 12:21:06 +00:00
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if (!reta_size || reta_size > priv->reta_idx_n) {
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rte_errno = EINVAL;
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return -rte_errno;
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}
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2015-11-02 18:11:57 +00:00
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/* Fill each entry of the table even if its bit is not set. */
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for (idx = 0, i = 0; (i != reta_size); ++i) {
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idx = i / RTE_RETA_GROUP_SIZE;
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reta_conf[idx].reta[i % RTE_RETA_GROUP_SIZE] =
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(*priv->reta_idx)[i];
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}
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return 0;
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}
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/**
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2018-03-05 12:21:04 +00:00
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* DPDK callback to update the RETA indirection table.
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2015-11-02 18:11:57 +00:00
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*
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2018-03-05 12:21:04 +00:00
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* @param dev
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* Pointer to Ethernet device structure.
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* @param reta_conf
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* Pointer to RETA configuration structure array.
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2015-11-02 18:11:57 +00:00
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* @param reta_size
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2018-03-05 12:21:04 +00:00
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* Size of the RETA table.
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2015-11-02 18:11:57 +00:00
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*
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* @return
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2018-03-05 12:21:06 +00:00
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* 0 on success, a negative errno value otherwise and rte_errno is set.
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2015-11-02 18:11:57 +00:00
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*/
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2018-03-05 12:21:04 +00:00
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int
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mlx5_dev_rss_reta_update(struct rte_eth_dev *dev,
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2015-11-02 18:11:57 +00:00
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struct rte_eth_rss_reta_entry64 *reta_conf,
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2018-03-05 12:21:04 +00:00
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uint16_t reta_size)
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2015-11-02 18:11:57 +00:00
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{
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2018-03-05 12:21:04 +00:00
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int ret;
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2019-02-21 09:29:14 +00:00
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struct mlx5_priv *priv = dev->data->dev_private;
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2015-11-02 18:11:57 +00:00
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unsigned int idx;
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unsigned int i;
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unsigned int pos;
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2018-03-05 12:21:06 +00:00
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if (!reta_size) {
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rte_errno = EINVAL;
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return -rte_errno;
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}
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2018-03-05 12:21:04 +00:00
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ret = mlx5_rss_reta_index_resize(dev, reta_size);
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2015-11-02 18:11:57 +00:00
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if (ret)
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return ret;
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for (idx = 0, i = 0; (i != reta_size); ++i) {
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idx = i / RTE_RETA_GROUP_SIZE;
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pos = i % RTE_RETA_GROUP_SIZE;
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if (((reta_conf[idx].mask >> i) & 0x1) == 0)
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continue;
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2020-01-30 16:14:40 +00:00
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MLX5_ASSERT(reta_conf[idx].reta[pos] < priv->rxqs_n);
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2015-11-02 18:11:57 +00:00
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(*priv->reta_idx)[i] = reta_conf[idx].reta[pos];
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}
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2020-07-16 10:43:20 +00:00
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priv->skip_default_rss_reta = 1;
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2017-10-09 14:44:43 +00:00
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if (dev->data->dev_started) {
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mlx5_dev_stop(dev);
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2018-03-05 12:21:06 +00:00
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return mlx5_dev_start(dev);
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2017-10-09 14:44:43 +00:00
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}
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2018-03-05 12:21:06 +00:00
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return 0;
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2015-11-02 18:11:57 +00:00
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}
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