2019-06-28 18:23:29 +00:00
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(C) 2019 Marvell International Ltd.
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*/
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#include "otx2_worker_dual.h"
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#include "otx2_worker.h"
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2019-06-28 18:23:30 +00:00
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static __rte_noinline uint8_t
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otx2_ssogws_dual_new_event(struct otx2_ssogws_dual *ws,
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const struct rte_event *ev)
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{
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const uint32_t tag = (uint32_t)ev->event;
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const uint8_t new_tt = ev->sched_type;
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const uint64_t event_ptr = ev->u64;
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const uint16_t grp = ev->queue_id;
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if (ws->xaq_lmt <= *ws->fc_mem)
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return 0;
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otx2_ssogws_dual_add_work(ws, event_ptr, tag, new_tt, grp);
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return 1;
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}
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static __rte_always_inline void
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otx2_ssogws_dual_fwd_swtag(struct otx2_ssogws_state *ws,
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const struct rte_event *ev)
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{
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2021-01-12 08:39:38 +00:00
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const uint8_t cur_tt = OTX2_SSOW_TT_FROM_TAG(otx2_read64(ws->tag_op));
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2019-06-28 18:23:30 +00:00
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const uint32_t tag = (uint32_t)ev->event;
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const uint8_t new_tt = ev->sched_type;
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/* 96XX model
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* cur_tt/new_tt SSO_SYNC_ORDERED SSO_SYNC_ATOMIC SSO_SYNC_UNTAGGED
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*
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* SSO_SYNC_ORDERED norm norm untag
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* SSO_SYNC_ATOMIC norm norm untag
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* SSO_SYNC_UNTAGGED norm norm NOOP
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*/
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if (new_tt == SSO_SYNC_UNTAGGED) {
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if (cur_tt != SSO_SYNC_UNTAGGED)
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otx2_ssogws_swtag_untag((struct otx2_ssogws *)ws);
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} else {
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otx2_ssogws_swtag_norm((struct otx2_ssogws *)ws, tag, new_tt);
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}
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}
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static __rte_always_inline void
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otx2_ssogws_dual_fwd_group(struct otx2_ssogws_state *ws,
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const struct rte_event *ev, const uint16_t grp)
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{
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const uint32_t tag = (uint32_t)ev->event;
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const uint8_t new_tt = ev->sched_type;
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otx2_write64(ev->u64, OTX2_SSOW_GET_BASE_ADDR(ws->getwrk_op) +
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SSOW_LF_GWS_OP_UPD_WQP_GRP1);
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rte_smp_wmb();
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otx2_ssogws_swtag_desched((struct otx2_ssogws *)ws, tag, new_tt, grp);
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}
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static __rte_always_inline void
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otx2_ssogws_dual_forward_event(struct otx2_ssogws_dual *ws,
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struct otx2_ssogws_state *vws,
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const struct rte_event *ev)
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{
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const uint8_t grp = ev->queue_id;
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/* Group hasn't changed, Use SWTAG to forward the event */
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2021-01-12 08:39:38 +00:00
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if (OTX2_SSOW_GRP_FROM_TAG(otx2_read64(vws->tag_op)) == grp) {
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2019-06-28 18:23:30 +00:00
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otx2_ssogws_dual_fwd_swtag(vws, ev);
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ws->swtag_req = 1;
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} else {
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2021-01-12 08:39:38 +00:00
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/*
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* Group has been changed for group based work pipelining,
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* Use deschedule/add_work operation to transfer the event to
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* new group/core
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*/
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2019-06-28 18:23:30 +00:00
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otx2_ssogws_dual_fwd_group(vws, ev, grp);
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}
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}
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2020-02-09 17:39:19 +00:00
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uint16_t __rte_hot
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2019-06-28 18:23:30 +00:00
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otx2_ssogws_dual_enq(void *port, const struct rte_event *ev)
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{
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struct otx2_ssogws_dual *ws = port;
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struct otx2_ssogws_state *vws = &ws->ws_state[!ws->vws];
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switch (ev->op) {
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case RTE_EVENT_OP_NEW:
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rte_smp_mb();
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return otx2_ssogws_dual_new_event(ws, ev);
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case RTE_EVENT_OP_FORWARD:
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otx2_ssogws_dual_forward_event(ws, vws, ev);
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break;
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case RTE_EVENT_OP_RELEASE:
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2021-01-12 08:39:38 +00:00
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otx2_ssogws_swtag_flush(vws->tag_op, vws->swtag_flush_op);
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2019-06-28 18:23:30 +00:00
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break;
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default:
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return 0;
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}
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return 1;
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}
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2020-02-09 17:39:19 +00:00
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uint16_t __rte_hot
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2019-06-28 18:23:30 +00:00
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otx2_ssogws_dual_enq_burst(void *port, const struct rte_event ev[],
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uint16_t nb_events)
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{
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RTE_SET_USED(nb_events);
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return otx2_ssogws_dual_enq(port, ev);
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}
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2020-02-09 17:39:19 +00:00
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uint16_t __rte_hot
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2019-06-28 18:23:30 +00:00
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otx2_ssogws_dual_enq_new_burst(void *port, const struct rte_event ev[],
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uint16_t nb_events)
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{
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struct otx2_ssogws_dual *ws = port;
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uint16_t i, rc = 1;
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rte_smp_mb();
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if (ws->xaq_lmt <= *ws->fc_mem)
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return 0;
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for (i = 0; i < nb_events && rc; i++)
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rc = otx2_ssogws_dual_new_event(ws, &ev[i]);
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return nb_events;
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}
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2020-02-09 17:39:19 +00:00
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uint16_t __rte_hot
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2019-06-28 18:23:30 +00:00
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otx2_ssogws_dual_enq_fwd_burst(void *port, const struct rte_event ev[],
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uint16_t nb_events)
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{
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struct otx2_ssogws_dual *ws = port;
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struct otx2_ssogws_state *vws = &ws->ws_state[!ws->vws];
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RTE_SET_USED(nb_events);
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otx2_ssogws_dual_forward_event(ws, vws, ev);
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return 1;
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}
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2019-06-28 18:23:31 +00:00
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2020-02-04 11:17:22 +00:00
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#define R(name, f6, f5, f4, f3, f2, f1, f0, flags) \
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2020-02-09 17:39:19 +00:00
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uint16_t __rte_hot \
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2019-07-04 02:19:37 +00:00
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otx2_ssogws_dual_deq_ ##name(void *port, struct rte_event *ev, \
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uint64_t timeout_ticks) \
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{ \
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struct otx2_ssogws_dual *ws = port; \
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uint8_t gw; \
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\
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2019-10-23 16:07:07 +00:00
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rte_prefetch_non_temporal(ws); \
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2019-07-04 02:19:37 +00:00
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RTE_SET_USED(timeout_ticks); \
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if (ws->swtag_req) { \
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otx2_ssogws_swtag_wait((struct otx2_ssogws *) \
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&ws->ws_state[!ws->vws]); \
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ws->swtag_req = 0; \
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return 1; \
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} \
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\
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gw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws], \
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&ws->ws_state[!ws->vws], ev, \
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2019-07-04 02:19:38 +00:00
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flags, ws->lookup_mem, \
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ws->tstamp); \
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2019-07-04 02:19:37 +00:00
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ws->vws = !ws->vws; \
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\
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return gw; \
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} \
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\
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2020-02-09 17:39:19 +00:00
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uint16_t __rte_hot \
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2019-07-04 02:19:37 +00:00
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otx2_ssogws_dual_deq_burst_ ##name(void *port, struct rte_event ev[], \
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uint16_t nb_events, \
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uint64_t timeout_ticks) \
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{ \
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RTE_SET_USED(nb_events); \
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\
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return otx2_ssogws_dual_deq_ ##name(port, ev, timeout_ticks); \
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} \
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\
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2020-02-09 17:39:19 +00:00
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uint16_t __rte_hot \
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2019-07-04 02:19:37 +00:00
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otx2_ssogws_dual_deq_timeout_ ##name(void *port, struct rte_event *ev, \
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uint64_t timeout_ticks) \
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{ \
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struct otx2_ssogws_dual *ws = port; \
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uint64_t iter; \
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uint8_t gw; \
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\
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if (ws->swtag_req) { \
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otx2_ssogws_swtag_wait((struct otx2_ssogws *) \
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&ws->ws_state[!ws->vws]); \
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ws->swtag_req = 0; \
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return 1; \
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} \
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\
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gw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws], \
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&ws->ws_state[!ws->vws], ev, \
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2019-07-04 02:19:38 +00:00
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flags, ws->lookup_mem, \
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ws->tstamp); \
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2019-07-04 02:19:37 +00:00
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ws->vws = !ws->vws; \
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for (iter = 1; iter < timeout_ticks && (gw == 0); iter++) { \
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gw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws], \
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&ws->ws_state[!ws->vws], \
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ev, flags, \
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2019-07-04 02:19:38 +00:00
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ws->lookup_mem, \
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ws->tstamp); \
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2019-07-04 02:19:37 +00:00
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ws->vws = !ws->vws; \
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} \
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\
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return gw; \
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} \
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\
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2020-02-09 17:39:19 +00:00
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uint16_t __rte_hot \
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2019-07-04 02:19:37 +00:00
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otx2_ssogws_dual_deq_timeout_burst_ ##name(void *port, \
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struct rte_event ev[], \
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uint16_t nb_events, \
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uint64_t timeout_ticks) \
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{ \
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RTE_SET_USED(nb_events); \
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\
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return otx2_ssogws_dual_deq_timeout_ ##name(port, ev, \
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timeout_ticks); \
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} \
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\
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2020-02-09 17:39:19 +00:00
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uint16_t __rte_hot \
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2019-07-04 02:19:37 +00:00
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otx2_ssogws_dual_deq_seg_ ##name(void *port, struct rte_event *ev, \
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uint64_t timeout_ticks) \
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{ \
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struct otx2_ssogws_dual *ws = port; \
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uint8_t gw; \
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\
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RTE_SET_USED(timeout_ticks); \
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if (ws->swtag_req) { \
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otx2_ssogws_swtag_wait((struct otx2_ssogws *) \
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&ws->ws_state[!ws->vws]); \
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ws->swtag_req = 0; \
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return 1; \
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} \
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\
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gw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws], \
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&ws->ws_state[!ws->vws], ev, \
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flags | NIX_RX_MULTI_SEG_F, \
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2019-07-04 02:19:38 +00:00
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ws->lookup_mem, \
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ws->tstamp); \
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2019-07-04 02:19:37 +00:00
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ws->vws = !ws->vws; \
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\
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return gw; \
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} \
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\
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2020-02-09 17:39:19 +00:00
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uint16_t __rte_hot \
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2019-07-04 02:19:37 +00:00
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otx2_ssogws_dual_deq_seg_burst_ ##name(void *port, \
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struct rte_event ev[], \
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uint16_t nb_events, \
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uint64_t timeout_ticks) \
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{ \
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RTE_SET_USED(nb_events); \
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\
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return otx2_ssogws_dual_deq_seg_ ##name(port, ev, \
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timeout_ticks); \
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} \
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\
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2020-02-09 17:39:19 +00:00
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uint16_t __rte_hot \
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2019-07-04 02:19:37 +00:00
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otx2_ssogws_dual_deq_seg_timeout_ ##name(void *port, \
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struct rte_event *ev, \
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uint64_t timeout_ticks) \
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{ \
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struct otx2_ssogws_dual *ws = port; \
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uint64_t iter; \
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uint8_t gw; \
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\
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if (ws->swtag_req) { \
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otx2_ssogws_swtag_wait((struct otx2_ssogws *) \
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&ws->ws_state[!ws->vws]); \
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ws->swtag_req = 0; \
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return 1; \
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} \
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\
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gw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws], \
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&ws->ws_state[!ws->vws], ev, \
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flags | NIX_RX_MULTI_SEG_F, \
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2019-07-04 02:19:38 +00:00
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ws->lookup_mem, \
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ws->tstamp); \
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2019-07-04 02:19:37 +00:00
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ws->vws = !ws->vws; \
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for (iter = 1; iter < timeout_ticks && (gw == 0); iter++) { \
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gw = otx2_ssogws_dual_get_work(&ws->ws_state[ws->vws], \
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&ws->ws_state[!ws->vws], \
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ev, flags | \
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NIX_RX_MULTI_SEG_F, \
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2019-07-04 02:19:38 +00:00
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ws->lookup_mem, \
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ws->tstamp); \
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2019-07-04 02:19:37 +00:00
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ws->vws = !ws->vws; \
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} \
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\
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return gw; \
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} \
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\
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2020-02-09 17:39:19 +00:00
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uint16_t __rte_hot \
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2019-07-04 02:19:37 +00:00
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otx2_ssogws_dual_deq_seg_timeout_burst_ ##name(void *port, \
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struct rte_event ev[], \
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uint16_t nb_events, \
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uint64_t timeout_ticks) \
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{ \
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RTE_SET_USED(nb_events); \
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\
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return otx2_ssogws_dual_deq_seg_timeout_ ##name(port, ev, \
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timeout_ticks); \
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2019-06-28 18:23:31 +00:00
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}
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2019-07-04 02:19:37 +00:00
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SSO_RX_ADPTR_ENQ_FASTPATH_FUNC
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#undef R
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2019-07-04 02:19:39 +00:00
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2020-02-04 11:17:23 +00:00
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#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags) \
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2020-06-29 01:33:28 +00:00
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uint16_t __rte_hot \
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2019-07-04 02:19:39 +00:00
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otx2_ssogws_dual_tx_adptr_enq_ ## name(void *port, \
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struct rte_event ev[], \
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uint16_t nb_events) \
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{ \
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struct otx2_ssogws_dual *ws = port; \
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uint64_t cmd[sz]; \
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\
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RTE_SET_USED(nb_events); \
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2021-01-12 08:39:38 +00:00
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return otx2_ssogws_event_tx(ws->base[!ws->vws], &ev[0], \
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cmd, (const uint64_t \
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(*)[RTE_MAX_QUEUES_PER_PORT]) \
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&ws->tx_adptr_data, flags); \
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2019-07-04 02:19:39 +00:00
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}
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SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
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#undef T
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2020-02-04 11:17:23 +00:00
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#define T(name, f6, f5, f4, f3, f2, f1, f0, sz, flags) \
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2020-06-29 01:33:28 +00:00
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uint16_t __rte_hot \
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2019-07-04 02:19:39 +00:00
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otx2_ssogws_dual_tx_adptr_enq_seg_ ## name(void *port, \
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struct rte_event ev[], \
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uint16_t nb_events) \
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{ \
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uint64_t cmd[(sz) + NIX_TX_MSEG_SG_DWORDS - 2]; \
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2021-01-12 08:39:38 +00:00
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struct otx2_ssogws_dual *ws = port; \
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2019-07-04 02:19:39 +00:00
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\
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RTE_SET_USED(nb_events); \
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2021-01-12 08:39:38 +00:00
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return otx2_ssogws_event_tx(ws->base[!ws->vws], &ev[0], \
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cmd, (const uint64_t \
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(*)[RTE_MAX_QUEUES_PER_PORT]) \
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&ws->tx_adptr_data, \
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(flags) | NIX_TX_MULTI_SEG_F);\
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2019-07-04 02:19:39 +00:00
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}
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SSO_TX_ADPTR_ENQ_FASTPATH_FUNC
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#undef T
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