2019-04-16 03:17:40 +00:00
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.. SPDX-License-Identifier: BSD-3-Clause
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Copyright(c) 2019 Intel Corporation.
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IPN3KE Poll Mode Driver
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=======================
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2020-11-03 12:36:02 +00:00
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The ipn3ke PMD (**librte_net_ipn3ke**) provides poll mode driver support
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2019-04-16 03:17:40 +00:00
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for Intel® FPGA PAC(Programmable Acceleration Card) N3000 based on
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the Intel Ethernet Controller X710/XXV710 and Intel Arria 10 FPGA.
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In this card, FPGA is an acceleration bridge between network interface
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and the Intel Ethernet Controller. Although both FPGA and Ethernet
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Controllers are connected to CPU with PCIe Gen3x16 Switch, all the
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packet RX/TX is handled by Intel Ethernet Controller. So from application
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point of view the data path is still the legacy Intel Ethernet Controller
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X710/XXV710 PMD. Besides this, users can enable more acceleration
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features by FPGA IP.
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Prerequisites
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-------------
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- Identifying your adapter using `Intel Support
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<http://www.intel.com/support>`_ and get the latest NVM/FW images.
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- Follow the DPDK :ref:`Getting Started Guide for Linux <linux_gsg>` to setup the basic DPDK environment.
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- To get better performance on Intel platforms, please follow the "How to get best performance with NICs on Intel platforms"
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section of the :ref:`Getting Started Guide for Linux <linux_gsg>`.
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Pre-Installation Configuration
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------------------------------
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Runtime Config Options
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~~~~~~~~~~~~~~~~~~~~~~
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- ``AFU name``
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AFU name identifies which AFU is used by IPN3KE. The AFU name format is "Port|BDF",
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Each FPGA can be divided into four blocks at most. "Port" identifies which FPGA block
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the AFU bitstream belongs to, but currently only 0 IPN3KE support. "BDF" means FPGA PCIe BDF.
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For example::
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--vdev 'ipn3ke_cfg0,afu=0|b3:00.0'
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- ``FPGA Acceleration list``
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For IPN3KE FPGA can provide different bitstream, different bitstream includes different
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Acceleration, so users need to identify which Acceleration is used. Current IPN3KE can
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support TM and Flow Acceleration, for example::
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--vdev 'ipn3ke_cfg0,afu=0|b3:00.0,fpga_acc={tm|flow}'
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- ``I40e PF name list``
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Users need to bind FPGA LineSidePort to FVL PF. So I40e PF name list should be involved in
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startup command. For example::
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--vdev 'ipn3ke_cfg0,afu=0|b3:00.0,fpga_acc={tm|flow},i40e_pf={0000:b1:00.0|0000:b1:00.1|0000:b1:00.2|0000:b1:00.3|0000:b5:00.0|0000:b5:00.1|0000:b5:00.2|0000:b5:00.3}'
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Driver compilation and testing
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------------------------------
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Refer to the document :ref:`compiling and testing a PMD for a NIC <pmd_build_and_test>`
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for details.
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Sample Application Notes
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------------------------
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Packet TX/RX with FPGA Pass-through image
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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FPGA Pass-through bitstream is original FPGA Image.
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To start ``testpmd``, and add I40e PF to FPGA network port:
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.. code-block:: console
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2020-10-21 08:17:13 +00:00
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./<build_dir>/app/dpdk-testpmd -l 0-15 -n 4 --vdev 'ifpga_rawdev_cfg0,ifpga=b3:00.0,port=0' --vdev 'ipn3ke_cfg0,afu=0|b3:00.0,i40e_pf={0000:b1:00.0|0000:b1:00.1|0000:b1:00.2|0000:b1:00.3|0000:b5:00.0|0000:b5:00.1|0000:b5:00.2|0000:b5:00.3}' -- -i --no-numa --port-topology=loop
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2019-04-16 03:17:40 +00:00
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HQoS and flow acceleration
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~~~~~~~~~~~~~~~~~~~~~~~~~~
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HQoS and flow acceleration bitstream is used to offloading HQoS and flow classifier.
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To start ``testpmd``, and add I40e PF to FPGA network port, enable FPGA HQoS and Flow Acceleration:
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.. code-block:: console
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2020-10-21 08:17:13 +00:00
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./<build_dir>/app/dpdk-testpmd -l 0-15 -n 4 --vdev 'ifpga_rawdev_cfg0,ifpga=b3:00.0,port=0' --vdev 'ipn3ke_cfg0,afu=0|b3:00.0,fpga_acc={tm|flow},i40e_pf={0000:b1:00.0|0000:b1:00.1|0000:b1:00.2|0000:b1:00.3|0000:b5:00.0|0000:b5:00.1|0000:b5:00.2|0000:b5:00.3}' -- -i --no-numa --forward-mode=macswap
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2019-04-16 03:17:40 +00:00
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Limitations or Known issues
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---------------------------
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19.05 limitation
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~~~~~~~~~~~~~~~~
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Ipn3ke code released in 19.05 is for evaluation only.
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