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numam-dpdk/drivers/crypto/Makefile

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qat: add driver for QuickAssist devices This patch adds a PMD for the Intel Quick Assist Technology DH895xxC hardware accelerator. This patch depends on a QAT PF driver for device initialization. See the file docs/guides/cryptodevs/qat.rst for configuration details This patch supports a limited subset of QAT device functionality, currently supporting chaining of cipher and hash operations for the following algorithmsd: Cipher algorithms: - RTE_CRYPTO_CIPHER_AES_CBC (with 128-bit, 192-bit and 256-bit keys supported) Hash algorithms: - RTE_CRYPTO_AUTH_SHA1_HMAC - RTE_CRYPTO_AUTH_SHA256_HMAC - RTE_CRYPTO_AUTH_SHA512_HMAC - RTE_CRYPTO_AUTH_AES_XCBC_MAC Some limitation on this patchset which shall be contributed in a subsequent release: - Chained mbufs are not supported. - Hash only is not supported. - Cipher only is not supported. - Only in-place is currently supported (destination address is the same as source address). - Only supports session-oriented API implementation (session-less APIs are not supported). Signed-off-by: Declan Doherty <declan.doherty@intel.com> Signed-off-by: John Griffin <john.griffin@intel.com> Signed-off-by: Des O Dea <des.j.o.dea@intel.com> Signed-off-by: Fiona Trahe <fiona.trahe@intel.com> Acked-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
2015-11-25 13:25:14 +00:00
# BSD LICENSE
#
snow3g: add driver for SNOW 3G library Added new SW PMD which makes use of the libsso SW library, which provides wireless algorithms SNOW 3G UEA2 and UIA2 in software. This PMD supports cipher-only, hash-only and chained operations ("cipher then hash" and "hash then cipher") of the following algorithms: - RTE_CRYPTO_SYM_CIPHER_SNOW3G_UEA2 - RTE_CRYPTO_SYM_AUTH_SNOW3G_UIA2 The SNOW 3G hash and cipher algorithms, which are enabled by this crypto PMD are implemented by Intel's libsso software library. For library download and build instructions, see the documentation included (doc/guides/cryptodevs/snow3g.rst) The patch also contains the related unit tests function to test the PMD supported operations. Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com> Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-03-10 16:33:12 +00:00
# Copyright(c) 2010-2016 Intel Corporation. All rights reserved.
qat: add driver for QuickAssist devices This patch adds a PMD for the Intel Quick Assist Technology DH895xxC hardware accelerator. This patch depends on a QAT PF driver for device initialization. See the file docs/guides/cryptodevs/qat.rst for configuration details This patch supports a limited subset of QAT device functionality, currently supporting chaining of cipher and hash operations for the following algorithmsd: Cipher algorithms: - RTE_CRYPTO_CIPHER_AES_CBC (with 128-bit, 192-bit and 256-bit keys supported) Hash algorithms: - RTE_CRYPTO_AUTH_SHA1_HMAC - RTE_CRYPTO_AUTH_SHA256_HMAC - RTE_CRYPTO_AUTH_SHA512_HMAC - RTE_CRYPTO_AUTH_AES_XCBC_MAC Some limitation on this patchset which shall be contributed in a subsequent release: - Chained mbufs are not supported. - Hash only is not supported. - Cipher only is not supported. - Only in-place is currently supported (destination address is the same as source address). - Only supports session-oriented API implementation (session-less APIs are not supported). Signed-off-by: Declan Doherty <declan.doherty@intel.com> Signed-off-by: John Griffin <john.griffin@intel.com> Signed-off-by: Des O Dea <des.j.o.dea@intel.com> Signed-off-by: Fiona Trahe <fiona.trahe@intel.com> Acked-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
2015-11-25 13:25:14 +00:00
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions
# are met:
#
# * Redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer.
# * Redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in
# the documentation and/or other materials provided with the
# distribution.
# * Neither the name of Intel Corporation nor the names of its
# contributors may be used to endorse or promote products derived
# from this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
include $(RTE_SDK)/mk/rte.vars.mk
aesni_gcm: add driver for AES-GCM crypto operations This patch provides the implementation of an AES-NI accelerated crypto PMD which is dependent on Intel's multi-buffer library, see the white paper "Fast Multi-buffer IPsec Implementations on Intel® Architecture Processors" This PMD supports AES_GCM authenticated encryption and authenticated decryption using 128-bit AES keys The patch also contains the related unit tests functions Signed-off-by: Declan Doherty <declan.doherty@intel.com> Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com> Acked-by: John Griffin <john.griffin@intel.com>
2016-03-10 16:41:46 +00:00
DIRS-$(CONFIG_RTE_LIBRTE_PMD_AESNI_GCM) += aesni_gcm
aesni_mb: add driver for multi buffer based crypto This patch provides the initial implementation of the AES-NI multi-buffer based crypto poll mode driver using DPDK's new cryptodev framework. This PMD is dependent on Intel's multibuffer library, see the whitepaper "Fast Multi-buffer IPsec Implementations on Intel® Architecture Processors", see ref 1 for details on the library's design and ref 2 to download the library itself. This initial implementation is limited to supporting the chained operations of "hash then cipher" or "cipher then hash" for the following cipher and hash algorithms: Cipher algorithms: - RTE_CRYPTO_CIPHER_AES_CBC (with 128-bit, 192-bit and 256-bit keys supported) Authentication algorithms: - RTE_CRYPTO_AUTH_SHA1_HMAC - RTE_CRYPTO_AUTH_SHA256_HMAC - RTE_CRYPTO_AUTH_SHA512_HMAC - RTE_CRYPTO_AUTH_AES_XCBC_MAC Important Note: Due to the fact that the multi-buffer library is designed for accelerating IPsec crypto operation, the digest's generated for the HMAC functions are truncated to lengths specified by IPsec RFC's, ie RFC2404 for using HMAC-SHA-1 with IPsec specifies that the digest is truncate from 20 to 12 bytes. Build instructions: To build DPDK with the AESNI_MB_PMD the user is required to download (ref 2) and compile the multi-buffer library on there system before building DPDK. The environmental variable AESNI_MULTI_BUFFER_LIB_PATH must be exported with the path where you extracted and built the multi buffer library and finally set CONFIG_RTE_LIBRTE_PMD_AESNI_MB=y in config/common_linuxapp. Current status: It's doesn't support crypto operation across chained mbufs, or cipher only or hash only operations. ref 1: https://www-ssl.intel.com/content/www/us/en/intelligent-systems/intel-technology/fast-multi-buffer-ipsec-implementations-ia-processors-p ref 2: https://downloadcenter.intel.com/download/22972 Signed-off-by: Declan Doherty <declan.doherty@intel.com> Acked-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
2015-11-25 13:25:15 +00:00
DIRS-$(CONFIG_RTE_LIBRTE_PMD_AESNI_MB) += aesni_mb
qat: add driver for QuickAssist devices This patch adds a PMD for the Intel Quick Assist Technology DH895xxC hardware accelerator. This patch depends on a QAT PF driver for device initialization. See the file docs/guides/cryptodevs/qat.rst for configuration details This patch supports a limited subset of QAT device functionality, currently supporting chaining of cipher and hash operations for the following algorithmsd: Cipher algorithms: - RTE_CRYPTO_CIPHER_AES_CBC (with 128-bit, 192-bit and 256-bit keys supported) Hash algorithms: - RTE_CRYPTO_AUTH_SHA1_HMAC - RTE_CRYPTO_AUTH_SHA256_HMAC - RTE_CRYPTO_AUTH_SHA512_HMAC - RTE_CRYPTO_AUTH_AES_XCBC_MAC Some limitation on this patchset which shall be contributed in a subsequent release: - Chained mbufs are not supported. - Hash only is not supported. - Cipher only is not supported. - Only in-place is currently supported (destination address is the same as source address). - Only supports session-oriented API implementation (session-less APIs are not supported). Signed-off-by: Declan Doherty <declan.doherty@intel.com> Signed-off-by: John Griffin <john.griffin@intel.com> Signed-off-by: Des O Dea <des.j.o.dea@intel.com> Signed-off-by: Fiona Trahe <fiona.trahe@intel.com> Acked-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
2015-11-25 13:25:14 +00:00
DIRS-$(CONFIG_RTE_LIBRTE_PMD_QAT) += qat
snow3g: add driver for SNOW 3G library Added new SW PMD which makes use of the libsso SW library, which provides wireless algorithms SNOW 3G UEA2 and UIA2 in software. This PMD supports cipher-only, hash-only and chained operations ("cipher then hash" and "hash then cipher") of the following algorithms: - RTE_CRYPTO_SYM_CIPHER_SNOW3G_UEA2 - RTE_CRYPTO_SYM_AUTH_SNOW3G_UIA2 The SNOW 3G hash and cipher algorithms, which are enabled by this crypto PMD are implemented by Intel's libsso software library. For library download and build instructions, see the documentation included (doc/guides/cryptodevs/snow3g.rst) The patch also contains the related unit tests function to test the PMD supported operations. Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com> Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-03-10 16:33:12 +00:00
DIRS-$(CONFIG_RTE_LIBRTE_PMD_SNOW3G) += snow3g
crypto/kasumi: add driver for KASUMI library Added new SW PMD which makes use of the libsso_kasumi SW library, which provides wireless algorithms KASUMI F8 and F9 in software. This PMD supports cipher-only, hash-only and chained operations ("cipher then hash" and "hash then cipher") of the following algorithms: - RTE_CRYPTO_SYM_CIPHER_KASUMI_F8 - RTE_CRYPTO_SYM_AUTH_KASUMI_F9 Signed-off-by: Pablo de Lara <pablo.de.lara.guarch@intel.com> Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-06-20 14:40:04 +00:00
DIRS-$(CONFIG_RTE_LIBRTE_PMD_KASUMI) += kasumi
null_crypto: add driver for null crypto operations This patch provides the implementation of a NULL crypto PMD, which supports NULL cipher and NULL authentication operations, which can be chained together as follows: - Authentication Only - Cipher Only - Authentication then Cipher - Cipher then Authentication As this is a NULL operation device the crypto operations which are submitted for processing are not actually modified and are stored in a queue pairs processed packets ring ready for collection when rte_cryptodev_burst_dequeue() is called. The patch also contains the related unit tests function to test the PMDs supported operations. Signed-off-by: Declan Doherty <declan.doherty@intel.com> Acked-by: Deepak Kumar Jain <deepak.k.jain@intel.com>
2016-03-11 01:04:10 +00:00
DIRS-$(CONFIG_RTE_LIBRTE_PMD_NULL_CRYPTO) += null
qat: add driver for QuickAssist devices This patch adds a PMD for the Intel Quick Assist Technology DH895xxC hardware accelerator. This patch depends on a QAT PF driver for device initialization. See the file docs/guides/cryptodevs/qat.rst for configuration details This patch supports a limited subset of QAT device functionality, currently supporting chaining of cipher and hash operations for the following algorithmsd: Cipher algorithms: - RTE_CRYPTO_CIPHER_AES_CBC (with 128-bit, 192-bit and 256-bit keys supported) Hash algorithms: - RTE_CRYPTO_AUTH_SHA1_HMAC - RTE_CRYPTO_AUTH_SHA256_HMAC - RTE_CRYPTO_AUTH_SHA512_HMAC - RTE_CRYPTO_AUTH_AES_XCBC_MAC Some limitation on this patchset which shall be contributed in a subsequent release: - Chained mbufs are not supported. - Hash only is not supported. - Cipher only is not supported. - Only in-place is currently supported (destination address is the same as source address). - Only supports session-oriented API implementation (session-less APIs are not supported). Signed-off-by: Declan Doherty <declan.doherty@intel.com> Signed-off-by: John Griffin <john.griffin@intel.com> Signed-off-by: Des O Dea <des.j.o.dea@intel.com> Signed-off-by: Fiona Trahe <fiona.trahe@intel.com> Acked-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com>
2015-11-25 13:25:14 +00:00
mk: replace the combined library with a linker script The physically linked-together combined library has been an increasing source of problems, as was predicted when library and symbol versioning was introduced. Replace the complex and fragile construction with a simple linker script which achieves the same without all the problems, remove the related kludges from eg mlx drivers. Since creating the linker script is practically zero cost, remove the config option and just create it always. Based on a patch by Sergio Gonzales Monroy, linker script approach initially suggested by Neil Horman. Suggested-by: Sergio Gonzalez Monroy <sergio.gonzalez.monroy@intel.com> Suggested-by: Neil Horman <nhorman@tuxdriver.com> Signed-off-by: Panu Matilainen <pmatilai@redhat.com> Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2015-11-24 14:31:17 +00:00
include $(RTE_SDK)/mk/rte.subdir.mk
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