2017-12-19 15:49:03 +00:00
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(c) 2010-2017 Intel Corporation
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2012-09-04 12:54:00 +00:00
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*/
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#include <sys/types.h>
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#include <sys/queue.h>
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#include <ctype.h>
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#include <stdio.h>
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#include <stdlib.h>
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#include <string.h>
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#include <stdarg.h>
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#include <errno.h>
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2018-05-10 23:58:31 +00:00
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#include <stdbool.h>
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2012-09-04 12:54:00 +00:00
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#include <stdint.h>
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#include <inttypes.h>
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2014-06-16 07:31:43 +00:00
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#include <netinet/in.h>
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2012-09-04 12:54:00 +00:00
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#include <rte_byteorder.h>
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#include <rte_log.h>
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#include <rte_debug.h>
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#include <rte_interrupts.h>
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#include <rte_memory.h>
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#include <rte_memcpy.h>
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#include <rte_memzone.h>
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#include <rte_launch.h>
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#include <rte_eal.h>
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#include <rte_per_lcore.h>
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#include <rte_lcore.h>
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#include <rte_atomic.h>
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#include <rte_branch_prediction.h>
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#include <rte_common.h>
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#include <rte_mempool.h>
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#include <rte_malloc.h>
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#include <rte_mbuf.h>
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#include <rte_errno.h>
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#include <rte_spinlock.h>
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2014-06-25 20:07:44 +00:00
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#include <rte_string_fns.h>
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ethdev: add common devargs parser
Introduces a new structure, rte_eth_devargs, to support generic
ethdev arguments common across NET PMDs, with a new API
rte_eth_devargs_parse API to support PMD parsing these arguments. The
patch add support for a representor argument passed with passed with
the EAL -w option. The representor parameter allows the user to specify
which representor ports to initialise on a device.
The argument supports passing a single representor port, a list of
port values or a range of port values.
-w BDF,representor=1 # create representor port 1 on pci device BDF
-w BDF,representor=[1,2,5,6,10] # create representor ports in list
-w BDF,representor=[0-31] # create representor ports in range
Signed-off-by: Remy Horton <remy.horton@intel.com>
Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2018-04-26 10:41:02 +00:00
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#include <rte_kvargs.h>
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2012-09-04 12:54:00 +00:00
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#include "rte_ether.h"
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#include "rte_ethdev.h"
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2018-01-22 00:16:22 +00:00
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#include "rte_ethdev_driver.h"
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2017-09-22 14:52:29 +00:00
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#include "ethdev_profile.h"
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2012-09-04 12:54:00 +00:00
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2018-06-19 01:04:55 +00:00
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int rte_eth_dev_logtype;
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2018-03-13 11:07:23 +00:00
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2012-09-04 12:54:00 +00:00
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static const char *MZ_RTE_ETH_DEV_DATA = "rte_eth_dev_data";
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struct rte_eth_dev rte_eth_devices[RTE_MAX_ETHPORTS];
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2018-05-18 10:41:10 +00:00
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static uint16_t eth_dev_last_created_port;
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2012-09-04 12:54:00 +00:00
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/* spinlock for eth device callbacks */
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static rte_spinlock_t rte_eth_dev_cb_lock = RTE_SPINLOCK_INITIALIZER;
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2016-06-15 14:06:18 +00:00
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/* spinlock for add/remove rx callbacks */
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static rte_spinlock_t rte_eth_rx_cb_lock = RTE_SPINLOCK_INITIALIZER;
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/* spinlock for add/remove tx callbacks */
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static rte_spinlock_t rte_eth_tx_cb_lock = RTE_SPINLOCK_INITIALIZER;
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2018-01-22 16:38:19 +00:00
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/* spinlock for shared data allocation */
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static rte_spinlock_t rte_eth_shared_data_lock = RTE_SPINLOCK_INITIALIZER;
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2014-07-23 12:28:53 +00:00
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/* store statistics names and its offset in stats structure */
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struct rte_eth_xstats_name_off {
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char name[RTE_ETH_XSTATS_NAME_SIZE];
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unsigned offset;
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};
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2018-01-22 16:38:19 +00:00
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/* Shared memory between primary and secondary processes. */
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static struct {
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uint64_t next_owner_id;
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rte_spinlock_t ownership_lock;
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struct rte_eth_dev_data data[RTE_MAX_ETHPORTS];
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} *rte_eth_dev_shared_data;
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2015-04-09 21:29:41 +00:00
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static const struct rte_eth_xstats_name_off rte_stats_strings[] = {
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2015-11-02 10:18:59 +00:00
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{"rx_good_packets", offsetof(struct rte_eth_stats, ipackets)},
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{"tx_good_packets", offsetof(struct rte_eth_stats, opackets)},
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{"rx_good_bytes", offsetof(struct rte_eth_stats, ibytes)},
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{"tx_good_bytes", offsetof(struct rte_eth_stats, obytes)},
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2017-12-14 14:23:00 +00:00
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{"rx_missed_errors", offsetof(struct rte_eth_stats, imissed)},
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2015-04-09 21:29:41 +00:00
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{"rx_errors", offsetof(struct rte_eth_stats, ierrors)},
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2015-11-02 10:18:59 +00:00
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{"tx_errors", offsetof(struct rte_eth_stats, oerrors)},
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{"rx_mbuf_allocation_errors", offsetof(struct rte_eth_stats,
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rx_nombuf)},
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2014-07-23 12:28:53 +00:00
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};
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2015-11-02 10:18:59 +00:00
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2014-07-23 12:28:53 +00:00
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#define RTE_NB_STATS (sizeof(rte_stats_strings) / sizeof(rte_stats_strings[0]))
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2015-04-09 21:29:41 +00:00
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static const struct rte_eth_xstats_name_off rte_rxq_stats_strings[] = {
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2015-11-02 10:18:59 +00:00
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{"packets", offsetof(struct rte_eth_stats, q_ipackets)},
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{"bytes", offsetof(struct rte_eth_stats, q_ibytes)},
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{"errors", offsetof(struct rte_eth_stats, q_errors)},
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2014-07-23 12:28:53 +00:00
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};
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2015-11-02 10:18:59 +00:00
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2014-07-23 12:28:53 +00:00
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#define RTE_NB_RXQ_STATS (sizeof(rte_rxq_stats_strings) / \
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sizeof(rte_rxq_stats_strings[0]))
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2015-04-09 21:29:41 +00:00
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static const struct rte_eth_xstats_name_off rte_txq_stats_strings[] = {
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2015-11-02 10:18:59 +00:00
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{"packets", offsetof(struct rte_eth_stats, q_opackets)},
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{"bytes", offsetof(struct rte_eth_stats, q_obytes)},
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2014-07-23 12:28:53 +00:00
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};
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#define RTE_NB_TXQ_STATS (sizeof(rte_txq_stats_strings) / \
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sizeof(rte_txq_stats_strings[0]))
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2018-01-18 09:44:26 +00:00
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#define RTE_RX_OFFLOAD_BIT2STR(_name) \
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{ DEV_RX_OFFLOAD_##_name, #_name }
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static const struct {
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uint64_t offload;
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const char *name;
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} rte_rx_offload_names[] = {
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RTE_RX_OFFLOAD_BIT2STR(VLAN_STRIP),
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RTE_RX_OFFLOAD_BIT2STR(IPV4_CKSUM),
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RTE_RX_OFFLOAD_BIT2STR(UDP_CKSUM),
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RTE_RX_OFFLOAD_BIT2STR(TCP_CKSUM),
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RTE_RX_OFFLOAD_BIT2STR(TCP_LRO),
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RTE_RX_OFFLOAD_BIT2STR(QINQ_STRIP),
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RTE_RX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
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RTE_RX_OFFLOAD_BIT2STR(MACSEC_STRIP),
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RTE_RX_OFFLOAD_BIT2STR(HEADER_SPLIT),
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RTE_RX_OFFLOAD_BIT2STR(VLAN_FILTER),
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RTE_RX_OFFLOAD_BIT2STR(VLAN_EXTEND),
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RTE_RX_OFFLOAD_BIT2STR(JUMBO_FRAME),
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RTE_RX_OFFLOAD_BIT2STR(SCATTER),
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RTE_RX_OFFLOAD_BIT2STR(TIMESTAMP),
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RTE_RX_OFFLOAD_BIT2STR(SECURITY),
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2018-06-29 12:41:13 +00:00
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RTE_RX_OFFLOAD_BIT2STR(KEEP_CRC),
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2018-10-02 10:51:41 +00:00
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RTE_RX_OFFLOAD_BIT2STR(SCTP_CKSUM),
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2018-10-09 14:18:04 +00:00
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RTE_RX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
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2018-01-18 09:44:26 +00:00
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};
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#undef RTE_RX_OFFLOAD_BIT2STR
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2014-07-23 12:28:53 +00:00
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2018-01-18 09:44:27 +00:00
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#define RTE_TX_OFFLOAD_BIT2STR(_name) \
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{ DEV_TX_OFFLOAD_##_name, #_name }
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static const struct {
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uint64_t offload;
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const char *name;
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} rte_tx_offload_names[] = {
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RTE_TX_OFFLOAD_BIT2STR(VLAN_INSERT),
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RTE_TX_OFFLOAD_BIT2STR(IPV4_CKSUM),
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RTE_TX_OFFLOAD_BIT2STR(UDP_CKSUM),
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RTE_TX_OFFLOAD_BIT2STR(TCP_CKSUM),
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RTE_TX_OFFLOAD_BIT2STR(SCTP_CKSUM),
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RTE_TX_OFFLOAD_BIT2STR(TCP_TSO),
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RTE_TX_OFFLOAD_BIT2STR(UDP_TSO),
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RTE_TX_OFFLOAD_BIT2STR(OUTER_IPV4_CKSUM),
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RTE_TX_OFFLOAD_BIT2STR(QINQ_INSERT),
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RTE_TX_OFFLOAD_BIT2STR(VXLAN_TNL_TSO),
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RTE_TX_OFFLOAD_BIT2STR(GRE_TNL_TSO),
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RTE_TX_OFFLOAD_BIT2STR(IPIP_TNL_TSO),
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RTE_TX_OFFLOAD_BIT2STR(GENEVE_TNL_TSO),
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RTE_TX_OFFLOAD_BIT2STR(MACSEC_INSERT),
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RTE_TX_OFFLOAD_BIT2STR(MT_LOCKFREE),
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RTE_TX_OFFLOAD_BIT2STR(MULTI_SEGS),
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RTE_TX_OFFLOAD_BIT2STR(MBUF_FAST_FREE),
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RTE_TX_OFFLOAD_BIT2STR(SECURITY),
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2018-09-12 08:28:02 +00:00
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RTE_TX_OFFLOAD_BIT2STR(UDP_TNL_TSO),
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RTE_TX_OFFLOAD_BIT2STR(IP_TNL_TSO),
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2018-10-09 14:18:09 +00:00
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RTE_TX_OFFLOAD_BIT2STR(OUTER_UDP_CKSUM),
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2018-01-18 09:44:27 +00:00
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};
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#undef RTE_TX_OFFLOAD_BIT2STR
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2012-09-04 12:54:00 +00:00
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/**
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* The user application callback description.
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*
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* It contains callback address to be registered by user application,
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* the pointer to the parameters for callback, and the event type.
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*/
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struct rte_eth_dev_callback {
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TAILQ_ENTRY(rte_eth_dev_callback) next; /**< Callbacks list */
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rte_eth_dev_cb_fn cb_fn; /**< Callback address */
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void *cb_arg; /**< Parameter for callback */
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2017-06-15 12:29:50 +00:00
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void *ret_param; /**< Return parameter */
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2012-09-04 12:54:00 +00:00
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enum rte_eth_event_type event; /**< Interrupt event type */
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2013-06-03 00:00:00 +00:00
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uint32_t active; /**< Callback is executing */
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2012-09-04 12:54:00 +00:00
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};
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2012-12-19 23:00:00 +00:00
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enum {
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STAT_QMAP_TX = 0,
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STAT_QMAP_RX
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};
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2017-09-29 07:17:24 +00:00
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uint16_t
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rte_eth_find_next(uint16_t port_id)
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2017-03-31 12:04:38 +00:00
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{
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while (port_id < RTE_MAX_ETHPORTS &&
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2018-01-20 21:12:19 +00:00
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rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
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rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED)
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2017-03-31 12:04:38 +00:00
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port_id++;
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if (port_id >= RTE_MAX_ETHPORTS)
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return RTE_MAX_ETHPORTS;
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return port_id;
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}
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2015-04-09 21:29:39 +00:00
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static void
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2018-01-22 16:38:19 +00:00
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rte_eth_dev_shared_data_prepare(void)
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2012-09-04 12:54:00 +00:00
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{
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const unsigned flags = 0;
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const struct rte_memzone *mz;
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2018-01-22 16:38:19 +00:00
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rte_spinlock_lock(&rte_eth_shared_data_lock);
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if (rte_eth_dev_shared_data == NULL) {
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if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
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/* Allocate port data and ownership shared memory. */
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mz = rte_memzone_reserve(MZ_RTE_ETH_DEV_DATA,
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sizeof(*rte_eth_dev_shared_data),
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rte_socket_id(), flags);
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} else
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mz = rte_memzone_lookup(MZ_RTE_ETH_DEV_DATA);
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if (mz == NULL)
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rte_panic("Cannot allocate ethdev shared data\n");
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rte_eth_dev_shared_data = mz->addr;
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if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
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rte_eth_dev_shared_data->next_owner_id =
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RTE_ETH_DEV_NO_OWNER + 1;
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rte_spinlock_init(&rte_eth_dev_shared_data->ownership_lock);
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memset(rte_eth_dev_shared_data->data, 0,
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sizeof(rte_eth_dev_shared_data->data));
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}
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}
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rte_spinlock_unlock(&rte_eth_shared_data_lock);
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2012-09-04 12:54:00 +00:00
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}
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2018-05-10 23:58:31 +00:00
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static bool
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is_allocated(const struct rte_eth_dev *ethdev)
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{
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return ethdev->data->name[0] != '\0';
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}
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2018-05-10 23:58:32 +00:00
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static struct rte_eth_dev *
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_rte_eth_dev_allocated(const char *name)
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2014-06-25 20:07:44 +00:00
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{
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unsigned i;
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2015-02-25 19:32:18 +00:00
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for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
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2018-05-10 23:58:33 +00:00
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if (rte_eth_devices[i].data != NULL &&
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2017-09-22 11:30:07 +00:00
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strcmp(rte_eth_devices[i].data->name, name) == 0)
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return &rte_eth_devices[i];
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2014-06-25 20:07:44 +00:00
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}
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return NULL;
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}
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2018-05-10 23:58:32 +00:00
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struct rte_eth_dev *
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rte_eth_dev_allocated(const char *name)
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{
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struct rte_eth_dev *ethdev;
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rte_eth_dev_shared_data_prepare();
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rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
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ethdev = _rte_eth_dev_allocated(name);
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rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
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return ethdev;
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}
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2017-09-29 07:17:24 +00:00
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static uint16_t
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2015-02-25 19:32:18 +00:00
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rte_eth_dev_find_free_port(void)
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{
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unsigned i;
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for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
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2018-01-22 16:38:18 +00:00
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|
|
/* Using shared name field to find a free port. */
|
2018-01-22 16:38:19 +00:00
|
|
|
if (rte_eth_dev_shared_data->data[i].name[0] == '\0') {
|
2018-01-22 16:38:18 +00:00
|
|
|
RTE_ASSERT(rte_eth_devices[i].state ==
|
|
|
|
RTE_ETH_DEV_UNUSED);
|
2015-02-25 19:32:18 +00:00
|
|
|
return i;
|
2018-01-22 16:38:18 +00:00
|
|
|
}
|
2015-02-25 19:32:18 +00:00
|
|
|
}
|
|
|
|
return RTE_MAX_ETHPORTS;
|
|
|
|
}
|
|
|
|
|
ethdev: fix port data mismatched in multiple process model
Assume we have two virtio ports, 00:03.0 and 00:04.0. The first one is
managed by the kernel driver, while the later one is managed by DPDK.
Now we start the primary process. 00:03.0 will be skipped by DPDK virtio
PMD driver (since it's being used by the kernel). 00:04.0 would be
successfully initiated by DPDK virtio PMD (if nothing abnormal happens).
After that, we would get a port id 0, and all the related info needed
by virtio (virtio_hw) is stored at rte_eth_dev_data[0].
Then we start the secondary process. As usual, 00:03.0 will be firstly
probed. It firstly tries to get a local eth_dev structure for it (by
rte_eth_dev_allocate):
port_id = rte_eth_dev_find_free_port();
...
eth_dev = &rte_eth_devices[port_id];
eth_dev->data = &rte_eth_dev_data[port_id];
...
return eth_dev;
Since it's a first PCI device, port_id will be 0. eth_dev->data would
then point to rte_eth_dev_data[0]. And here things start going wrong,
as rte_eth_dev_data[0] actually stores the virtio_hw for 00:04.0.
That said, in the secondary process, DPDK will continue to drive PCI
device 00.03.0 (despite the fact it's been managed by kernel), with
the info from PCI device 00:04.0. Which is wrong.
The fix is to attach the port already registered by the primary process.
That is, iterate the rte_eth_dev_data[], and get the port id who's PCI
ID matches the current PCI device.
This would let us maintain same port ID for the same PCI device, keeping
the chance of referencing to wrong data minimal.
Fixes: af75078fece3 ("first public release")
Cc: stable@dpdk.org
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2017-01-09 07:50:59 +00:00
|
|
|
static struct rte_eth_dev *
|
2017-09-29 07:17:24 +00:00
|
|
|
eth_dev_get(uint16_t port_id)
|
ethdev: fix port data mismatched in multiple process model
Assume we have two virtio ports, 00:03.0 and 00:04.0. The first one is
managed by the kernel driver, while the later one is managed by DPDK.
Now we start the primary process. 00:03.0 will be skipped by DPDK virtio
PMD driver (since it's being used by the kernel). 00:04.0 would be
successfully initiated by DPDK virtio PMD (if nothing abnormal happens).
After that, we would get a port id 0, and all the related info needed
by virtio (virtio_hw) is stored at rte_eth_dev_data[0].
Then we start the secondary process. As usual, 00:03.0 will be firstly
probed. It firstly tries to get a local eth_dev structure for it (by
rte_eth_dev_allocate):
port_id = rte_eth_dev_find_free_port();
...
eth_dev = &rte_eth_devices[port_id];
eth_dev->data = &rte_eth_dev_data[port_id];
...
return eth_dev;
Since it's a first PCI device, port_id will be 0. eth_dev->data would
then point to rte_eth_dev_data[0]. And here things start going wrong,
as rte_eth_dev_data[0] actually stores the virtio_hw for 00:04.0.
That said, in the secondary process, DPDK will continue to drive PCI
device 00.03.0 (despite the fact it's been managed by kernel), with
the info from PCI device 00:04.0. Which is wrong.
The fix is to attach the port already registered by the primary process.
That is, iterate the rte_eth_dev_data[], and get the port id who's PCI
ID matches the current PCI device.
This would let us maintain same port ID for the same PCI device, keeping
the chance of referencing to wrong data minimal.
Fixes: af75078fece3 ("first public release")
Cc: stable@dpdk.org
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2017-01-09 07:50:59 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *eth_dev = &rte_eth_devices[port_id];
|
|
|
|
|
2018-01-22 16:38:19 +00:00
|
|
|
eth_dev->data = &rte_eth_dev_shared_data->data[port_id];
|
ethdev: fix port data mismatched in multiple process model
Assume we have two virtio ports, 00:03.0 and 00:04.0. The first one is
managed by the kernel driver, while the later one is managed by DPDK.
Now we start the primary process. 00:03.0 will be skipped by DPDK virtio
PMD driver (since it's being used by the kernel). 00:04.0 would be
successfully initiated by DPDK virtio PMD (if nothing abnormal happens).
After that, we would get a port id 0, and all the related info needed
by virtio (virtio_hw) is stored at rte_eth_dev_data[0].
Then we start the secondary process. As usual, 00:03.0 will be firstly
probed. It firstly tries to get a local eth_dev structure for it (by
rte_eth_dev_allocate):
port_id = rte_eth_dev_find_free_port();
...
eth_dev = &rte_eth_devices[port_id];
eth_dev->data = &rte_eth_dev_data[port_id];
...
return eth_dev;
Since it's a first PCI device, port_id will be 0. eth_dev->data would
then point to rte_eth_dev_data[0]. And here things start going wrong,
as rte_eth_dev_data[0] actually stores the virtio_hw for 00:04.0.
That said, in the secondary process, DPDK will continue to drive PCI
device 00.03.0 (despite the fact it's been managed by kernel), with
the info from PCI device 00:04.0. Which is wrong.
The fix is to attach the port already registered by the primary process.
That is, iterate the rte_eth_dev_data[], and get the port id who's PCI
ID matches the current PCI device.
This would let us maintain same port ID for the same PCI device, keeping
the chance of referencing to wrong data minimal.
Fixes: af75078fece3 ("first public release")
Cc: stable@dpdk.org
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2017-01-09 07:50:59 +00:00
|
|
|
|
|
|
|
eth_dev_last_created_port = port_id;
|
|
|
|
|
|
|
|
return eth_dev;
|
|
|
|
}
|
|
|
|
|
2013-09-18 10:00:00 +00:00
|
|
|
struct rte_eth_dev *
|
2016-09-20 12:41:26 +00:00
|
|
|
rte_eth_dev_allocate(const char *name)
|
2012-09-04 12:54:00 +00:00
|
|
|
{
|
2017-09-29 07:17:24 +00:00
|
|
|
uint16_t port_id;
|
2018-01-22 16:38:20 +00:00
|
|
|
struct rte_eth_dev *eth_dev = NULL;
|
|
|
|
|
|
|
|
rte_eth_dev_shared_data_prepare();
|
|
|
|
|
|
|
|
/* Synchronize port creation between primary and secondary threads. */
|
|
|
|
rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
|
2012-09-04 12:54:00 +00:00
|
|
|
|
2018-05-10 23:58:33 +00:00
|
|
|
if (_rte_eth_dev_allocated(name) != NULL) {
|
2018-06-19 01:04:55 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Ethernet device with name %s already allocated\n",
|
|
|
|
name);
|
2018-01-22 16:38:20 +00:00
|
|
|
goto unlock;
|
2012-12-19 23:00:00 +00:00
|
|
|
}
|
2012-09-04 12:54:00 +00:00
|
|
|
|
2018-05-10 23:58:33 +00:00
|
|
|
port_id = rte_eth_dev_find_free_port();
|
|
|
|
if (port_id == RTE_MAX_ETHPORTS) {
|
2018-06-19 01:04:55 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Reached maximum number of Ethernet ports\n");
|
2018-01-22 16:38:20 +00:00
|
|
|
goto unlock;
|
2014-06-25 20:07:44 +00:00
|
|
|
}
|
|
|
|
|
ethdev: fix port data mismatched in multiple process model
Assume we have two virtio ports, 00:03.0 and 00:04.0. The first one is
managed by the kernel driver, while the later one is managed by DPDK.
Now we start the primary process. 00:03.0 will be skipped by DPDK virtio
PMD driver (since it's being used by the kernel). 00:04.0 would be
successfully initiated by DPDK virtio PMD (if nothing abnormal happens).
After that, we would get a port id 0, and all the related info needed
by virtio (virtio_hw) is stored at rte_eth_dev_data[0].
Then we start the secondary process. As usual, 00:03.0 will be firstly
probed. It firstly tries to get a local eth_dev structure for it (by
rte_eth_dev_allocate):
port_id = rte_eth_dev_find_free_port();
...
eth_dev = &rte_eth_devices[port_id];
eth_dev->data = &rte_eth_dev_data[port_id];
...
return eth_dev;
Since it's a first PCI device, port_id will be 0. eth_dev->data would
then point to rte_eth_dev_data[0]. And here things start going wrong,
as rte_eth_dev_data[0] actually stores the virtio_hw for 00:04.0.
That said, in the secondary process, DPDK will continue to drive PCI
device 00.03.0 (despite the fact it's been managed by kernel), with
the info from PCI device 00:04.0. Which is wrong.
The fix is to attach the port already registered by the primary process.
That is, iterate the rte_eth_dev_data[], and get the port id who's PCI
ID matches the current PCI device.
This would let us maintain same port ID for the same PCI device, keeping
the chance of referencing to wrong data minimal.
Fixes: af75078fece3 ("first public release")
Cc: stable@dpdk.org
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2017-01-09 07:50:59 +00:00
|
|
|
eth_dev = eth_dev_get(port_id);
|
2014-06-25 20:07:44 +00:00
|
|
|
snprintf(eth_dev->data->name, sizeof(eth_dev->data->name), "%s", name);
|
2015-02-25 19:32:18 +00:00
|
|
|
eth_dev->data->port_id = port_id;
|
2016-11-17 17:16:12 +00:00
|
|
|
eth_dev->data->mtu = ETHER_MTU;
|
|
|
|
|
2018-01-22 16:38:20 +00:00
|
|
|
unlock:
|
|
|
|
rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
|
|
|
|
|
ethdev: fix port data mismatched in multiple process model
Assume we have two virtio ports, 00:03.0 and 00:04.0. The first one is
managed by the kernel driver, while the later one is managed by DPDK.
Now we start the primary process. 00:03.0 will be skipped by DPDK virtio
PMD driver (since it's being used by the kernel). 00:04.0 would be
successfully initiated by DPDK virtio PMD (if nothing abnormal happens).
After that, we would get a port id 0, and all the related info needed
by virtio (virtio_hw) is stored at rte_eth_dev_data[0].
Then we start the secondary process. As usual, 00:03.0 will be firstly
probed. It firstly tries to get a local eth_dev structure for it (by
rte_eth_dev_allocate):
port_id = rte_eth_dev_find_free_port();
...
eth_dev = &rte_eth_devices[port_id];
eth_dev->data = &rte_eth_dev_data[port_id];
...
return eth_dev;
Since it's a first PCI device, port_id will be 0. eth_dev->data would
then point to rte_eth_dev_data[0]. And here things start going wrong,
as rte_eth_dev_data[0] actually stores the virtio_hw for 00:04.0.
That said, in the secondary process, DPDK will continue to drive PCI
device 00.03.0 (despite the fact it's been managed by kernel), with
the info from PCI device 00:04.0. Which is wrong.
The fix is to attach the port already registered by the primary process.
That is, iterate the rte_eth_dev_data[], and get the port id who's PCI
ID matches the current PCI device.
This would let us maintain same port ID for the same PCI device, keeping
the chance of referencing to wrong data minimal.
Fixes: af75078fece3 ("first public release")
Cc: stable@dpdk.org
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2017-01-09 07:50:59 +00:00
|
|
|
return eth_dev;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Attach to a port already registered by the primary process, which
|
|
|
|
* makes sure that the same device would have the same port id both
|
|
|
|
* in the primary and secondary process.
|
|
|
|
*/
|
2017-03-02 09:00:41 +00:00
|
|
|
struct rte_eth_dev *
|
|
|
|
rte_eth_dev_attach_secondary(const char *name)
|
ethdev: fix port data mismatched in multiple process model
Assume we have two virtio ports, 00:03.0 and 00:04.0. The first one is
managed by the kernel driver, while the later one is managed by DPDK.
Now we start the primary process. 00:03.0 will be skipped by DPDK virtio
PMD driver (since it's being used by the kernel). 00:04.0 would be
successfully initiated by DPDK virtio PMD (if nothing abnormal happens).
After that, we would get a port id 0, and all the related info needed
by virtio (virtio_hw) is stored at rte_eth_dev_data[0].
Then we start the secondary process. As usual, 00:03.0 will be firstly
probed. It firstly tries to get a local eth_dev structure for it (by
rte_eth_dev_allocate):
port_id = rte_eth_dev_find_free_port();
...
eth_dev = &rte_eth_devices[port_id];
eth_dev->data = &rte_eth_dev_data[port_id];
...
return eth_dev;
Since it's a first PCI device, port_id will be 0. eth_dev->data would
then point to rte_eth_dev_data[0]. And here things start going wrong,
as rte_eth_dev_data[0] actually stores the virtio_hw for 00:04.0.
That said, in the secondary process, DPDK will continue to drive PCI
device 00.03.0 (despite the fact it's been managed by kernel), with
the info from PCI device 00:04.0. Which is wrong.
The fix is to attach the port already registered by the primary process.
That is, iterate the rte_eth_dev_data[], and get the port id who's PCI
ID matches the current PCI device.
This would let us maintain same port ID for the same PCI device, keeping
the chance of referencing to wrong data minimal.
Fixes: af75078fece3 ("first public release")
Cc: stable@dpdk.org
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2017-01-09 07:50:59 +00:00
|
|
|
{
|
2017-09-29 07:17:24 +00:00
|
|
|
uint16_t i;
|
2018-01-22 16:38:20 +00:00
|
|
|
struct rte_eth_dev *eth_dev = NULL;
|
ethdev: fix port data mismatched in multiple process model
Assume we have two virtio ports, 00:03.0 and 00:04.0. The first one is
managed by the kernel driver, while the later one is managed by DPDK.
Now we start the primary process. 00:03.0 will be skipped by DPDK virtio
PMD driver (since it's being used by the kernel). 00:04.0 would be
successfully initiated by DPDK virtio PMD (if nothing abnormal happens).
After that, we would get a port id 0, and all the related info needed
by virtio (virtio_hw) is stored at rte_eth_dev_data[0].
Then we start the secondary process. As usual, 00:03.0 will be firstly
probed. It firstly tries to get a local eth_dev structure for it (by
rte_eth_dev_allocate):
port_id = rte_eth_dev_find_free_port();
...
eth_dev = &rte_eth_devices[port_id];
eth_dev->data = &rte_eth_dev_data[port_id];
...
return eth_dev;
Since it's a first PCI device, port_id will be 0. eth_dev->data would
then point to rte_eth_dev_data[0]. And here things start going wrong,
as rte_eth_dev_data[0] actually stores the virtio_hw for 00:04.0.
That said, in the secondary process, DPDK will continue to drive PCI
device 00.03.0 (despite the fact it's been managed by kernel), with
the info from PCI device 00:04.0. Which is wrong.
The fix is to attach the port already registered by the primary process.
That is, iterate the rte_eth_dev_data[], and get the port id who's PCI
ID matches the current PCI device.
This would let us maintain same port ID for the same PCI device, keeping
the chance of referencing to wrong data minimal.
Fixes: af75078fece3 ("first public release")
Cc: stable@dpdk.org
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2017-01-09 07:50:59 +00:00
|
|
|
|
2018-01-22 16:38:19 +00:00
|
|
|
rte_eth_dev_shared_data_prepare();
|
ethdev: fix port data mismatched in multiple process model
Assume we have two virtio ports, 00:03.0 and 00:04.0. The first one is
managed by the kernel driver, while the later one is managed by DPDK.
Now we start the primary process. 00:03.0 will be skipped by DPDK virtio
PMD driver (since it's being used by the kernel). 00:04.0 would be
successfully initiated by DPDK virtio PMD (if nothing abnormal happens).
After that, we would get a port id 0, and all the related info needed
by virtio (virtio_hw) is stored at rte_eth_dev_data[0].
Then we start the secondary process. As usual, 00:03.0 will be firstly
probed. It firstly tries to get a local eth_dev structure for it (by
rte_eth_dev_allocate):
port_id = rte_eth_dev_find_free_port();
...
eth_dev = &rte_eth_devices[port_id];
eth_dev->data = &rte_eth_dev_data[port_id];
...
return eth_dev;
Since it's a first PCI device, port_id will be 0. eth_dev->data would
then point to rte_eth_dev_data[0]. And here things start going wrong,
as rte_eth_dev_data[0] actually stores the virtio_hw for 00:04.0.
That said, in the secondary process, DPDK will continue to drive PCI
device 00.03.0 (despite the fact it's been managed by kernel), with
the info from PCI device 00:04.0. Which is wrong.
The fix is to attach the port already registered by the primary process.
That is, iterate the rte_eth_dev_data[], and get the port id who's PCI
ID matches the current PCI device.
This would let us maintain same port ID for the same PCI device, keeping
the chance of referencing to wrong data minimal.
Fixes: af75078fece3 ("first public release")
Cc: stable@dpdk.org
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2017-01-09 07:50:59 +00:00
|
|
|
|
2018-01-22 16:38:20 +00:00
|
|
|
/* Synchronize port attachment to primary port creation and release. */
|
|
|
|
rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
|
|
|
|
|
ethdev: fix port data mismatched in multiple process model
Assume we have two virtio ports, 00:03.0 and 00:04.0. The first one is
managed by the kernel driver, while the later one is managed by DPDK.
Now we start the primary process. 00:03.0 will be skipped by DPDK virtio
PMD driver (since it's being used by the kernel). 00:04.0 would be
successfully initiated by DPDK virtio PMD (if nothing abnormal happens).
After that, we would get a port id 0, and all the related info needed
by virtio (virtio_hw) is stored at rte_eth_dev_data[0].
Then we start the secondary process. As usual, 00:03.0 will be firstly
probed. It firstly tries to get a local eth_dev structure for it (by
rte_eth_dev_allocate):
port_id = rte_eth_dev_find_free_port();
...
eth_dev = &rte_eth_devices[port_id];
eth_dev->data = &rte_eth_dev_data[port_id];
...
return eth_dev;
Since it's a first PCI device, port_id will be 0. eth_dev->data would
then point to rte_eth_dev_data[0]. And here things start going wrong,
as rte_eth_dev_data[0] actually stores the virtio_hw for 00:04.0.
That said, in the secondary process, DPDK will continue to drive PCI
device 00.03.0 (despite the fact it's been managed by kernel), with
the info from PCI device 00:04.0. Which is wrong.
The fix is to attach the port already registered by the primary process.
That is, iterate the rte_eth_dev_data[], and get the port id who's PCI
ID matches the current PCI device.
This would let us maintain same port ID for the same PCI device, keeping
the chance of referencing to wrong data minimal.
Fixes: af75078fece3 ("first public release")
Cc: stable@dpdk.org
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2017-01-09 07:50:59 +00:00
|
|
|
for (i = 0; i < RTE_MAX_ETHPORTS; i++) {
|
2018-01-22 16:38:19 +00:00
|
|
|
if (strcmp(rte_eth_dev_shared_data->data[i].name, name) == 0)
|
ethdev: fix port data mismatched in multiple process model
Assume we have two virtio ports, 00:03.0 and 00:04.0. The first one is
managed by the kernel driver, while the later one is managed by DPDK.
Now we start the primary process. 00:03.0 will be skipped by DPDK virtio
PMD driver (since it's being used by the kernel). 00:04.0 would be
successfully initiated by DPDK virtio PMD (if nothing abnormal happens).
After that, we would get a port id 0, and all the related info needed
by virtio (virtio_hw) is stored at rte_eth_dev_data[0].
Then we start the secondary process. As usual, 00:03.0 will be firstly
probed. It firstly tries to get a local eth_dev structure for it (by
rte_eth_dev_allocate):
port_id = rte_eth_dev_find_free_port();
...
eth_dev = &rte_eth_devices[port_id];
eth_dev->data = &rte_eth_dev_data[port_id];
...
return eth_dev;
Since it's a first PCI device, port_id will be 0. eth_dev->data would
then point to rte_eth_dev_data[0]. And here things start going wrong,
as rte_eth_dev_data[0] actually stores the virtio_hw for 00:04.0.
That said, in the secondary process, DPDK will continue to drive PCI
device 00.03.0 (despite the fact it's been managed by kernel), with
the info from PCI device 00:04.0. Which is wrong.
The fix is to attach the port already registered by the primary process.
That is, iterate the rte_eth_dev_data[], and get the port id who's PCI
ID matches the current PCI device.
This would let us maintain same port ID for the same PCI device, keeping
the chance of referencing to wrong data minimal.
Fixes: af75078fece3 ("first public release")
Cc: stable@dpdk.org
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2017-01-09 07:50:59 +00:00
|
|
|
break;
|
|
|
|
}
|
|
|
|
if (i == RTE_MAX_ETHPORTS) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Device %s is not driven by the primary process\n",
|
ethdev: fix port data mismatched in multiple process model
Assume we have two virtio ports, 00:03.0 and 00:04.0. The first one is
managed by the kernel driver, while the later one is managed by DPDK.
Now we start the primary process. 00:03.0 will be skipped by DPDK virtio
PMD driver (since it's being used by the kernel). 00:04.0 would be
successfully initiated by DPDK virtio PMD (if nothing abnormal happens).
After that, we would get a port id 0, and all the related info needed
by virtio (virtio_hw) is stored at rte_eth_dev_data[0].
Then we start the secondary process. As usual, 00:03.0 will be firstly
probed. It firstly tries to get a local eth_dev structure for it (by
rte_eth_dev_allocate):
port_id = rte_eth_dev_find_free_port();
...
eth_dev = &rte_eth_devices[port_id];
eth_dev->data = &rte_eth_dev_data[port_id];
...
return eth_dev;
Since it's a first PCI device, port_id will be 0. eth_dev->data would
then point to rte_eth_dev_data[0]. And here things start going wrong,
as rte_eth_dev_data[0] actually stores the virtio_hw for 00:04.0.
That said, in the secondary process, DPDK will continue to drive PCI
device 00.03.0 (despite the fact it's been managed by kernel), with
the info from PCI device 00:04.0. Which is wrong.
The fix is to attach the port already registered by the primary process.
That is, iterate the rte_eth_dev_data[], and get the port id who's PCI
ID matches the current PCI device.
This would let us maintain same port ID for the same PCI device, keeping
the chance of referencing to wrong data minimal.
Fixes: af75078fece3 ("first public release")
Cc: stable@dpdk.org
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2017-01-09 07:50:59 +00:00
|
|
|
name);
|
2018-01-22 16:38:20 +00:00
|
|
|
} else {
|
|
|
|
eth_dev = eth_dev_get(i);
|
|
|
|
RTE_ASSERT(eth_dev->data->port_id == i);
|
ethdev: fix port data mismatched in multiple process model
Assume we have two virtio ports, 00:03.0 and 00:04.0. The first one is
managed by the kernel driver, while the later one is managed by DPDK.
Now we start the primary process. 00:03.0 will be skipped by DPDK virtio
PMD driver (since it's being used by the kernel). 00:04.0 would be
successfully initiated by DPDK virtio PMD (if nothing abnormal happens).
After that, we would get a port id 0, and all the related info needed
by virtio (virtio_hw) is stored at rte_eth_dev_data[0].
Then we start the secondary process. As usual, 00:03.0 will be firstly
probed. It firstly tries to get a local eth_dev structure for it (by
rte_eth_dev_allocate):
port_id = rte_eth_dev_find_free_port();
...
eth_dev = &rte_eth_devices[port_id];
eth_dev->data = &rte_eth_dev_data[port_id];
...
return eth_dev;
Since it's a first PCI device, port_id will be 0. eth_dev->data would
then point to rte_eth_dev_data[0]. And here things start going wrong,
as rte_eth_dev_data[0] actually stores the virtio_hw for 00:04.0.
That said, in the secondary process, DPDK will continue to drive PCI
device 00.03.0 (despite the fact it's been managed by kernel), with
the info from PCI device 00:04.0. Which is wrong.
The fix is to attach the port already registered by the primary process.
That is, iterate the rte_eth_dev_data[], and get the port id who's PCI
ID matches the current PCI device.
This would let us maintain same port ID for the same PCI device, keeping
the chance of referencing to wrong data minimal.
Fixes: af75078fece3 ("first public release")
Cc: stable@dpdk.org
Signed-off-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
Acked-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2017-01-09 07:50:59 +00:00
|
|
|
}
|
|
|
|
|
2018-01-22 16:38:20 +00:00
|
|
|
rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
|
2012-09-04 12:54:00 +00:00
|
|
|
return eth_dev;
|
|
|
|
}
|
|
|
|
|
2015-02-25 19:32:20 +00:00
|
|
|
int
|
|
|
|
rte_eth_dev_release_port(struct rte_eth_dev *eth_dev)
|
|
|
|
{
|
|
|
|
if (eth_dev == NULL)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2018-01-22 16:38:19 +00:00
|
|
|
rte_eth_dev_shared_data_prepare();
|
|
|
|
|
2018-05-10 23:58:36 +00:00
|
|
|
_rte_eth_dev_callback_process(eth_dev, RTE_ETH_EVENT_DESTROY, NULL);
|
|
|
|
|
2018-01-22 16:38:19 +00:00
|
|
|
rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
|
|
|
|
|
2017-03-31 12:04:37 +00:00
|
|
|
eth_dev->state = RTE_ETH_DEV_UNUSED;
|
2018-01-04 16:01:11 +00:00
|
|
|
|
2018-01-22 16:38:19 +00:00
|
|
|
memset(eth_dev->data, 0, sizeof(struct rte_eth_dev_data));
|
|
|
|
|
|
|
|
rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
|
|
|
|
|
2015-02-25 19:32:20 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-06-10 22:06:24 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_is_valid_port(uint16_t port_id)
|
2015-02-25 19:32:18 +00:00
|
|
|
{
|
|
|
|
if (port_id >= RTE_MAX_ETHPORTS ||
|
2018-01-20 21:12:19 +00:00
|
|
|
(rte_eth_devices[port_id].state == RTE_ETH_DEV_UNUSED))
|
2015-02-25 19:32:18 +00:00
|
|
|
return 0;
|
|
|
|
else
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2018-01-22 16:38:19 +00:00
|
|
|
static int
|
|
|
|
rte_eth_is_valid_owner_id(uint64_t owner_id)
|
|
|
|
{
|
|
|
|
if (owner_id == RTE_ETH_DEV_NO_OWNER ||
|
2018-08-16 22:37:14 +00:00
|
|
|
rte_eth_dev_shared_data->next_owner_id <= owner_id)
|
2018-01-22 16:38:19 +00:00
|
|
|
return 0;
|
|
|
|
return 1;
|
|
|
|
}
|
|
|
|
|
2018-04-24 02:15:11 +00:00
|
|
|
uint64_t
|
2018-01-22 16:38:19 +00:00
|
|
|
rte_eth_find_next_owned_by(uint16_t port_id, const uint64_t owner_id)
|
|
|
|
{
|
|
|
|
while (port_id < RTE_MAX_ETHPORTS &&
|
|
|
|
((rte_eth_devices[port_id].state != RTE_ETH_DEV_ATTACHED &&
|
|
|
|
rte_eth_devices[port_id].state != RTE_ETH_DEV_REMOVED) ||
|
|
|
|
rte_eth_devices[port_id].data->owner.id != owner_id))
|
|
|
|
port_id++;
|
|
|
|
|
|
|
|
if (port_id >= RTE_MAX_ETHPORTS)
|
|
|
|
return RTE_MAX_ETHPORTS;
|
|
|
|
|
|
|
|
return port_id;
|
|
|
|
}
|
|
|
|
|
|
|
|
int __rte_experimental
|
|
|
|
rte_eth_dev_owner_new(uint64_t *owner_id)
|
|
|
|
{
|
|
|
|
rte_eth_dev_shared_data_prepare();
|
|
|
|
|
|
|
|
rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
|
|
|
|
|
|
|
|
*owner_id = rte_eth_dev_shared_data->next_owner_id++;
|
|
|
|
|
|
|
|
rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
_rte_eth_dev_owner_set(const uint16_t port_id, const uint64_t old_owner_id,
|
|
|
|
const struct rte_eth_dev_owner *new_owner)
|
|
|
|
{
|
2018-05-10 23:58:31 +00:00
|
|
|
struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
|
2018-01-22 16:38:19 +00:00
|
|
|
struct rte_eth_dev_owner *port_owner;
|
|
|
|
int sret;
|
|
|
|
|
2018-05-10 23:58:31 +00:00
|
|
|
if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
|
|
|
|
port_id);
|
2018-05-10 23:58:31 +00:00
|
|
|
return -ENODEV;
|
|
|
|
}
|
2018-01-22 16:38:19 +00:00
|
|
|
|
|
|
|
if (!rte_eth_is_valid_owner_id(new_owner->id) &&
|
2018-08-16 22:37:14 +00:00
|
|
|
!rte_eth_is_valid_owner_id(old_owner_id)) {
|
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Invalid owner old_id=%016"PRIx64" new_id=%016"PRIx64"\n",
|
|
|
|
old_owner_id, new_owner->id);
|
2018-01-22 16:38:19 +00:00
|
|
|
return -EINVAL;
|
2018-08-16 22:37:14 +00:00
|
|
|
}
|
2018-01-22 16:38:19 +00:00
|
|
|
|
|
|
|
port_owner = &rte_eth_devices[port_id].data->owner;
|
|
|
|
if (port_owner->id != old_owner_id) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Cannot set owner to port %u already owned by %s_%016"PRIX64"\n",
|
|
|
|
port_id, port_owner->name, port_owner->id);
|
2018-01-22 16:38:19 +00:00
|
|
|
return -EPERM;
|
|
|
|
}
|
|
|
|
|
|
|
|
sret = snprintf(port_owner->name, RTE_ETH_MAX_OWNER_NAME_LEN, "%s",
|
|
|
|
new_owner->name);
|
|
|
|
if (sret < 0 || sret >= RTE_ETH_MAX_OWNER_NAME_LEN)
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Port %u owner name was truncated\n",
|
|
|
|
port_id);
|
2018-01-22 16:38:19 +00:00
|
|
|
|
|
|
|
port_owner->id = new_owner->id;
|
|
|
|
|
2018-08-01 17:43:56 +00:00
|
|
|
RTE_ETHDEV_LOG(DEBUG, "Port %u owner is %s_%016"PRIx64"\n",
|
2018-06-19 01:04:56 +00:00
|
|
|
port_id, new_owner->name, new_owner->id);
|
2018-01-22 16:38:19 +00:00
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int __rte_experimental
|
|
|
|
rte_eth_dev_owner_set(const uint16_t port_id,
|
|
|
|
const struct rte_eth_dev_owner *owner)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
rte_eth_dev_shared_data_prepare();
|
|
|
|
|
|
|
|
rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
|
|
|
|
|
|
|
|
ret = _rte_eth_dev_owner_set(port_id, RTE_ETH_DEV_NO_OWNER, owner);
|
|
|
|
|
|
|
|
rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
int __rte_experimental
|
|
|
|
rte_eth_dev_owner_unset(const uint16_t port_id, const uint64_t owner_id)
|
|
|
|
{
|
|
|
|
const struct rte_eth_dev_owner new_owner = (struct rte_eth_dev_owner)
|
|
|
|
{.id = RTE_ETH_DEV_NO_OWNER, .name = ""};
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
rte_eth_dev_shared_data_prepare();
|
|
|
|
|
|
|
|
rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
|
|
|
|
|
|
|
|
ret = _rte_eth_dev_owner_set(port_id, owner_id, &new_owner);
|
|
|
|
|
|
|
|
rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
void __rte_experimental
|
|
|
|
rte_eth_dev_owner_delete(const uint64_t owner_id)
|
|
|
|
{
|
|
|
|
uint16_t port_id;
|
|
|
|
|
|
|
|
rte_eth_dev_shared_data_prepare();
|
|
|
|
|
|
|
|
rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
|
|
|
|
|
|
|
|
if (rte_eth_is_valid_owner_id(owner_id)) {
|
2018-05-10 23:58:31 +00:00
|
|
|
for (port_id = 0; port_id < RTE_MAX_ETHPORTS; port_id++)
|
|
|
|
if (rte_eth_devices[port_id].data->owner.id == owner_id)
|
|
|
|
memset(&rte_eth_devices[port_id].data->owner, 0,
|
|
|
|
sizeof(struct rte_eth_dev_owner));
|
2018-08-16 22:37:14 +00:00
|
|
|
RTE_ETHDEV_LOG(NOTICE,
|
2018-06-19 01:04:56 +00:00
|
|
|
"All port owners owned by %016"PRIx64" identifier have removed\n",
|
|
|
|
owner_id);
|
2018-08-16 22:37:14 +00:00
|
|
|
} else {
|
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Invalid owner id=%016"PRIx64"\n",
|
|
|
|
owner_id);
|
2018-01-22 16:38:19 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
|
|
|
|
}
|
|
|
|
|
|
|
|
int __rte_experimental
|
|
|
|
rte_eth_dev_owner_get(const uint16_t port_id, struct rte_eth_dev_owner *owner)
|
|
|
|
{
|
|
|
|
int ret = 0;
|
2018-05-10 23:58:31 +00:00
|
|
|
struct rte_eth_dev *ethdev = &rte_eth_devices[port_id];
|
2018-01-22 16:38:19 +00:00
|
|
|
|
|
|
|
rte_eth_dev_shared_data_prepare();
|
|
|
|
|
|
|
|
rte_spinlock_lock(&rte_eth_dev_shared_data->ownership_lock);
|
|
|
|
|
2018-05-10 23:58:31 +00:00
|
|
|
if (port_id >= RTE_MAX_ETHPORTS || !is_allocated(ethdev)) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Port id %"PRIu16" is not allocated\n",
|
|
|
|
port_id);
|
2018-01-22 16:38:19 +00:00
|
|
|
ret = -ENODEV;
|
|
|
|
} else {
|
2018-05-10 23:58:31 +00:00
|
|
|
rte_memcpy(owner, ðdev->data->owner, sizeof(*owner));
|
2018-01-22 16:38:19 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
rte_spinlock_unlock(&rte_eth_dev_shared_data->ownership_lock);
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2013-06-03 00:00:00 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_socket_id(uint16_t port_id)
|
2013-06-03 00:00:00 +00:00
|
|
|
{
|
2016-05-18 19:15:11 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
|
2015-11-03 13:01:58 +00:00
|
|
|
return rte_eth_devices[port_id].data->numa_node;
|
2013-06-03 00:00:00 +00:00
|
|
|
}
|
|
|
|
|
2017-10-25 15:07:21 +00:00
|
|
|
void *
|
2018-03-09 11:27:48 +00:00
|
|
|
rte_eth_dev_get_sec_ctx(uint16_t port_id)
|
2017-10-25 15:07:21 +00:00
|
|
|
{
|
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, NULL);
|
|
|
|
return rte_eth_devices[port_id].security_ctx;
|
|
|
|
}
|
|
|
|
|
2017-09-29 07:17:24 +00:00
|
|
|
uint16_t
|
2012-09-04 12:54:00 +00:00
|
|
|
rte_eth_dev_count(void)
|
2018-04-05 15:33:22 +00:00
|
|
|
{
|
|
|
|
return rte_eth_dev_count_avail();
|
|
|
|
}
|
|
|
|
|
|
|
|
uint16_t
|
|
|
|
rte_eth_dev_count_avail(void)
|
2012-09-04 12:54:00 +00:00
|
|
|
{
|
2017-09-29 07:17:24 +00:00
|
|
|
uint16_t p;
|
|
|
|
uint16_t count;
|
2017-07-18 12:48:13 +00:00
|
|
|
|
|
|
|
count = 0;
|
|
|
|
|
|
|
|
RTE_ETH_FOREACH_DEV(p)
|
|
|
|
count++;
|
|
|
|
|
|
|
|
return count;
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
|
|
|
|
2018-04-24 02:15:11 +00:00
|
|
|
uint16_t __rte_experimental
|
2018-04-05 15:33:22 +00:00
|
|
|
rte_eth_dev_count_total(void)
|
|
|
|
{
|
|
|
|
uint16_t port, count = 0;
|
|
|
|
|
|
|
|
for (port = 0; port < RTE_MAX_ETHPORTS; port++)
|
|
|
|
if (rte_eth_devices[port].state != RTE_ETH_DEV_UNUSED)
|
|
|
|
count++;
|
|
|
|
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
2016-06-15 14:06:21 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_get_name_by_port(uint16_t port_id, char *name)
|
2015-02-25 19:32:26 +00:00
|
|
|
{
|
2017-09-22 11:30:07 +00:00
|
|
|
char *tmp;
|
2015-02-25 19:32:26 +00:00
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
|
2015-02-25 19:32:26 +00:00
|
|
|
|
|
|
|
if (name == NULL) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
|
2015-02-25 19:32:26 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* shouldn't check 'rte_eth_devices[i].data',
|
|
|
|
* because it might be overwritten by VDEV PMD */
|
2018-01-22 16:38:19 +00:00
|
|
|
tmp = rte_eth_dev_shared_data->data[port_id].name;
|
2015-02-25 19:32:26 +00:00
|
|
|
strcpy(name, tmp);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2016-06-15 14:06:21 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_get_port_by_name(const char *name, uint16_t *port_id)
|
2015-09-23 21:16:17 +00:00
|
|
|
{
|
2018-01-22 16:38:19 +00:00
|
|
|
uint32_t pid;
|
2015-09-23 21:16:17 +00:00
|
|
|
|
|
|
|
if (name == NULL) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Null pointer is specified\n");
|
2015-09-23 21:16:17 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2018-01-22 16:38:19 +00:00
|
|
|
for (pid = 0; pid < RTE_MAX_ETHPORTS; pid++) {
|
|
|
|
if (rte_eth_devices[pid].state != RTE_ETH_DEV_UNUSED &&
|
2018-02-27 08:58:27 +00:00
|
|
|
!strcmp(name, rte_eth_dev_shared_data->data[pid].name)) {
|
2018-01-22 16:38:19 +00:00
|
|
|
*port_id = pid;
|
2015-09-23 21:16:17 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
2018-01-22 16:38:19 +00:00
|
|
|
|
2015-09-23 21:16:17 +00:00
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
2018-01-20 21:12:22 +00:00
|
|
|
static int
|
|
|
|
eth_err(uint16_t port_id, int ret)
|
|
|
|
{
|
|
|
|
if (ret == 0)
|
|
|
|
return 0;
|
|
|
|
if (rte_eth_dev_is_removed(port_id))
|
|
|
|
return -EIO;
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2016-09-20 12:41:25 +00:00
|
|
|
/* attach the new device, then store port_id of the device */
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_attach(const char *devargs, uint16_t *port_id)
|
2015-02-25 19:32:26 +00:00
|
|
|
{
|
2018-04-05 15:33:22 +00:00
|
|
|
int current = rte_eth_dev_count_total();
|
2018-04-23 23:54:52 +00:00
|
|
|
struct rte_devargs da;
|
|
|
|
int ret = -1;
|
|
|
|
|
|
|
|
memset(&da, 0, sizeof(da));
|
2015-09-23 21:16:17 +00:00
|
|
|
|
2016-09-20 12:41:25 +00:00
|
|
|
if ((devargs == NULL) || (port_id == NULL)) {
|
|
|
|
ret = -EINVAL;
|
2015-02-25 19:32:26 +00:00
|
|
|
goto err;
|
2016-09-20 12:41:25 +00:00
|
|
|
}
|
2015-02-25 19:32:26 +00:00
|
|
|
|
2018-04-23 23:54:52 +00:00
|
|
|
/* parse devargs */
|
2018-07-11 21:44:52 +00:00
|
|
|
if (rte_devargs_parse(&da, devargs))
|
2015-02-25 19:32:26 +00:00
|
|
|
goto err;
|
|
|
|
|
2018-04-23 23:54:52 +00:00
|
|
|
ret = rte_eal_hotplug_add(da.bus->name, da.name, da.args);
|
2016-09-20 12:41:25 +00:00
|
|
|
if (ret < 0)
|
2015-02-25 19:32:26 +00:00
|
|
|
goto err;
|
|
|
|
|
2016-10-07 13:01:15 +00:00
|
|
|
/* no point looking at the port count if no port exists */
|
2018-04-05 15:33:22 +00:00
|
|
|
if (!rte_eth_dev_count_total()) {
|
2018-06-19 01:04:55 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "No port found for device (%s)\n", da.name);
|
2016-09-20 12:41:25 +00:00
|
|
|
ret = -1;
|
2015-02-25 19:32:26 +00:00
|
|
|
goto err;
|
2016-09-20 12:41:25 +00:00
|
|
|
}
|
2015-02-25 19:32:26 +00:00
|
|
|
|
2016-09-20 12:41:25 +00:00
|
|
|
/* if nothing happened, there is a bug here, since some driver told us
|
|
|
|
* it did attach a device, but did not create a port.
|
2018-04-05 15:33:22 +00:00
|
|
|
* FIXME: race condition in case of plug-out of another device
|
2015-09-23 21:16:17 +00:00
|
|
|
*/
|
2018-04-05 15:33:22 +00:00
|
|
|
if (current == rte_eth_dev_count_total()) {
|
2016-09-20 12:41:25 +00:00
|
|
|
ret = -1;
|
2016-01-22 14:06:58 +00:00
|
|
|
goto err;
|
|
|
|
}
|
2015-02-25 19:32:26 +00:00
|
|
|
|
2016-09-20 12:41:25 +00:00
|
|
|
*port_id = eth_dev_last_created_port;
|
|
|
|
ret = 0;
|
2016-01-22 14:06:58 +00:00
|
|
|
|
|
|
|
err:
|
2018-04-23 23:54:52 +00:00
|
|
|
free(da.args);
|
2016-01-22 14:06:58 +00:00
|
|
|
return ret;
|
2015-02-25 19:32:26 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* detach the device, then store the name of the device */
|
|
|
|
int
|
2018-04-23 23:54:52 +00:00
|
|
|
rte_eth_dev_detach(uint16_t port_id, char *name __rte_unused)
|
2015-02-25 19:32:26 +00:00
|
|
|
{
|
2018-04-23 23:54:52 +00:00
|
|
|
struct rte_device *dev;
|
|
|
|
struct rte_bus *bus;
|
2017-10-24 10:35:37 +00:00
|
|
|
uint32_t dev_flags;
|
2016-01-22 14:06:58 +00:00
|
|
|
int ret = -1;
|
2015-02-25 19:32:26 +00:00
|
|
|
|
2017-10-24 10:35:37 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
|
|
|
|
|
|
|
|
dev_flags = rte_eth_devices[port_id].data->dev_flags;
|
|
|
|
if (dev_flags & RTE_ETH_DEV_BONDED_SLAVE) {
|
2018-06-19 01:04:55 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
2018-06-19 01:04:56 +00:00
|
|
|
"Port %"PRIu16" is bonded, cannot detach\n", port_id);
|
2018-04-23 23:54:52 +00:00
|
|
|
return -ENOTSUP;
|
2017-10-24 10:35:37 +00:00
|
|
|
}
|
2015-02-25 19:32:26 +00:00
|
|
|
|
2018-04-23 23:54:52 +00:00
|
|
|
dev = rte_eth_devices[port_id].device;
|
|
|
|
if (dev == NULL)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
bus = rte_bus_find_by_device(dev);
|
|
|
|
if (bus == NULL)
|
|
|
|
return -ENOENT;
|
2017-06-30 18:19:42 +00:00
|
|
|
|
2018-04-23 23:54:52 +00:00
|
|
|
ret = rte_eal_hotplug_remove(bus->name, dev->name);
|
2016-09-20 12:41:25 +00:00
|
|
|
if (ret < 0)
|
2018-04-23 23:54:52 +00:00
|
|
|
return ret;
|
2015-02-25 19:32:26 +00:00
|
|
|
|
2018-01-04 16:01:10 +00:00
|
|
|
rte_eth_dev_release_port(&rte_eth_devices[port_id]);
|
2016-01-22 14:06:58 +00:00
|
|
|
return 0;
|
2015-02-25 19:32:26 +00:00
|
|
|
}
|
|
|
|
|
2012-12-19 23:00:00 +00:00
|
|
|
static int
|
|
|
|
rte_eth_dev_rx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
|
|
|
|
{
|
|
|
|
uint16_t old_nb_queues = dev->data->nb_rx_queues;
|
|
|
|
void **rxq;
|
|
|
|
unsigned i;
|
|
|
|
|
2016-01-05 16:34:58 +00:00
|
|
|
if (dev->data->rx_queues == NULL && nb_queues != 0) { /* first time configuration */
|
2012-12-19 23:00:00 +00:00
|
|
|
dev->data->rx_queues = rte_zmalloc("ethdev->rx_queues",
|
|
|
|
sizeof(dev->data->rx_queues[0]) * nb_queues,
|
2014-11-19 12:26:06 +00:00
|
|
|
RTE_CACHE_LINE_SIZE);
|
2012-12-19 23:00:00 +00:00
|
|
|
if (dev->data->rx_queues == NULL) {
|
|
|
|
dev->data->nb_rx_queues = 0;
|
|
|
|
return -(ENOMEM);
|
|
|
|
}
|
2016-01-05 16:34:58 +00:00
|
|
|
} else if (dev->data->rx_queues != NULL && nb_queues != 0) { /* re-configure */
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
|
2013-09-13 12:14:02 +00:00
|
|
|
|
2012-12-19 23:00:00 +00:00
|
|
|
rxq = dev->data->rx_queues;
|
|
|
|
|
|
|
|
for (i = nb_queues; i < old_nb_queues; i++)
|
|
|
|
(*dev->dev_ops->rx_queue_release)(rxq[i]);
|
|
|
|
rxq = rte_realloc(rxq, sizeof(rxq[0]) * nb_queues,
|
2014-11-19 12:26:06 +00:00
|
|
|
RTE_CACHE_LINE_SIZE);
|
2012-12-19 23:00:00 +00:00
|
|
|
if (rxq == NULL)
|
|
|
|
return -(ENOMEM);
|
2015-02-23 18:30:09 +00:00
|
|
|
if (nb_queues > old_nb_queues) {
|
|
|
|
uint16_t new_qs = nb_queues - old_nb_queues;
|
2015-06-27 00:01:44 +00:00
|
|
|
|
2012-12-19 23:00:00 +00:00
|
|
|
memset(rxq + old_nb_queues, 0,
|
2015-02-23 18:30:09 +00:00
|
|
|
sizeof(rxq[0]) * new_qs);
|
|
|
|
}
|
2012-12-19 23:00:00 +00:00
|
|
|
|
|
|
|
dev->data->rx_queues = rxq;
|
|
|
|
|
2016-01-05 16:34:58 +00:00
|
|
|
} else if (dev->data->rx_queues != NULL && nb_queues == 0) {
|
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release, -ENOTSUP);
|
|
|
|
|
|
|
|
rxq = dev->data->rx_queues;
|
|
|
|
|
|
|
|
for (i = nb_queues; i < old_nb_queues; i++)
|
|
|
|
(*dev->dev_ops->rx_queue_release)(rxq[i]);
|
2016-11-24 11:26:46 +00:00
|
|
|
|
|
|
|
rte_free(dev->data->rx_queues);
|
|
|
|
dev->data->rx_queues = NULL;
|
2012-12-19 23:00:00 +00:00
|
|
|
}
|
|
|
|
dev->data->nb_rx_queues = nb_queues;
|
2015-04-09 21:29:42 +00:00
|
|
|
return 0;
|
2012-12-19 23:00:00 +00:00
|
|
|
}
|
|
|
|
|
2014-05-28 08:06:36 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_rx_queue_start(uint16_t port_id, uint16_t rx_queue_id)
|
2014-05-28 08:06:36 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
|
2014-05-28 08:06:36 +00:00
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
2018-03-22 12:59:01 +00:00
|
|
|
if (!dev->data->dev_started) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Port %u must be started before start any queue\n",
|
|
|
|
port_id);
|
2018-03-22 12:59:01 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2014-05-28 08:06:36 +00:00
|
|
|
if (rx_queue_id >= dev->data->nb_rx_queues) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
|
2014-05-28 08:06:36 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_start, -ENOTSUP);
|
2014-05-28 08:06:36 +00:00
|
|
|
|
2015-09-16 21:51:24 +00:00
|
|
|
if (dev->data->rx_queue_state[rx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
|
2018-08-02 18:39:41 +00:00
|
|
|
RTE_ETHDEV_LOG(INFO,
|
2018-06-19 01:04:56 +00:00
|
|
|
"Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
|
2015-09-16 21:51:24 +00:00
|
|
|
rx_queue_id, port_id);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, dev->dev_ops->rx_queue_start(dev,
|
|
|
|
rx_queue_id));
|
2014-05-28 08:06:36 +00:00
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_rx_queue_stop(uint16_t port_id, uint16_t rx_queue_id)
|
2014-05-28 08:06:36 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
|
2014-05-28 08:06:36 +00:00
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
if (rx_queue_id >= dev->data->nb_rx_queues) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
|
2014-05-28 08:06:36 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_stop, -ENOTSUP);
|
2014-05-28 08:06:36 +00:00
|
|
|
|
2015-09-16 21:51:24 +00:00
|
|
|
if (dev->data->rx_queue_state[rx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
|
2018-08-02 18:39:41 +00:00
|
|
|
RTE_ETHDEV_LOG(INFO,
|
2018-06-19 01:04:56 +00:00
|
|
|
"Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
|
2015-09-16 21:51:24 +00:00
|
|
|
rx_queue_id, port_id);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, dev->dev_ops->rx_queue_stop(dev, rx_queue_id));
|
2014-05-28 08:06:36 +00:00
|
|
|
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_tx_queue_start(uint16_t port_id, uint16_t tx_queue_id)
|
2014-05-28 08:06:36 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
|
2014-05-28 08:06:36 +00:00
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
2018-03-22 12:59:01 +00:00
|
|
|
if (!dev->data->dev_started) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Port %u must be started before start any queue\n",
|
|
|
|
port_id);
|
2018-03-22 12:59:01 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2014-05-28 08:06:36 +00:00
|
|
|
if (tx_queue_id >= dev->data->nb_tx_queues) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
|
2014-05-28 08:06:36 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_start, -ENOTSUP);
|
2014-05-28 08:06:36 +00:00
|
|
|
|
2015-09-16 21:51:24 +00:00
|
|
|
if (dev->data->tx_queue_state[tx_queue_id] != RTE_ETH_QUEUE_STATE_STOPPED) {
|
2018-08-02 18:39:41 +00:00
|
|
|
RTE_ETHDEV_LOG(INFO,
|
2018-06-19 01:04:56 +00:00
|
|
|
"Queue %"PRIu16" of device with port_id=%"PRIu16" already started\n",
|
2015-09-16 21:51:24 +00:00
|
|
|
tx_queue_id, port_id);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-06-19 01:04:56 +00:00
|
|
|
return eth_err(port_id, dev->dev_ops->tx_queue_start(dev, tx_queue_id));
|
2014-05-28 08:06:36 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_tx_queue_stop(uint16_t port_id, uint16_t tx_queue_id)
|
2014-05-28 08:06:36 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
|
2014-05-28 08:06:36 +00:00
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
if (tx_queue_id >= dev->data->nb_tx_queues) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
|
2014-05-28 08:06:36 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_stop, -ENOTSUP);
|
2014-05-28 08:06:36 +00:00
|
|
|
|
2015-09-16 21:51:24 +00:00
|
|
|
if (dev->data->tx_queue_state[tx_queue_id] == RTE_ETH_QUEUE_STATE_STOPPED) {
|
2018-08-02 18:39:41 +00:00
|
|
|
RTE_ETHDEV_LOG(INFO,
|
2018-06-19 01:04:56 +00:00
|
|
|
"Queue %"PRIu16" of device with port_id=%"PRIu16" already stopped\n",
|
2015-09-16 21:51:24 +00:00
|
|
|
tx_queue_id, port_id);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, dev->dev_ops->tx_queue_stop(dev, tx_queue_id));
|
2014-05-28 08:06:36 +00:00
|
|
|
|
|
|
|
}
|
|
|
|
|
2012-12-19 23:00:00 +00:00
|
|
|
static int
|
|
|
|
rte_eth_dev_tx_queue_config(struct rte_eth_dev *dev, uint16_t nb_queues)
|
|
|
|
{
|
|
|
|
uint16_t old_nb_queues = dev->data->nb_tx_queues;
|
|
|
|
void **txq;
|
|
|
|
unsigned i;
|
|
|
|
|
2016-01-05 16:34:58 +00:00
|
|
|
if (dev->data->tx_queues == NULL && nb_queues != 0) { /* first time configuration */
|
2012-12-19 23:00:00 +00:00
|
|
|
dev->data->tx_queues = rte_zmalloc("ethdev->tx_queues",
|
2015-06-27 00:01:44 +00:00
|
|
|
sizeof(dev->data->tx_queues[0]) * nb_queues,
|
|
|
|
RTE_CACHE_LINE_SIZE);
|
2012-12-19 23:00:00 +00:00
|
|
|
if (dev->data->tx_queues == NULL) {
|
|
|
|
dev->data->nb_tx_queues = 0;
|
|
|
|
return -(ENOMEM);
|
|
|
|
}
|
2016-01-05 16:34:58 +00:00
|
|
|
} else if (dev->data->tx_queues != NULL && nb_queues != 0) { /* re-configure */
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
|
2013-09-13 12:14:02 +00:00
|
|
|
|
2012-12-19 23:00:00 +00:00
|
|
|
txq = dev->data->tx_queues;
|
|
|
|
|
|
|
|
for (i = nb_queues; i < old_nb_queues; i++)
|
|
|
|
(*dev->dev_ops->tx_queue_release)(txq[i]);
|
|
|
|
txq = rte_realloc(txq, sizeof(txq[0]) * nb_queues,
|
2015-06-27 00:01:44 +00:00
|
|
|
RTE_CACHE_LINE_SIZE);
|
2012-12-19 23:00:00 +00:00
|
|
|
if (txq == NULL)
|
2015-02-23 18:30:09 +00:00
|
|
|
return -ENOMEM;
|
|
|
|
if (nb_queues > old_nb_queues) {
|
|
|
|
uint16_t new_qs = nb_queues - old_nb_queues;
|
2015-06-27 00:01:44 +00:00
|
|
|
|
2012-12-19 23:00:00 +00:00
|
|
|
memset(txq + old_nb_queues, 0,
|
2015-06-27 00:01:44 +00:00
|
|
|
sizeof(txq[0]) * new_qs);
|
2015-02-23 18:30:09 +00:00
|
|
|
}
|
2012-12-19 23:00:00 +00:00
|
|
|
|
|
|
|
dev->data->tx_queues = txq;
|
|
|
|
|
2016-01-05 16:34:58 +00:00
|
|
|
} else if (dev->data->tx_queues != NULL && nb_queues == 0) {
|
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release, -ENOTSUP);
|
|
|
|
|
|
|
|
txq = dev->data->tx_queues;
|
|
|
|
|
|
|
|
for (i = nb_queues; i < old_nb_queues; i++)
|
|
|
|
(*dev->dev_ops->tx_queue_release)(txq[i]);
|
2016-11-24 11:26:46 +00:00
|
|
|
|
|
|
|
rte_free(dev->data->tx_queues);
|
|
|
|
dev->data->tx_queues = NULL;
|
2012-12-19 23:00:00 +00:00
|
|
|
}
|
|
|
|
dev->data->nb_tx_queues = nb_queues;
|
2015-04-09 21:29:42 +00:00
|
|
|
return 0;
|
2012-12-19 23:00:00 +00:00
|
|
|
}
|
|
|
|
|
2016-03-31 22:12:30 +00:00
|
|
|
uint32_t
|
|
|
|
rte_eth_speed_bitflag(uint32_t speed, int duplex)
|
|
|
|
{
|
|
|
|
switch (speed) {
|
|
|
|
case ETH_SPEED_NUM_10M:
|
|
|
|
return duplex ? ETH_LINK_SPEED_10M : ETH_LINK_SPEED_10M_HD;
|
|
|
|
case ETH_SPEED_NUM_100M:
|
|
|
|
return duplex ? ETH_LINK_SPEED_100M : ETH_LINK_SPEED_100M_HD;
|
|
|
|
case ETH_SPEED_NUM_1G:
|
|
|
|
return ETH_LINK_SPEED_1G;
|
|
|
|
case ETH_SPEED_NUM_2_5G:
|
|
|
|
return ETH_LINK_SPEED_2_5G;
|
|
|
|
case ETH_SPEED_NUM_5G:
|
|
|
|
return ETH_LINK_SPEED_5G;
|
|
|
|
case ETH_SPEED_NUM_10G:
|
|
|
|
return ETH_LINK_SPEED_10G;
|
|
|
|
case ETH_SPEED_NUM_20G:
|
|
|
|
return ETH_LINK_SPEED_20G;
|
|
|
|
case ETH_SPEED_NUM_25G:
|
|
|
|
return ETH_LINK_SPEED_25G;
|
|
|
|
case ETH_SPEED_NUM_40G:
|
|
|
|
return ETH_LINK_SPEED_40G;
|
|
|
|
case ETH_SPEED_NUM_50G:
|
|
|
|
return ETH_LINK_SPEED_50G;
|
|
|
|
case ETH_SPEED_NUM_56G:
|
|
|
|
return ETH_LINK_SPEED_56G;
|
2016-03-31 22:12:31 +00:00
|
|
|
case ETH_SPEED_NUM_100G:
|
|
|
|
return ETH_LINK_SPEED_100G;
|
2016-03-31 22:12:30 +00:00
|
|
|
default:
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2018-01-22 01:48:06 +00:00
|
|
|
const char * __rte_experimental
|
2018-01-18 09:44:26 +00:00
|
|
|
rte_eth_dev_rx_offload_name(uint64_t offload)
|
|
|
|
{
|
|
|
|
const char *name = "UNKNOWN";
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
for (i = 0; i < RTE_DIM(rte_rx_offload_names); ++i) {
|
|
|
|
if (offload == rte_rx_offload_names[i].offload) {
|
|
|
|
name = rte_rx_offload_names[i].name;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return name;
|
|
|
|
}
|
|
|
|
|
2018-01-22 01:48:06 +00:00
|
|
|
const char * __rte_experimental
|
2018-01-18 09:44:27 +00:00
|
|
|
rte_eth_dev_tx_offload_name(uint64_t offload)
|
|
|
|
{
|
|
|
|
const char *name = "UNKNOWN";
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
for (i = 0; i < RTE_DIM(rte_tx_offload_names); ++i) {
|
|
|
|
if (offload == rte_tx_offload_names[i].offload) {
|
|
|
|
name = rte_tx_offload_names[i].name;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return name;
|
|
|
|
}
|
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_configure(uint16_t port_id, uint16_t nb_rx_q, uint16_t nb_tx_q,
|
2012-09-04 12:54:00 +00:00
|
|
|
const struct rte_eth_conf *dev_conf)
|
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
struct rte_eth_dev_info dev_info;
|
2017-10-04 08:17:58 +00:00
|
|
|
struct rte_eth_conf local_conf = *dev_conf;
|
2012-09-04 12:54:00 +00:00
|
|
|
int diag;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
|
2015-02-25 19:32:18 +00:00
|
|
|
|
2018-04-10 09:43:16 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
|
2018-05-09 22:16:49 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_configure, -ENOTSUP);
|
|
|
|
|
|
|
|
rte_eth_dev_info_get(port_id, &dev_info);
|
2018-04-10 09:43:16 +00:00
|
|
|
|
|
|
|
/* If number of queues specified by application for both Rx and Tx is
|
|
|
|
* zero, use driver preferred values. This cannot be done individually
|
|
|
|
* as it is valid for either Tx or Rx (but not both) to be zero.
|
|
|
|
* If driver does not provide any preferred valued, fall back on
|
|
|
|
* EAL defaults.
|
|
|
|
*/
|
|
|
|
if (nb_rx_q == 0 && nb_tx_q == 0) {
|
|
|
|
nb_rx_q = dev_info.default_rxportconf.nb_queues;
|
|
|
|
if (nb_rx_q == 0)
|
|
|
|
nb_rx_q = RTE_ETH_DEV_FALLBACK_RX_NBQUEUES;
|
|
|
|
nb_tx_q = dev_info.default_txportconf.nb_queues;
|
|
|
|
if (nb_tx_q == 0)
|
|
|
|
nb_tx_q = RTE_ETH_DEV_FALLBACK_TX_NBQUEUES;
|
|
|
|
}
|
|
|
|
|
2015-03-26 17:02:45 +00:00
|
|
|
if (nb_rx_q > RTE_MAX_QUEUES_PER_PORT) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
2015-03-26 17:02:45 +00:00
|
|
|
"Number of RX queues requested (%u) is greater than max supported(%d)\n",
|
|
|
|
nb_rx_q, RTE_MAX_QUEUES_PER_PORT);
|
2015-04-09 21:29:42 +00:00
|
|
|
return -EINVAL;
|
2015-03-26 17:02:45 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
if (nb_tx_q > RTE_MAX_QUEUES_PER_PORT) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
2015-03-26 17:02:45 +00:00
|
|
|
"Number of TX queues requested (%u) is greater than max supported(%d)\n",
|
|
|
|
nb_tx_q, RTE_MAX_QUEUES_PER_PORT);
|
2015-04-09 21:29:42 +00:00
|
|
|
return -EINVAL;
|
2015-03-26 17:02:45 +00:00
|
|
|
}
|
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
if (dev->data->dev_started) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Port %u must be stopped to allow configuration\n",
|
|
|
|
port_id);
|
2015-04-09 21:29:42 +00:00
|
|
|
return -EBUSY;
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
|
|
|
|
2016-03-24 15:22:03 +00:00
|
|
|
/* Copy the dev_conf parameter into the dev structure */
|
2017-10-04 08:17:58 +00:00
|
|
|
memcpy(&dev->data->dev_conf, &local_conf, sizeof(dev->data->dev_conf));
|
2016-03-24 15:22:03 +00:00
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
/*
|
|
|
|
* Check that the numbers of RX and TX queues are not greater
|
|
|
|
* than the maximum number of RX and TX queues supported by the
|
|
|
|
* configured device.
|
|
|
|
*/
|
|
|
|
if (nb_rx_q > dev_info.max_rx_queues) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_rx_queues=%u > %u\n",
|
|
|
|
port_id, nb_rx_q, dev_info.max_rx_queues);
|
2015-04-09 21:29:42 +00:00
|
|
|
return -EINVAL;
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
if (nb_tx_q > dev_info.max_tx_queues) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Ethdev port_id=%u nb_tx_queues=%u > %u\n",
|
|
|
|
port_id, nb_tx_q, dev_info.max_tx_queues);
|
2015-04-09 21:29:42 +00:00
|
|
|
return -EINVAL;
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
|
|
|
|
2017-04-18 12:17:38 +00:00
|
|
|
/* Check that the device supports requested interrupts */
|
2015-11-03 13:01:58 +00:00
|
|
|
if ((dev_conf->intr_conf.lsc == 1) &&
|
2018-06-19 01:04:56 +00:00
|
|
|
(!(dev->data->dev_flags & RTE_ETH_DEV_INTR_LSC))) {
|
|
|
|
RTE_ETHDEV_LOG(ERR, "Driver %s does not support lsc\n",
|
|
|
|
dev->device->driver->name);
|
|
|
|
return -EINVAL;
|
2014-06-19 22:12:38 +00:00
|
|
|
}
|
2017-04-18 12:17:38 +00:00
|
|
|
if ((dev_conf->intr_conf.rmv == 1) &&
|
2018-06-19 01:04:56 +00:00
|
|
|
(!(dev->data->dev_flags & RTE_ETH_DEV_INTR_RMV))) {
|
|
|
|
RTE_ETHDEV_LOG(ERR, "Driver %s does not support rmv\n",
|
|
|
|
dev->device->driver->name);
|
2017-04-18 12:17:38 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
2014-06-19 22:12:38 +00:00
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
/*
|
|
|
|
* If jumbo frames are enabled, check that the maximum RX packet
|
|
|
|
* length is supported by the configured device.
|
|
|
|
*/
|
2017-10-04 08:17:58 +00:00
|
|
|
if (local_conf.rxmode.offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
|
2018-06-19 01:04:56 +00:00
|
|
|
if (dev_conf->rxmode.max_rx_pkt_len > dev_info.max_rx_pktlen) {
|
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Ethdev port_id=%u max_rx_pkt_len %u > max valid value %u\n",
|
|
|
|
port_id, dev_conf->rxmode.max_rx_pkt_len,
|
|
|
|
dev_info.max_rx_pktlen);
|
2015-04-09 21:29:42 +00:00
|
|
|
return -EINVAL;
|
2015-06-27 00:01:44 +00:00
|
|
|
} else if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Ethdev port_id=%u max_rx_pkt_len %u < min valid value %u\n",
|
|
|
|
port_id, dev_conf->rxmode.max_rx_pkt_len,
|
2012-12-19 23:00:00 +00:00
|
|
|
(unsigned)ETHER_MIN_LEN);
|
2015-04-09 21:29:42 +00:00
|
|
|
return -EINVAL;
|
2012-12-19 23:00:00 +00:00
|
|
|
}
|
2014-06-05 05:08:51 +00:00
|
|
|
} else {
|
|
|
|
if (dev_conf->rxmode.max_rx_pkt_len < ETHER_MIN_LEN ||
|
|
|
|
dev_conf->rxmode.max_rx_pkt_len > ETHER_MAX_LEN)
|
|
|
|
/* Use default value */
|
|
|
|
dev->data->dev_conf.rxmode.max_rx_pkt_len =
|
|
|
|
ETHER_MAX_LEN;
|
|
|
|
}
|
2012-09-04 12:54:00 +00:00
|
|
|
|
2018-05-10 11:56:55 +00:00
|
|
|
/* Any requested offloading must be within its device capabilities */
|
|
|
|
if ((local_conf.rxmode.offloads & dev_info.rx_offload_capa) !=
|
|
|
|
local_conf.rxmode.offloads) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Ethdev port_id=%u requested Rx offloads 0x%"PRIx64" doesn't match Rx offloads "
|
|
|
|
"capabilities 0x%"PRIx64" in %s()\n",
|
|
|
|
port_id, local_conf.rxmode.offloads,
|
|
|
|
dev_info.rx_offload_capa,
|
|
|
|
__func__);
|
2018-05-31 12:44:30 +00:00
|
|
|
return -EINVAL;
|
2018-05-10 11:56:55 +00:00
|
|
|
}
|
|
|
|
if ((local_conf.txmode.offloads & dev_info.tx_offload_capa) !=
|
|
|
|
local_conf.txmode.offloads) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Ethdev port_id=%u requested Tx offloads 0x%"PRIx64" doesn't match Tx offloads "
|
|
|
|
"capabilities 0x%"PRIx64" in %s()\n",
|
|
|
|
port_id, local_conf.txmode.offloads,
|
|
|
|
dev_info.tx_offload_capa,
|
|
|
|
__func__);
|
2018-05-31 12:44:30 +00:00
|
|
|
return -EINVAL;
|
2018-05-10 11:56:55 +00:00
|
|
|
}
|
|
|
|
|
2018-04-20 14:30:22 +00:00
|
|
|
/* Check that device supports requested rss hash functions. */
|
|
|
|
if ((dev_info.flow_type_rss_offloads |
|
|
|
|
dev_conf->rx_adv_conf.rss_conf.rss_hf) !=
|
|
|
|
dev_info.flow_type_rss_offloads) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
|
|
|
|
port_id, dev_conf->rx_adv_conf.rss_conf.rss_hf,
|
|
|
|
dev_info.flow_type_rss_offloads);
|
2018-05-31 13:22:45 +00:00
|
|
|
return -EINVAL;
|
2018-04-20 14:30:22 +00:00
|
|
|
}
|
|
|
|
|
2012-12-19 23:00:00 +00:00
|
|
|
/*
|
|
|
|
* Setup new number of RX/TX queues and reconfigure device.
|
|
|
|
*/
|
|
|
|
diag = rte_eth_dev_rx_queue_config(dev, nb_rx_q);
|
2012-09-04 12:54:00 +00:00
|
|
|
if (diag != 0) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Port%u rte_eth_dev_rx_queue_config = %d\n",
|
|
|
|
port_id, diag);
|
2012-12-19 23:00:00 +00:00
|
|
|
return diag;
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
2012-12-19 23:00:00 +00:00
|
|
|
|
|
|
|
diag = rte_eth_dev_tx_queue_config(dev, nb_tx_q);
|
|
|
|
if (diag != 0) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Port%u rte_eth_dev_tx_queue_config = %d\n",
|
|
|
|
port_id, diag);
|
2012-12-19 23:00:00 +00:00
|
|
|
rte_eth_dev_rx_queue_config(dev, 0);
|
|
|
|
return diag;
|
|
|
|
}
|
|
|
|
|
|
|
|
diag = (*dev->dev_ops->dev_configure)(dev);
|
|
|
|
if (diag != 0) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Port%u dev_configure = %d\n",
|
|
|
|
port_id, diag);
|
2012-12-19 23:00:00 +00:00
|
|
|
rte_eth_dev_rx_queue_config(dev, 0);
|
|
|
|
rte_eth_dev_tx_queue_config(dev, 0);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, diag);
|
2012-12-19 23:00:00 +00:00
|
|
|
}
|
|
|
|
|
2017-09-22 14:52:29 +00:00
|
|
|
/* Initialize Rx profiling if enabled at compilation time. */
|
2018-07-19 12:21:42 +00:00
|
|
|
diag = __rte_eth_dev_profile_init(port_id, dev);
|
2017-09-22 14:52:29 +00:00
|
|
|
if (diag != 0) {
|
2018-07-19 12:21:42 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Port%u __rte_eth_dev_profile_init = %d\n",
|
2018-06-19 01:04:56 +00:00
|
|
|
port_id, diag);
|
2017-09-22 14:52:29 +00:00
|
|
|
rte_eth_dev_rx_queue_config(dev, 0);
|
|
|
|
rte_eth_dev_tx_queue_config(dev, 0);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, diag);
|
2017-09-22 14:52:29 +00:00
|
|
|
}
|
|
|
|
|
2012-12-19 23:00:00 +00:00
|
|
|
return 0;
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
|
|
|
|
2016-11-24 11:26:47 +00:00
|
|
|
void
|
|
|
|
_rte_eth_dev_reset(struct rte_eth_dev *dev)
|
|
|
|
{
|
|
|
|
if (dev->data->dev_started) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Port %u must be stopped to allow reset\n",
|
2016-11-24 11:26:47 +00:00
|
|
|
dev->data->port_id);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
rte_eth_dev_rx_queue_config(dev, 0);
|
|
|
|
rte_eth_dev_tx_queue_config(dev, 0);
|
|
|
|
|
|
|
|
memset(&dev->data->dev_conf, 0, sizeof(dev->data->dev_conf));
|
|
|
|
}
|
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
static void
|
2018-08-24 14:25:35 +00:00
|
|
|
rte_eth_dev_mac_restore(struct rte_eth_dev *dev,
|
|
|
|
struct rte_eth_dev_info *dev_info)
|
2012-09-04 12:54:00 +00:00
|
|
|
{
|
2017-01-27 17:57:29 +00:00
|
|
|
struct ether_addr *addr;
|
2012-09-04 12:54:00 +00:00
|
|
|
uint16_t i;
|
2013-06-03 00:00:00 +00:00
|
|
|
uint32_t pool = 0;
|
2017-01-27 17:57:29 +00:00
|
|
|
uint64_t pool_mask;
|
2012-09-04 12:54:00 +00:00
|
|
|
|
2017-01-27 17:57:29 +00:00
|
|
|
/* replay MAC address configuration including default MAC */
|
|
|
|
addr = &dev->data->mac_addrs[0];
|
|
|
|
if (*dev->dev_ops->mac_addr_set != NULL)
|
|
|
|
(*dev->dev_ops->mac_addr_set)(dev, addr);
|
|
|
|
else if (*dev->dev_ops->mac_addr_add != NULL)
|
|
|
|
(*dev->dev_ops->mac_addr_add)(dev, addr, 0, pool);
|
|
|
|
|
|
|
|
if (*dev->dev_ops->mac_addr_add != NULL) {
|
2018-08-24 14:25:35 +00:00
|
|
|
for (i = 1; i < dev_info->max_mac_addrs; i++) {
|
2017-01-27 17:57:29 +00:00
|
|
|
addr = &dev->data->mac_addrs[i];
|
|
|
|
|
|
|
|
/* skip zero address */
|
|
|
|
if (is_zero_ether_addr(addr))
|
|
|
|
continue;
|
|
|
|
|
|
|
|
pool = 0;
|
|
|
|
pool_mask = dev->data->mac_pool_sel[i];
|
|
|
|
|
|
|
|
do {
|
|
|
|
if (pool_mask & 1ULL)
|
|
|
|
(*dev->dev_ops->mac_addr_add)(dev,
|
|
|
|
addr, i, pool);
|
|
|
|
pool_mask >>= 1;
|
|
|
|
pool++;
|
|
|
|
} while (pool_mask);
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
|
|
|
}
|
2018-08-24 14:25:35 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
static void
|
|
|
|
rte_eth_dev_config_restore(struct rte_eth_dev *dev,
|
|
|
|
struct rte_eth_dev_info *dev_info, uint16_t port_id)
|
|
|
|
{
|
|
|
|
if (!(*dev_info->dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR))
|
|
|
|
rte_eth_dev_mac_restore(dev, dev_info);
|
2012-09-04 12:54:00 +00:00
|
|
|
|
|
|
|
/* replay promiscuous configuration */
|
|
|
|
if (rte_eth_promiscuous_get(port_id) == 1)
|
|
|
|
rte_eth_promiscuous_enable(port_id);
|
|
|
|
else if (rte_eth_promiscuous_get(port_id) == 0)
|
|
|
|
rte_eth_promiscuous_disable(port_id);
|
|
|
|
|
2015-06-27 00:01:43 +00:00
|
|
|
/* replay all multicast configuration */
|
2012-09-04 12:54:00 +00:00
|
|
|
if (rte_eth_allmulticast_get(port_id) == 1)
|
|
|
|
rte_eth_allmulticast_enable(port_id);
|
|
|
|
else if (rte_eth_allmulticast_get(port_id) == 0)
|
|
|
|
rte_eth_allmulticast_disable(port_id);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_start(uint16_t port_id)
|
2012-09-04 12:54:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
2018-08-24 14:25:35 +00:00
|
|
|
struct rte_eth_dev_info dev_info;
|
2012-09-04 12:54:00 +00:00
|
|
|
int diag;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
|
2015-02-25 19:32:18 +00:00
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_start, -ENOTSUP);
|
2014-06-09 17:26:16 +00:00
|
|
|
|
|
|
|
if (dev->data->dev_started != 0) {
|
2018-08-02 18:39:41 +00:00
|
|
|
RTE_ETHDEV_LOG(INFO,
|
2018-06-19 01:04:56 +00:00
|
|
|
"Device with port_id=%"PRIu16" already started\n",
|
2014-06-09 17:26:16 +00:00
|
|
|
port_id);
|
2015-04-09 21:29:42 +00:00
|
|
|
return 0;
|
2014-06-09 17:26:16 +00:00
|
|
|
}
|
|
|
|
|
2018-08-24 14:25:35 +00:00
|
|
|
rte_eth_dev_info_get(port_id, &dev_info);
|
|
|
|
|
|
|
|
/* Lets restore MAC now if device does not support live change */
|
|
|
|
if (*dev_info.dev_flags & RTE_ETH_DEV_NOLIVE_MAC_ADDR)
|
|
|
|
rte_eth_dev_mac_restore(dev, &dev_info);
|
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
diag = (*dev->dev_ops->dev_start)(dev);
|
|
|
|
if (diag == 0)
|
|
|
|
dev->data->dev_started = 1;
|
|
|
|
else
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, diag);
|
2012-09-04 12:54:00 +00:00
|
|
|
|
2018-08-24 14:25:35 +00:00
|
|
|
rte_eth_dev_config_restore(dev, &dev_info, port_id);
|
2012-09-04 12:54:00 +00:00
|
|
|
|
2015-10-27 21:38:55 +00:00
|
|
|
if (dev->data->dev_conf.intr_conf.lsc == 0) {
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->link_update, -ENOTSUP);
|
2014-11-07 17:31:50 +00:00
|
|
|
(*dev->dev_ops->link_update)(dev, 0);
|
|
|
|
}
|
2012-09-04 12:54:00 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_stop(uint16_t port_id)
|
2012-09-04 12:54:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_RET(port_id);
|
2012-09-04 12:54:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_stop);
|
2014-06-09 17:26:16 +00:00
|
|
|
|
|
|
|
if (dev->data->dev_started == 0) {
|
2018-08-02 18:39:41 +00:00
|
|
|
RTE_ETHDEV_LOG(INFO,
|
2018-06-19 01:04:56 +00:00
|
|
|
"Device with port_id=%"PRIu16" already stopped\n",
|
2014-06-09 17:26:16 +00:00
|
|
|
port_id);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
dev->data->dev_started = 0;
|
|
|
|
(*dev->dev_ops->dev_stop)(dev);
|
|
|
|
}
|
|
|
|
|
2014-05-28 07:15:00 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_set_link_up(uint16_t port_id)
|
2014-05-28 07:15:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
|
2015-02-25 19:32:18 +00:00
|
|
|
|
2014-05-28 07:15:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_up, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->dev_set_link_up)(dev));
|
2014-05-28 07:15:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_set_link_down(uint16_t port_id)
|
2014-05-28 07:15:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
|
2015-02-25 19:32:18 +00:00
|
|
|
|
2014-05-28 07:15:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_set_link_down, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->dev_set_link_down)(dev));
|
2014-05-28 07:15:00 +00:00
|
|
|
}
|
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
void
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_close(uint16_t port_id)
|
2012-09-04 12:54:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_RET(port_id);
|
2012-09-04 12:54:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
2012-12-19 23:00:00 +00:00
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_close);
|
2012-09-04 12:54:00 +00:00
|
|
|
dev->data->dev_started = 0;
|
|
|
|
(*dev->dev_ops->dev_close)(dev);
|
2015-07-13 13:04:05 +00:00
|
|
|
|
2017-02-20 14:04:46 +00:00
|
|
|
dev->data->nb_rx_queues = 0;
|
2015-07-13 13:04:05 +00:00
|
|
|
rte_free(dev->data->rx_queues);
|
|
|
|
dev->data->rx_queues = NULL;
|
2017-02-20 14:04:46 +00:00
|
|
|
dev->data->nb_tx_queues = 0;
|
2015-07-13 13:04:05 +00:00
|
|
|
rte_free(dev->data->tx_queues);
|
|
|
|
dev->data->tx_queues = NULL;
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
|
|
|
|
2017-07-23 09:15:09 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_reset(uint16_t port_id)
|
2017-07-23 09:15:09 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
|
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_reset, -ENOTSUP);
|
|
|
|
|
|
|
|
rte_eth_dev_stop(port_id);
|
|
|
|
ret = dev->dev_ops->dev_reset(dev);
|
|
|
|
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, ret);
|
2017-07-23 09:15:09 +00:00
|
|
|
}
|
|
|
|
|
2018-01-22 01:48:06 +00:00
|
|
|
int __rte_experimental
|
2018-01-20 21:12:19 +00:00
|
|
|
rte_eth_dev_is_removed(uint16_t port_id)
|
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, 0);
|
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
|
|
|
if (dev->state == RTE_ETH_DEV_REMOVED)
|
|
|
|
return 1;
|
|
|
|
|
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->is_removed, 0);
|
|
|
|
|
|
|
|
ret = dev->dev_ops->is_removed(dev);
|
|
|
|
if (ret != 0)
|
|
|
|
/* Device is physically removed. */
|
|
|
|
dev->state = RTE_ETH_DEV_REMOVED;
|
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_rx_queue_setup(uint16_t port_id, uint16_t rx_queue_id,
|
2012-09-04 12:54:00 +00:00
|
|
|
uint16_t nb_rx_desc, unsigned int socket_id,
|
|
|
|
const struct rte_eth_rxconf *rx_conf,
|
|
|
|
struct rte_mempool *mp)
|
|
|
|
{
|
2014-06-17 18:09:28 +00:00
|
|
|
int ret;
|
|
|
|
uint32_t mbp_buf_size;
|
2012-09-04 12:54:00 +00:00
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
struct rte_eth_dev_info dev_info;
|
2017-10-04 08:17:58 +00:00
|
|
|
struct rte_eth_rxconf local_conf;
|
2016-11-24 11:26:45 +00:00
|
|
|
void **rxq;
|
2012-09-04 12:54:00 +00:00
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
|
2015-02-25 19:32:18 +00:00
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
if (rx_queue_id >= dev->data->nb_rx_queues) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", rx_queue_id);
|
2015-04-09 21:29:42 +00:00
|
|
|
return -EINVAL;
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
|
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_setup, -ENOTSUP);
|
2012-09-04 12:54:00 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Check the size of the mbuf data buffer.
|
|
|
|
* This value must be provided in the private data of the memory pool.
|
|
|
|
* First check that the memory pool has a valid private data.
|
|
|
|
*/
|
2014-10-20 17:26:35 +00:00
|
|
|
rte_eth_dev_info_get(port_id, &dev_info);
|
2012-09-04 12:54:00 +00:00
|
|
|
if (mp->private_data_size < sizeof(struct rte_pktmbuf_pool_private)) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "%s private_data_size %d < %d\n",
|
|
|
|
mp->name, (int)mp->private_data_size,
|
|
|
|
(int)sizeof(struct rte_pktmbuf_pool_private));
|
2015-04-09 21:29:42 +00:00
|
|
|
return -ENOSPC;
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
2015-04-22 09:57:20 +00:00
|
|
|
mbp_buf_size = rte_pktmbuf_data_room_size(mp);
|
2014-06-17 18:09:28 +00:00
|
|
|
|
|
|
|
if ((mbp_buf_size - RTE_PKTMBUF_HEADROOM) < dev_info.min_rx_bufsize) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"%s mbuf_data_room_size %d < %d (RTE_PKTMBUF_HEADROOM=%d + min_rx_bufsize(dev)=%d)\n",
|
|
|
|
mp->name, (int)mbp_buf_size,
|
|
|
|
(int)(RTE_PKTMBUF_HEADROOM + dev_info.min_rx_bufsize),
|
|
|
|
(int)RTE_PKTMBUF_HEADROOM,
|
|
|
|
(int)dev_info.min_rx_bufsize);
|
2015-04-09 21:29:42 +00:00
|
|
|
return -EINVAL;
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
|
|
|
|
2018-04-10 09:43:16 +00:00
|
|
|
/* Use default specified by driver, if nb_rx_desc is zero */
|
|
|
|
if (nb_rx_desc == 0) {
|
|
|
|
nb_rx_desc = dev_info.default_rxportconf.ring_size;
|
|
|
|
/* If driver default is also zero, fall back on EAL default */
|
|
|
|
if (nb_rx_desc == 0)
|
|
|
|
nb_rx_desc = RTE_ETH_DEV_FALLBACK_RX_RINGSIZE;
|
|
|
|
}
|
|
|
|
|
2015-10-27 12:51:43 +00:00
|
|
|
if (nb_rx_desc > dev_info.rx_desc_lim.nb_max ||
|
|
|
|
nb_rx_desc < dev_info.rx_desc_lim.nb_min ||
|
|
|
|
nb_rx_desc % dev_info.rx_desc_lim.nb_align != 0) {
|
|
|
|
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Invalid value for nb_rx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
|
|
|
|
nb_rx_desc, dev_info.rx_desc_lim.nb_max,
|
2015-10-27 12:51:43 +00:00
|
|
|
dev_info.rx_desc_lim.nb_min,
|
|
|
|
dev_info.rx_desc_lim.nb_align);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2018-04-24 12:44:06 +00:00
|
|
|
if (dev->data->dev_started &&
|
|
|
|
!(dev_info.dev_capa &
|
|
|
|
RTE_ETH_DEV_CAPA_RUNTIME_RX_QUEUE_SETUP))
|
|
|
|
return -EBUSY;
|
|
|
|
|
2018-05-11 08:22:28 +00:00
|
|
|
if (dev->data->dev_started &&
|
|
|
|
(dev->data->rx_queue_state[rx_queue_id] !=
|
|
|
|
RTE_ETH_QUEUE_STATE_STOPPED))
|
2018-04-24 12:44:06 +00:00
|
|
|
return -EBUSY;
|
|
|
|
|
2016-11-24 11:26:45 +00:00
|
|
|
rxq = dev->data->rx_queues;
|
|
|
|
if (rxq[rx_queue_id]) {
|
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_release,
|
|
|
|
-ENOTSUP);
|
|
|
|
(*dev->dev_ops->rx_queue_release)(rxq[rx_queue_id]);
|
|
|
|
rxq[rx_queue_id] = NULL;
|
|
|
|
}
|
|
|
|
|
2014-10-01 09:49:04 +00:00
|
|
|
if (rx_conf == NULL)
|
|
|
|
rx_conf = &dev_info.default_rxconf;
|
|
|
|
|
2017-10-04 08:17:58 +00:00
|
|
|
local_conf = *rx_conf;
|
|
|
|
|
2018-05-10 11:56:55 +00:00
|
|
|
/*
|
|
|
|
* If an offloading has already been enabled in
|
|
|
|
* rte_eth_dev_configure(), it has been enabled on all queues,
|
|
|
|
* so there is no need to enable it in this queue again.
|
|
|
|
* The local_conf.offloads input to underlying PMD only carries
|
|
|
|
* those offloadings which are only enabled on this queue and
|
|
|
|
* not enabled on all queues.
|
|
|
|
*/
|
|
|
|
local_conf.offloads &= ~dev->data->dev_conf.rxmode.offloads;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* New added offloadings for this queue are those not enabled in
|
|
|
|
* rte_eth_dev_configure() and they must be per-queue type.
|
|
|
|
* A pure per-port offloading can't be enabled on a queue while
|
|
|
|
* disabled on another queue. A pure per-port offloading can't
|
|
|
|
* be enabled for any queue as new added one if it hasn't been
|
|
|
|
* enabled in rte_eth_dev_configure().
|
|
|
|
*/
|
|
|
|
if ((local_conf.offloads & dev_info.rx_queue_offload_capa) !=
|
|
|
|
local_conf.offloads) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Ethdev port_id=%d rx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
|
|
|
|
"within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
|
|
|
|
port_id, rx_queue_id, local_conf.offloads,
|
|
|
|
dev_info.rx_queue_offload_capa,
|
|
|
|
__func__);
|
2018-05-31 12:44:30 +00:00
|
|
|
return -EINVAL;
|
2018-05-10 11:56:55 +00:00
|
|
|
}
|
|
|
|
|
2014-06-17 18:09:28 +00:00
|
|
|
ret = (*dev->dev_ops->rx_queue_setup)(dev, rx_queue_id, nb_rx_desc,
|
2017-10-04 08:17:58 +00:00
|
|
|
socket_id, &local_conf, mp);
|
2014-06-17 18:09:28 +00:00
|
|
|
if (!ret) {
|
|
|
|
if (!dev->data->min_rx_buf_size ||
|
|
|
|
dev->data->min_rx_buf_size > mbp_buf_size)
|
|
|
|
dev->data->min_rx_buf_size = mbp_buf_size;
|
|
|
|
}
|
|
|
|
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, ret);
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_tx_queue_setup(uint16_t port_id, uint16_t tx_queue_id,
|
2012-09-04 12:54:00 +00:00
|
|
|
uint16_t nb_tx_desc, unsigned int socket_id,
|
|
|
|
const struct rte_eth_txconf *tx_conf)
|
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
2014-10-01 09:49:04 +00:00
|
|
|
struct rte_eth_dev_info dev_info;
|
2017-10-04 08:17:59 +00:00
|
|
|
struct rte_eth_txconf local_conf;
|
2016-11-24 11:26:45 +00:00
|
|
|
void **txq;
|
2012-09-04 12:54:00 +00:00
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
|
2015-02-25 19:32:18 +00:00
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
if (tx_queue_id >= dev->data->nb_tx_queues) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", tx_queue_id);
|
2015-04-09 21:29:42 +00:00
|
|
|
return -EINVAL;
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
|
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_setup, -ENOTSUP);
|
2014-10-01 09:49:04 +00:00
|
|
|
|
2014-10-20 17:26:35 +00:00
|
|
|
rte_eth_dev_info_get(port_id, &dev_info);
|
2014-10-01 09:49:04 +00:00
|
|
|
|
2018-04-10 09:43:16 +00:00
|
|
|
/* Use default specified by driver, if nb_tx_desc is zero */
|
|
|
|
if (nb_tx_desc == 0) {
|
|
|
|
nb_tx_desc = dev_info.default_txportconf.ring_size;
|
|
|
|
/* If driver default is zero, fall back on EAL default */
|
|
|
|
if (nb_tx_desc == 0)
|
|
|
|
nb_tx_desc = RTE_ETH_DEV_FALLBACK_TX_RINGSIZE;
|
|
|
|
}
|
2015-11-20 10:26:37 +00:00
|
|
|
if (nb_tx_desc > dev_info.tx_desc_lim.nb_max ||
|
|
|
|
nb_tx_desc < dev_info.tx_desc_lim.nb_min ||
|
|
|
|
nb_tx_desc % dev_info.tx_desc_lim.nb_align != 0) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Invalid value for nb_tx_desc(=%hu), should be: <= %hu, = %hu, and a product of %hu\n",
|
|
|
|
nb_tx_desc, dev_info.tx_desc_lim.nb_max,
|
|
|
|
dev_info.tx_desc_lim.nb_min,
|
|
|
|
dev_info.tx_desc_lim.nb_align);
|
2015-11-20 10:26:37 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2018-04-24 12:44:06 +00:00
|
|
|
if (dev->data->dev_started &&
|
|
|
|
!(dev_info.dev_capa &
|
|
|
|
RTE_ETH_DEV_CAPA_RUNTIME_TX_QUEUE_SETUP))
|
|
|
|
return -EBUSY;
|
|
|
|
|
2018-05-11 08:22:28 +00:00
|
|
|
if (dev->data->dev_started &&
|
|
|
|
(dev->data->tx_queue_state[tx_queue_id] !=
|
|
|
|
RTE_ETH_QUEUE_STATE_STOPPED))
|
2018-04-24 12:44:06 +00:00
|
|
|
return -EBUSY;
|
|
|
|
|
2016-11-24 11:26:45 +00:00
|
|
|
txq = dev->data->tx_queues;
|
|
|
|
if (txq[tx_queue_id]) {
|
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_queue_release,
|
|
|
|
-ENOTSUP);
|
|
|
|
(*dev->dev_ops->tx_queue_release)(txq[tx_queue_id]);
|
|
|
|
txq[tx_queue_id] = NULL;
|
|
|
|
}
|
|
|
|
|
2014-10-01 09:49:04 +00:00
|
|
|
if (tx_conf == NULL)
|
|
|
|
tx_conf = &dev_info.default_txconf;
|
|
|
|
|
2017-10-04 08:17:59 +00:00
|
|
|
local_conf = *tx_conf;
|
|
|
|
|
2018-05-10 11:56:55 +00:00
|
|
|
/*
|
|
|
|
* If an offloading has already been enabled in
|
|
|
|
* rte_eth_dev_configure(), it has been enabled on all queues,
|
|
|
|
* so there is no need to enable it in this queue again.
|
|
|
|
* The local_conf.offloads input to underlying PMD only carries
|
|
|
|
* those offloadings which are only enabled on this queue and
|
|
|
|
* not enabled on all queues.
|
|
|
|
*/
|
|
|
|
local_conf.offloads &= ~dev->data->dev_conf.txmode.offloads;
|
|
|
|
|
|
|
|
/*
|
|
|
|
* New added offloadings for this queue are those not enabled in
|
|
|
|
* rte_eth_dev_configure() and they must be per-queue type.
|
|
|
|
* A pure per-port offloading can't be enabled on a queue while
|
|
|
|
* disabled on another queue. A pure per-port offloading can't
|
|
|
|
* be enabled for any queue as new added one if it hasn't been
|
|
|
|
* enabled in rte_eth_dev_configure().
|
|
|
|
*/
|
|
|
|
if ((local_conf.offloads & dev_info.tx_queue_offload_capa) !=
|
|
|
|
local_conf.offloads) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Ethdev port_id=%d tx_queue_id=%d, new added offloads 0x%"PRIx64" must be "
|
|
|
|
"within pre-queue offload capabilities 0x%"PRIx64" in %s()\n",
|
|
|
|
port_id, tx_queue_id, local_conf.offloads,
|
|
|
|
dev_info.tx_queue_offload_capa,
|
|
|
|
__func__);
|
2018-05-31 12:44:30 +00:00
|
|
|
return -EINVAL;
|
2018-05-10 11:56:55 +00:00
|
|
|
}
|
|
|
|
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->tx_queue_setup)(dev,
|
|
|
|
tx_queue_id, nb_tx_desc, socket_id, &local_conf));
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
|
|
|
|
2016-03-10 17:19:34 +00:00
|
|
|
void
|
|
|
|
rte_eth_tx_buffer_drop_callback(struct rte_mbuf **pkts, uint16_t unsent,
|
|
|
|
void *userdata __rte_unused)
|
|
|
|
{
|
|
|
|
unsigned i;
|
|
|
|
|
|
|
|
for (i = 0; i < unsent; i++)
|
|
|
|
rte_pktmbuf_free(pkts[i]);
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
|
|
|
rte_eth_tx_buffer_count_callback(struct rte_mbuf **pkts, uint16_t unsent,
|
|
|
|
void *userdata)
|
|
|
|
{
|
|
|
|
uint64_t *count = userdata;
|
|
|
|
unsigned i;
|
|
|
|
|
|
|
|
for (i = 0; i < unsent; i++)
|
|
|
|
rte_pktmbuf_free(pkts[i]);
|
|
|
|
|
|
|
|
*count += unsent;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
rte_eth_tx_buffer_set_err_callback(struct rte_eth_dev_tx_buffer *buffer,
|
|
|
|
buffer_tx_error_fn cbfn, void *userdata)
|
|
|
|
{
|
|
|
|
buffer->error_callback = cbfn;
|
|
|
|
buffer->error_userdata = userdata;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
rte_eth_tx_buffer_init(struct rte_eth_dev_tx_buffer *buffer, uint16_t size)
|
|
|
|
{
|
2016-04-07 11:46:32 +00:00
|
|
|
int ret = 0;
|
|
|
|
|
2016-03-10 17:19:34 +00:00
|
|
|
if (buffer == NULL)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
buffer->size = size;
|
2016-04-07 11:46:32 +00:00
|
|
|
if (buffer->error_callback == NULL) {
|
|
|
|
ret = rte_eth_tx_buffer_set_err_callback(
|
|
|
|
buffer, rte_eth_tx_buffer_drop_callback, NULL);
|
|
|
|
}
|
2016-03-10 17:19:34 +00:00
|
|
|
|
2016-04-07 11:46:32 +00:00
|
|
|
return ret;
|
2016-03-10 17:19:34 +00:00
|
|
|
}
|
|
|
|
|
2017-03-24 18:55:53 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_tx_done_cleanup(uint16_t port_id, uint16_t queue_id, uint32_t free_cnt)
|
2017-03-24 18:55:53 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev = &rte_eth_devices[port_id];
|
2018-01-20 21:12:22 +00:00
|
|
|
int ret;
|
2017-03-24 18:55:53 +00:00
|
|
|
|
|
|
|
/* Validate Input Data. Bail if not valid or not supported. */
|
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->tx_done_cleanup, -ENOTSUP);
|
|
|
|
|
|
|
|
/* Call driver to free pending mbufs. */
|
2018-01-20 21:12:22 +00:00
|
|
|
ret = (*dev->dev_ops->tx_done_cleanup)(dev->data->tx_queues[queue_id],
|
|
|
|
free_cnt);
|
|
|
|
return eth_err(port_id, ret);
|
2017-03-24 18:55:53 +00:00
|
|
|
}
|
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
void
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_promiscuous_enable(uint16_t port_id)
|
2012-09-04 12:54:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_RET(port_id);
|
2012-09-04 12:54:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_enable);
|
2012-09-04 12:54:00 +00:00
|
|
|
(*dev->dev_ops->promiscuous_enable)(dev);
|
|
|
|
dev->data->promiscuous = 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_promiscuous_disable(uint16_t port_id)
|
2012-09-04 12:54:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_RET(port_id);
|
2012-09-04 12:54:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_RET(*dev->dev_ops->promiscuous_disable);
|
2012-09-04 12:54:00 +00:00
|
|
|
dev->data->promiscuous = 0;
|
|
|
|
(*dev->dev_ops->promiscuous_disable)(dev);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_promiscuous_get(uint16_t port_id)
|
2012-09-04 12:54:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
|
2012-09-04 12:54:00 +00:00
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
return dev->data->promiscuous;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_allmulticast_enable(uint16_t port_id)
|
2012-09-04 12:54:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_RET(port_id);
|
2012-09-04 12:54:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_enable);
|
2012-09-04 12:54:00 +00:00
|
|
|
(*dev->dev_ops->allmulticast_enable)(dev);
|
|
|
|
dev->data->all_multicast = 1;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_allmulticast_disable(uint16_t port_id)
|
2012-09-04 12:54:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_RET(port_id);
|
2012-09-04 12:54:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_RET(*dev->dev_ops->allmulticast_disable);
|
2012-09-04 12:54:00 +00:00
|
|
|
dev->data->all_multicast = 0;
|
|
|
|
(*dev->dev_ops->allmulticast_disable)(dev);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_allmulticast_get(uint16_t port_id)
|
2012-09-04 12:54:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
|
2012-09-04 12:54:00 +00:00
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
return dev->data->all_multicast;
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_link_get(uint16_t port_id, struct rte_eth_link *eth_link)
|
2012-09-04 12:54:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_RET(port_id);
|
2012-09-04 12:54:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
2018-04-10 06:16:31 +00:00
|
|
|
if (dev->data->dev_conf.intr_conf.lsc &&
|
|
|
|
dev->data->dev_started)
|
2018-01-26 02:01:38 +00:00
|
|
|
rte_eth_linkstatus_get(dev, eth_link);
|
2012-09-04 12:54:00 +00:00
|
|
|
else {
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
|
2012-09-04 12:54:00 +00:00
|
|
|
(*dev->dev_ops->link_update)(dev, 1);
|
|
|
|
*eth_link = dev->data->dev_link;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_link_get_nowait(uint16_t port_id, struct rte_eth_link *eth_link)
|
2012-09-04 12:54:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_RET(port_id);
|
2012-09-04 12:54:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
2018-04-10 06:16:31 +00:00
|
|
|
if (dev->data->dev_conf.intr_conf.lsc &&
|
|
|
|
dev->data->dev_started)
|
2018-01-26 02:01:38 +00:00
|
|
|
rte_eth_linkstatus_get(dev, eth_link);
|
2012-09-04 12:54:00 +00:00
|
|
|
else {
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_RET(*dev->dev_ops->link_update);
|
2012-09-04 12:54:00 +00:00
|
|
|
(*dev->dev_ops->link_update)(dev, 0);
|
|
|
|
*eth_link = dev->data->dev_link;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-11-07 17:31:51 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_stats_get(uint16_t port_id, struct rte_eth_stats *stats)
|
2012-09-04 12:54:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
|
2015-02-25 19:32:18 +00:00
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
2013-09-18 10:00:00 +00:00
|
|
|
memset(stats, 0, sizeof(*stats));
|
2012-09-04 12:54:00 +00:00
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_get, -ENOTSUP);
|
2012-09-04 12:54:00 +00:00
|
|
|
stats->rx_nombuf = dev->data->rx_mbuf_alloc_failed;
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->stats_get)(dev, stats));
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
|
|
|
|
2017-09-20 14:11:30 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_stats_reset(uint16_t port_id)
|
2012-09-04 12:54:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2017-09-20 14:11:30 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2012-09-04 12:54:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
2017-09-20 14:11:30 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->stats_reset, -ENOTSUP);
|
2012-09-04 12:54:00 +00:00
|
|
|
(*dev->dev_ops->stats_reset)(dev);
|
2015-11-27 10:31:06 +00:00
|
|
|
dev->data->rx_mbuf_alloc_failed = 0;
|
2017-09-20 14:11:30 +00:00
|
|
|
|
|
|
|
return 0;
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
|
|
|
|
2017-10-19 22:39:55 +00:00
|
|
|
static inline int
|
|
|
|
get_xstats_basic_count(struct rte_eth_dev *dev)
|
|
|
|
{
|
|
|
|
uint16_t nb_rxqs, nb_txqs;
|
|
|
|
int count;
|
|
|
|
|
|
|
|
nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
|
|
|
|
nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
|
|
|
|
|
|
|
|
count = RTE_NB_STATS;
|
|
|
|
count += nb_rxqs * RTE_NB_RXQ_STATS;
|
|
|
|
count += nb_txqs * RTE_NB_TXQ_STATS;
|
|
|
|
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
2016-06-15 15:25:27 +00:00
|
|
|
static int
|
2017-09-29 07:17:24 +00:00
|
|
|
get_xstats_count(uint16_t port_id)
|
2016-06-15 15:25:27 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
int count;
|
|
|
|
|
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
|
|
|
|
dev = &rte_eth_devices[port_id];
|
2017-04-27 14:42:36 +00:00
|
|
|
if (dev->dev_ops->xstats_get_names_by_id != NULL) {
|
|
|
|
count = (*dev->dev_ops->xstats_get_names_by_id)(dev, NULL,
|
|
|
|
NULL, 0);
|
|
|
|
if (count < 0)
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, count);
|
2017-04-27 14:42:36 +00:00
|
|
|
}
|
2016-06-15 15:25:27 +00:00
|
|
|
if (dev->dev_ops->xstats_get_names != NULL) {
|
|
|
|
count = (*dev->dev_ops->xstats_get_names)(dev, NULL, 0);
|
|
|
|
if (count < 0)
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, count);
|
2016-06-15 15:25:27 +00:00
|
|
|
} else
|
|
|
|
count = 0;
|
2017-04-27 14:42:36 +00:00
|
|
|
|
2017-10-19 22:39:55 +00:00
|
|
|
|
|
|
|
count += get_xstats_basic_count(dev);
|
|
|
|
|
2016-06-15 15:25:27 +00:00
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
2017-04-27 14:42:37 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_xstats_get_id_by_name(uint16_t port_id, const char *xstat_name,
|
2017-04-27 14:42:37 +00:00
|
|
|
uint64_t *id)
|
|
|
|
{
|
|
|
|
int cnt_xstats, idx_xstat;
|
|
|
|
|
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
|
|
|
|
|
|
|
if (!id) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Id pointer is NULL\n");
|
2017-04-27 14:42:37 +00:00
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!xstat_name) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "xstat_name pointer is NULL\n");
|
2017-04-27 14:42:37 +00:00
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get count */
|
|
|
|
cnt_xstats = rte_eth_xstats_get_names_by_id(port_id, NULL, 0, NULL);
|
|
|
|
if (cnt_xstats < 0) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Cannot get count of xstats\n");
|
2017-04-27 14:42:37 +00:00
|
|
|
return -ENODEV;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* Get id-name lookup table */
|
|
|
|
struct rte_eth_xstat_name xstats_names[cnt_xstats];
|
|
|
|
|
|
|
|
if (cnt_xstats != rte_eth_xstats_get_names_by_id(
|
|
|
|
port_id, xstats_names, cnt_xstats, NULL)) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Cannot get xstats lookup\n");
|
2017-04-27 14:42:37 +00:00
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (idx_xstat = 0; idx_xstat < cnt_xstats; idx_xstat++) {
|
|
|
|
if (!strcmp(xstats_names[idx_xstat].name, xstat_name)) {
|
|
|
|
*id = idx_xstat;
|
|
|
|
return 0;
|
|
|
|
};
|
|
|
|
}
|
|
|
|
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2017-12-06 00:25:06 +00:00
|
|
|
/* retrieve basic stats names */
|
|
|
|
static int
|
|
|
|
rte_eth_basic_stats_get_names(struct rte_eth_dev *dev,
|
|
|
|
struct rte_eth_xstat_name *xstats_names)
|
|
|
|
{
|
|
|
|
int cnt_used_entries = 0;
|
|
|
|
uint32_t idx, id_queue;
|
|
|
|
uint16_t num_q;
|
|
|
|
|
|
|
|
for (idx = 0; idx < RTE_NB_STATS; idx++) {
|
|
|
|
snprintf(xstats_names[cnt_used_entries].name,
|
|
|
|
sizeof(xstats_names[0].name),
|
|
|
|
"%s", rte_stats_strings[idx].name);
|
|
|
|
cnt_used_entries++;
|
|
|
|
}
|
|
|
|
num_q = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
|
|
|
|
for (id_queue = 0; id_queue < num_q; id_queue++) {
|
|
|
|
for (idx = 0; idx < RTE_NB_RXQ_STATS; idx++) {
|
|
|
|
snprintf(xstats_names[cnt_used_entries].name,
|
|
|
|
sizeof(xstats_names[0].name),
|
|
|
|
"rx_q%u%s",
|
|
|
|
id_queue, rte_rxq_stats_strings[idx].name);
|
|
|
|
cnt_used_entries++;
|
|
|
|
}
|
|
|
|
|
|
|
|
}
|
|
|
|
num_q = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
|
|
|
|
for (id_queue = 0; id_queue < num_q; id_queue++) {
|
|
|
|
for (idx = 0; idx < RTE_NB_TXQ_STATS; idx++) {
|
|
|
|
snprintf(xstats_names[cnt_used_entries].name,
|
|
|
|
sizeof(xstats_names[0].name),
|
|
|
|
"tx_q%u%s",
|
|
|
|
id_queue, rte_txq_stats_strings[idx].name);
|
|
|
|
cnt_used_entries++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return cnt_used_entries;
|
|
|
|
}
|
|
|
|
|
2017-10-12 13:31:28 +00:00
|
|
|
/* retrieve ethdev extended statistics names */
|
2017-04-27 14:42:36 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_xstats_get_names_by_id(uint16_t port_id,
|
2017-04-27 14:42:36 +00:00
|
|
|
struct rte_eth_xstat_name *xstats_names, unsigned int size,
|
|
|
|
uint64_t *ids)
|
|
|
|
{
|
2017-10-12 13:31:28 +00:00
|
|
|
struct rte_eth_xstat_name *xstats_names_copy;
|
2017-10-18 22:51:43 +00:00
|
|
|
unsigned int no_basic_stat_requested = 1;
|
2017-12-06 00:25:07 +00:00
|
|
|
unsigned int no_ext_stat_requested = 1;
|
2017-10-12 13:31:28 +00:00
|
|
|
unsigned int expected_entries;
|
2017-12-06 00:25:07 +00:00
|
|
|
unsigned int basic_count;
|
2017-10-12 13:31:28 +00:00
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
unsigned int i;
|
2017-10-19 23:39:52 +00:00
|
|
|
int ret;
|
2017-10-12 13:31:28 +00:00
|
|
|
|
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
2017-12-06 00:25:07 +00:00
|
|
|
basic_count = get_xstats_basic_count(dev);
|
2017-10-19 23:39:52 +00:00
|
|
|
ret = get_xstats_count(port_id);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
expected_entries = (unsigned int)ret;
|
|
|
|
|
2017-10-12 13:31:28 +00:00
|
|
|
/* Return max number of stats if no ids given */
|
2017-04-27 14:42:36 +00:00
|
|
|
if (!ids) {
|
2017-10-12 13:31:28 +00:00
|
|
|
if (!xstats_names)
|
|
|
|
return expected_entries;
|
|
|
|
else if (xstats_names && size < expected_entries)
|
|
|
|
return expected_entries;
|
|
|
|
}
|
2017-04-27 14:42:36 +00:00
|
|
|
|
2017-10-12 13:31:28 +00:00
|
|
|
if (ids && !xstats_names)
|
|
|
|
return -EINVAL;
|
2017-04-27 14:42:36 +00:00
|
|
|
|
2017-10-18 22:51:43 +00:00
|
|
|
if (ids && dev->dev_ops->xstats_get_names_by_id != NULL && size > 0) {
|
|
|
|
uint64_t ids_copy[size];
|
|
|
|
|
|
|
|
for (i = 0; i < size; i++) {
|
|
|
|
if (ids[i] < basic_count) {
|
|
|
|
no_basic_stat_requested = 0;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Convert ids to xstats ids that PMD knows.
|
|
|
|
* ids known by user are basic + extended stats.
|
|
|
|
*/
|
|
|
|
ids_copy[i] = ids[i] - basic_count;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (no_basic_stat_requested)
|
|
|
|
return (*dev->dev_ops->xstats_get_names_by_id)(dev,
|
|
|
|
xstats_names, ids_copy, size);
|
|
|
|
}
|
2017-04-27 14:42:36 +00:00
|
|
|
|
2017-10-12 13:31:28 +00:00
|
|
|
/* Retrieve all stats */
|
|
|
|
if (!ids) {
|
|
|
|
int num_stats = rte_eth_xstats_get_names(port_id, xstats_names,
|
|
|
|
expected_entries);
|
|
|
|
if (num_stats < 0 || num_stats > (int)expected_entries)
|
|
|
|
return num_stats;
|
|
|
|
else
|
|
|
|
return expected_entries;
|
2017-04-27 14:42:36 +00:00
|
|
|
}
|
|
|
|
|
2017-10-12 13:31:28 +00:00
|
|
|
xstats_names_copy = calloc(expected_entries,
|
|
|
|
sizeof(struct rte_eth_xstat_name));
|
2017-04-27 14:42:36 +00:00
|
|
|
|
2017-10-12 13:31:28 +00:00
|
|
|
if (!xstats_names_copy) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Can't allocate memory\n");
|
2017-10-12 13:31:28 +00:00
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
2017-12-06 00:25:07 +00:00
|
|
|
if (ids) {
|
|
|
|
for (i = 0; i < size; i++) {
|
2018-02-06 16:06:59 +00:00
|
|
|
if (ids[i] >= basic_count) {
|
2017-12-06 00:25:07 +00:00
|
|
|
no_ext_stat_requested = 0;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-10-12 13:31:28 +00:00
|
|
|
/* Fill xstats_names_copy structure */
|
2017-12-06 00:25:07 +00:00
|
|
|
if (ids && no_ext_stat_requested) {
|
|
|
|
rte_eth_basic_stats_get_names(dev, xstats_names_copy);
|
|
|
|
} else {
|
2018-01-20 21:12:22 +00:00
|
|
|
ret = rte_eth_xstats_get_names(port_id, xstats_names_copy,
|
2017-12-06 00:25:07 +00:00
|
|
|
expected_entries);
|
2018-01-20 21:12:22 +00:00
|
|
|
if (ret < 0) {
|
|
|
|
free(xstats_names_copy);
|
|
|
|
return ret;
|
|
|
|
}
|
2017-12-06 00:25:07 +00:00
|
|
|
}
|
2017-10-12 13:31:28 +00:00
|
|
|
|
|
|
|
/* Filter stats */
|
|
|
|
for (i = 0; i < size; i++) {
|
|
|
|
if (ids[i] >= expected_entries) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
|
2017-04-27 14:42:36 +00:00
|
|
|
free(xstats_names_copy);
|
|
|
|
return -1;
|
|
|
|
}
|
2017-10-12 13:31:28 +00:00
|
|
|
xstats_names[i] = xstats_names_copy[ids[i]];
|
2017-04-27 14:42:36 +00:00
|
|
|
}
|
2017-10-12 13:31:28 +00:00
|
|
|
|
|
|
|
free(xstats_names_copy);
|
|
|
|
return size;
|
2017-04-27 14:42:36 +00:00
|
|
|
}
|
|
|
|
|
2017-04-13 14:59:25 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_xstats_get_names(uint16_t port_id,
|
2016-06-15 15:25:27 +00:00
|
|
|
struct rte_eth_xstat_name *xstats_names,
|
2017-04-13 14:59:24 +00:00
|
|
|
unsigned int size)
|
2016-06-15 15:25:27 +00:00
|
|
|
{
|
2017-04-27 14:42:35 +00:00
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
int cnt_used_entries;
|
|
|
|
int cnt_expected_entries;
|
|
|
|
int cnt_driver_entries;
|
|
|
|
|
|
|
|
cnt_expected_entries = get_xstats_count(port_id);
|
|
|
|
if (xstats_names == NULL || cnt_expected_entries < 0 ||
|
|
|
|
(int)size < cnt_expected_entries)
|
|
|
|
return cnt_expected_entries;
|
|
|
|
|
|
|
|
/* port_id checked in get_xstats_count() */
|
|
|
|
dev = &rte_eth_devices[port_id];
|
2016-06-15 15:25:27 +00:00
|
|
|
|
2017-12-06 00:25:06 +00:00
|
|
|
cnt_used_entries = rte_eth_basic_stats_get_names(
|
|
|
|
dev, xstats_names);
|
2016-07-08 15:44:24 +00:00
|
|
|
|
2017-04-27 14:42:35 +00:00
|
|
|
if (dev->dev_ops->xstats_get_names != NULL) {
|
|
|
|
/* If there are any driver-specific xstats, append them
|
|
|
|
* to end of list.
|
|
|
|
*/
|
|
|
|
cnt_driver_entries = (*dev->dev_ops->xstats_get_names)(
|
|
|
|
dev,
|
|
|
|
xstats_names + cnt_used_entries,
|
|
|
|
size - cnt_used_entries);
|
|
|
|
if (cnt_driver_entries < 0)
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, cnt_driver_entries);
|
2017-04-27 14:42:35 +00:00
|
|
|
cnt_used_entries += cnt_driver_entries;
|
|
|
|
}
|
|
|
|
|
|
|
|
return cnt_used_entries;
|
2016-06-15 15:25:27 +00:00
|
|
|
}
|
|
|
|
|
2017-12-06 00:25:06 +00:00
|
|
|
|
|
|
|
static int
|
|
|
|
rte_eth_basic_stats_get(uint16_t port_id, struct rte_eth_xstat *xstats)
|
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
struct rte_eth_stats eth_stats;
|
|
|
|
unsigned int count = 0, i, q;
|
|
|
|
uint64_t val, *stats_ptr;
|
|
|
|
uint16_t nb_rxqs, nb_txqs;
|
2018-01-20 21:12:22 +00:00
|
|
|
int ret;
|
|
|
|
|
|
|
|
ret = rte_eth_stats_get(port_id, ð_stats);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
2017-12-06 00:25:06 +00:00
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
|
|
|
nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
|
|
|
|
nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
|
|
|
|
|
|
|
|
/* global stats */
|
|
|
|
for (i = 0; i < RTE_NB_STATS; i++) {
|
|
|
|
stats_ptr = RTE_PTR_ADD(ð_stats,
|
|
|
|
rte_stats_strings[i].offset);
|
|
|
|
val = *stats_ptr;
|
|
|
|
xstats[count++].value = val;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* per-rxq stats */
|
|
|
|
for (q = 0; q < nb_rxqs; q++) {
|
|
|
|
for (i = 0; i < RTE_NB_RXQ_STATS; i++) {
|
|
|
|
stats_ptr = RTE_PTR_ADD(ð_stats,
|
|
|
|
rte_rxq_stats_strings[i].offset +
|
|
|
|
q * sizeof(uint64_t));
|
|
|
|
val = *stats_ptr;
|
|
|
|
xstats[count++].value = val;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
/* per-txq stats */
|
|
|
|
for (q = 0; q < nb_txqs; q++) {
|
|
|
|
for (i = 0; i < RTE_NB_TXQ_STATS; i++) {
|
|
|
|
stats_ptr = RTE_PTR_ADD(ð_stats,
|
|
|
|
rte_txq_stats_strings[i].offset +
|
|
|
|
q * sizeof(uint64_t));
|
|
|
|
val = *stats_ptr;
|
|
|
|
xstats[count++].value = val;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
return count;
|
|
|
|
}
|
|
|
|
|
2014-07-23 12:28:53 +00:00
|
|
|
/* retrieve ethdev extended statistics */
|
2017-04-27 14:42:36 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_xstats_get_by_id(uint16_t port_id, const uint64_t *ids,
|
2017-10-12 13:31:28 +00:00
|
|
|
uint64_t *values, unsigned int size)
|
2017-04-27 14:42:36 +00:00
|
|
|
{
|
2017-10-18 22:51:43 +00:00
|
|
|
unsigned int no_basic_stat_requested = 1;
|
2017-12-06 00:25:07 +00:00
|
|
|
unsigned int no_ext_stat_requested = 1;
|
2017-10-12 13:31:28 +00:00
|
|
|
unsigned int num_xstats_filled;
|
2017-12-06 00:25:07 +00:00
|
|
|
unsigned int basic_count;
|
2017-10-12 13:31:28 +00:00
|
|
|
uint16_t expected_entries;
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
unsigned int i;
|
2017-10-19 23:39:52 +00:00
|
|
|
int ret;
|
2017-04-27 14:42:36 +00:00
|
|
|
|
2017-10-12 13:31:28 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2018-01-20 21:12:22 +00:00
|
|
|
ret = get_xstats_count(port_id);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
expected_entries = (uint16_t)ret;
|
2017-10-12 13:31:28 +00:00
|
|
|
struct rte_eth_xstat xstats[expected_entries];
|
|
|
|
dev = &rte_eth_devices[port_id];
|
2017-12-06 00:25:07 +00:00
|
|
|
basic_count = get_xstats_basic_count(dev);
|
2017-04-27 14:42:36 +00:00
|
|
|
|
2017-10-12 13:31:28 +00:00
|
|
|
/* Return max number of stats if no ids given */
|
|
|
|
if (!ids) {
|
|
|
|
if (!values)
|
|
|
|
return expected_entries;
|
|
|
|
else if (values && size < expected_entries)
|
|
|
|
return expected_entries;
|
|
|
|
}
|
2017-04-27 14:42:36 +00:00
|
|
|
|
2017-10-12 13:31:28 +00:00
|
|
|
if (ids && !values)
|
|
|
|
return -EINVAL;
|
2017-04-27 14:42:36 +00:00
|
|
|
|
2017-10-18 22:51:43 +00:00
|
|
|
if (ids && dev->dev_ops->xstats_get_by_id != NULL && size) {
|
|
|
|
unsigned int basic_count = get_xstats_basic_count(dev);
|
|
|
|
uint64_t ids_copy[size];
|
|
|
|
|
|
|
|
for (i = 0; i < size; i++) {
|
|
|
|
if (ids[i] < basic_count) {
|
|
|
|
no_basic_stat_requested = 0;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Convert ids to xstats ids that PMD knows.
|
|
|
|
* ids known by user are basic + extended stats.
|
|
|
|
*/
|
|
|
|
ids_copy[i] = ids[i] - basic_count;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (no_basic_stat_requested)
|
|
|
|
return (*dev->dev_ops->xstats_get_by_id)(dev, ids_copy,
|
|
|
|
values, size);
|
|
|
|
}
|
2017-04-27 14:42:36 +00:00
|
|
|
|
2017-12-06 00:25:07 +00:00
|
|
|
if (ids) {
|
|
|
|
for (i = 0; i < size; i++) {
|
2018-02-06 16:06:59 +00:00
|
|
|
if (ids[i] >= basic_count) {
|
2017-12-06 00:25:07 +00:00
|
|
|
no_ext_stat_requested = 0;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-10-12 13:31:28 +00:00
|
|
|
/* Fill the xstats structure */
|
2017-12-06 00:25:07 +00:00
|
|
|
if (ids && no_ext_stat_requested)
|
|
|
|
ret = rte_eth_basic_stats_get(port_id, xstats);
|
|
|
|
else
|
|
|
|
ret = rte_eth_xstats_get(port_id, xstats, expected_entries);
|
|
|
|
|
2017-10-19 23:39:52 +00:00
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
num_xstats_filled = (unsigned int)ret;
|
2017-04-27 14:42:36 +00:00
|
|
|
|
2017-10-12 13:31:28 +00:00
|
|
|
/* Return all stats */
|
|
|
|
if (!ids) {
|
|
|
|
for (i = 0; i < num_xstats_filled; i++)
|
|
|
|
values[i] = xstats[i].value;
|
|
|
|
return expected_entries;
|
|
|
|
}
|
2017-04-27 14:42:36 +00:00
|
|
|
|
2017-10-12 13:31:28 +00:00
|
|
|
/* Filter stats */
|
|
|
|
for (i = 0; i < size; i++) {
|
|
|
|
if (ids[i] >= expected_entries) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Id value isn't valid\n");
|
2017-04-27 14:42:36 +00:00
|
|
|
return -1;
|
|
|
|
}
|
2017-10-12 13:31:28 +00:00
|
|
|
values[i] = xstats[ids[i]].value;
|
2017-04-27 14:42:36 +00:00
|
|
|
}
|
2017-10-12 13:31:28 +00:00
|
|
|
return size;
|
2017-04-27 14:42:36 +00:00
|
|
|
}
|
|
|
|
|
2014-07-23 12:28:53 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_xstats_get(uint16_t port_id, struct rte_eth_xstat *xstats,
|
2017-04-13 14:59:24 +00:00
|
|
|
unsigned int n)
|
2014-07-23 12:28:53 +00:00
|
|
|
{
|
2017-04-27 14:42:35 +00:00
|
|
|
struct rte_eth_dev *dev;
|
2017-12-06 00:25:06 +00:00
|
|
|
unsigned int count = 0, i;
|
2017-04-27 14:42:35 +00:00
|
|
|
signed int xcount = 0;
|
|
|
|
uint16_t nb_rxqs, nb_txqs;
|
2018-01-20 21:12:22 +00:00
|
|
|
int ret;
|
2014-07-23 12:28:53 +00:00
|
|
|
|
2017-04-27 14:42:35 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
|
2015-02-25 19:32:18 +00:00
|
|
|
|
2017-04-27 14:42:35 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
2014-07-23 12:28:53 +00:00
|
|
|
|
2017-04-27 14:42:35 +00:00
|
|
|
nb_rxqs = RTE_MIN(dev->data->nb_rx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
|
|
|
|
nb_txqs = RTE_MIN(dev->data->nb_tx_queues, RTE_ETHDEV_QUEUE_STAT_CNTRS);
|
2016-11-21 09:59:38 +00:00
|
|
|
|
2017-04-27 14:42:35 +00:00
|
|
|
/* Return generic statistics */
|
|
|
|
count = RTE_NB_STATS + (nb_rxqs * RTE_NB_RXQ_STATS) +
|
|
|
|
(nb_txqs * RTE_NB_TXQ_STATS);
|
2014-07-23 12:28:53 +00:00
|
|
|
|
2017-04-27 14:42:35 +00:00
|
|
|
/* implemented by the driver */
|
|
|
|
if (dev->dev_ops->xstats_get != NULL) {
|
|
|
|
/* Retrieve the xstats from the driver at the end of the
|
|
|
|
* xstats struct.
|
|
|
|
*/
|
|
|
|
xcount = (*dev->dev_ops->xstats_get)(dev,
|
|
|
|
xstats ? xstats + count : NULL,
|
|
|
|
(n > count) ? n - count : 0);
|
2015-07-15 13:11:28 +00:00
|
|
|
|
2017-04-27 14:42:35 +00:00
|
|
|
if (xcount < 0)
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, xcount);
|
2015-07-15 13:11:28 +00:00
|
|
|
}
|
|
|
|
|
2017-04-27 14:42:35 +00:00
|
|
|
if (n < count + xcount || xstats == NULL)
|
|
|
|
return count + xcount;
|
2014-07-23 12:28:53 +00:00
|
|
|
|
2017-04-27 14:42:35 +00:00
|
|
|
/* now fill the xstats structure */
|
2018-01-20 21:12:22 +00:00
|
|
|
ret = rte_eth_basic_stats_get(port_id, xstats);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
count = ret;
|
2014-07-23 12:28:53 +00:00
|
|
|
|
2017-04-27 14:42:35 +00:00
|
|
|
for (i = 0; i < count; i++)
|
2016-07-08 15:44:24 +00:00
|
|
|
xstats[i].id = i;
|
2017-04-27 14:42:35 +00:00
|
|
|
/* add an offset to driver-specific stats */
|
|
|
|
for ( ; i < count + xcount; i++)
|
|
|
|
xstats[i].id += count;
|
2016-07-08 15:44:24 +00:00
|
|
|
|
2017-04-27 14:42:35 +00:00
|
|
|
return count + xcount;
|
2014-07-23 12:28:53 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* reset ethdev extended statistics */
|
|
|
|
void
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_xstats_reset(uint16_t port_id)
|
2014-07-23 12:28:53 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_RET(port_id);
|
2014-07-23 12:28:53 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
|
|
|
/* implemented by the driver */
|
|
|
|
if (dev->dev_ops->xstats_reset != NULL) {
|
|
|
|
(*dev->dev_ops->xstats_reset)(dev);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
/* fallback to default */
|
|
|
|
rte_eth_stats_reset(port_id);
|
|
|
|
}
|
2012-12-19 23:00:00 +00:00
|
|
|
|
|
|
|
static int
|
2017-09-29 07:17:24 +00:00
|
|
|
set_queue_stats_mapping(uint16_t port_id, uint16_t queue_id, uint8_t stat_idx,
|
2012-12-19 23:00:00 +00:00
|
|
|
uint8_t is_rx)
|
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2015-02-25 19:32:18 +00:00
|
|
|
|
2012-12-19 23:00:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->queue_stats_mapping_set, -ENOTSUP);
|
2018-07-11 08:41:59 +00:00
|
|
|
|
|
|
|
if (is_rx && (queue_id >= dev->data->nb_rx_queues))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (!is_rx && (queue_id >= dev->data->nb_tx_queues))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (stat_idx >= RTE_ETHDEV_QUEUE_STAT_CNTRS)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2012-12-19 23:00:00 +00:00
|
|
|
return (*dev->dev_ops->queue_stats_mapping_set)
|
|
|
|
(dev, queue_id, stat_idx, is_rx);
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_set_tx_queue_stats_mapping(uint16_t port_id, uint16_t tx_queue_id,
|
2012-12-19 23:00:00 +00:00
|
|
|
uint8_t stat_idx)
|
|
|
|
{
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, set_queue_stats_mapping(port_id, tx_queue_id,
|
|
|
|
stat_idx, STAT_QMAP_TX));
|
2012-12-19 23:00:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_set_rx_queue_stats_mapping(uint16_t port_id, uint16_t rx_queue_id,
|
2012-12-19 23:00:00 +00:00
|
|
|
uint8_t stat_idx)
|
|
|
|
{
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, set_queue_stats_mapping(port_id, rx_queue_id,
|
|
|
|
stat_idx, STAT_QMAP_RX));
|
2012-12-19 23:00:00 +00:00
|
|
|
}
|
|
|
|
|
2017-01-16 10:48:27 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_fw_version_get(uint16_t port_id, char *fw_version, size_t fw_size)
|
2017-01-16 10:48:27 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->fw_version_get, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->fw_version_get)(dev,
|
|
|
|
fw_version, fw_size));
|
2017-01-16 10:48:27 +00:00
|
|
|
}
|
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
void
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_info_get(uint16_t port_id, struct rte_eth_dev_info *dev_info)
|
2012-09-04 12:54:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
2015-10-27 12:51:43 +00:00
|
|
|
const struct rte_eth_desc_lim lim = {
|
|
|
|
.nb_max = UINT16_MAX,
|
|
|
|
.nb_min = 0,
|
|
|
|
.nb_align = 1,
|
|
|
|
};
|
2012-09-04 12:54:00 +00:00
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_RET(port_id);
|
2012-09-04 12:54:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
2014-10-01 09:49:03 +00:00
|
|
|
memset(dev_info, 0, sizeof(struct rte_eth_dev_info));
|
2015-10-27 12:51:43 +00:00
|
|
|
dev_info->rx_desc_lim = lim;
|
|
|
|
dev_info->tx_desc_lim = lim;
|
2018-04-09 12:09:38 +00:00
|
|
|
dev_info->device = dev->device;
|
2014-10-01 09:49:03 +00:00
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_RET(*dev->dev_ops->dev_infos_get);
|
2012-09-04 12:54:00 +00:00
|
|
|
(*dev->dev_ops->dev_infos_get)(dev, dev_info);
|
2017-06-12 15:25:12 +00:00
|
|
|
dev_info->driver_name = dev->device->driver->name;
|
2016-06-15 14:06:20 +00:00
|
|
|
dev_info->nb_rx_queues = dev->data->nb_rx_queues;
|
|
|
|
dev_info->nb_tx_queues = dev->data->nb_tx_queues;
|
2018-04-26 10:41:00 +00:00
|
|
|
|
|
|
|
dev_info->dev_flags = &dev->data->dev_flags;
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
|
|
|
|
2016-03-14 20:50:50 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_get_supported_ptypes(uint16_t port_id, uint32_t ptype_mask,
|
2016-03-14 20:50:50 +00:00
|
|
|
uint32_t *ptypes, int num)
|
|
|
|
{
|
|
|
|
int i, j;
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
const uint32_t *all_ptypes;
|
|
|
|
|
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
|
|
|
dev = &rte_eth_devices[port_id];
|
2016-04-06 03:51:13 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_supported_ptypes_get, 0);
|
2016-03-14 20:50:50 +00:00
|
|
|
all_ptypes = (*dev->dev_ops->dev_supported_ptypes_get)(dev);
|
|
|
|
|
|
|
|
if (!all_ptypes)
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
for (i = 0, j = 0; all_ptypes[i] != RTE_PTYPE_UNKNOWN; ++i)
|
|
|
|
if (all_ptypes[i] & ptype_mask) {
|
|
|
|
if (j < num)
|
|
|
|
ptypes[j] = all_ptypes[i];
|
|
|
|
j++;
|
|
|
|
}
|
|
|
|
|
|
|
|
return j;
|
|
|
|
}
|
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
void
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_macaddr_get(uint16_t port_id, struct ether_addr *mac_addr)
|
2012-09-04 12:54:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_RET(port_id);
|
2012-09-04 12:54:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
ether_addr_copy(&dev->data->mac_addrs[0], mac_addr);
|
|
|
|
}
|
|
|
|
|
2014-06-17 18:09:30 +00:00
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_get_mtu(uint16_t port_id, uint16_t *mtu)
|
2014-06-17 18:09:30 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2014-06-17 18:09:30 +00:00
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
*mtu = dev->data->mtu;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_set_mtu(uint16_t port_id, uint16_t mtu)
|
2014-06-17 18:09:30 +00:00
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2014-06-17 18:09:30 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mtu_set, -ENOTSUP);
|
2014-06-17 18:09:30 +00:00
|
|
|
|
|
|
|
ret = (*dev->dev_ops->mtu_set)(dev, mtu);
|
|
|
|
if (!ret)
|
|
|
|
dev->data->mtu = mtu;
|
|
|
|
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, ret);
|
2014-06-17 18:09:30 +00:00
|
|
|
}
|
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_vlan_filter(uint16_t port_id, uint16_t vlan_id, int on)
|
2012-09-04 12:54:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
2017-07-09 01:44:45 +00:00
|
|
|
int ret;
|
2012-09-04 12:54:00 +00:00
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2012-09-04 12:54:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
2017-10-04 08:17:58 +00:00
|
|
|
if (!(dev->data->dev_conf.rxmode.offloads &
|
|
|
|
DEV_RX_OFFLOAD_VLAN_FILTER)) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Port %u: vlan-filtering disabled\n",
|
|
|
|
port_id);
|
2015-04-09 21:29:42 +00:00
|
|
|
return -ENOSYS;
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
2012-12-19 23:00:00 +00:00
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
if (vlan_id > 4095) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Port_id=%u invalid vlan_id=%u > 4095\n",
|
|
|
|
port_id, vlan_id);
|
2015-04-09 21:29:42 +00:00
|
|
|
return -EINVAL;
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_filter_set, -ENOTSUP);
|
2015-02-20 10:26:12 +00:00
|
|
|
|
2017-07-09 01:44:45 +00:00
|
|
|
ret = (*dev->dev_ops->vlan_filter_set)(dev, vlan_id, on);
|
|
|
|
if (ret == 0) {
|
|
|
|
struct rte_vlan_filter_conf *vfc;
|
|
|
|
int vidx;
|
|
|
|
int vbit;
|
|
|
|
|
|
|
|
vfc = &dev->data->vlan_filter_conf;
|
|
|
|
vidx = vlan_id / 64;
|
|
|
|
vbit = vlan_id % 64;
|
|
|
|
|
|
|
|
if (on)
|
|
|
|
vfc->ids[vidx] |= UINT64_C(1) << vbit;
|
|
|
|
else
|
|
|
|
vfc->ids[vidx] &= ~(UINT64_C(1) << vbit);
|
|
|
|
}
|
|
|
|
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, ret);
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
|
|
|
|
2012-12-19 23:00:00 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_set_vlan_strip_on_queue(uint16_t port_id, uint16_t rx_queue_id,
|
|
|
|
int on)
|
2012-12-19 23:00:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2012-12-19 23:00:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
if (rx_queue_id >= dev->data->nb_rx_queues) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Invalid rx_queue_id=%u\n", rx_queue_id);
|
2015-04-09 21:29:42 +00:00
|
|
|
return -EINVAL;
|
2012-12-19 23:00:00 +00:00
|
|
|
}
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_strip_queue_set, -ENOTSUP);
|
2012-12-19 23:00:00 +00:00
|
|
|
(*dev->dev_ops->vlan_strip_queue_set)(dev, rx_queue_id, on);
|
|
|
|
|
2015-04-09 21:29:42 +00:00
|
|
|
return 0;
|
2012-12-19 23:00:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_set_vlan_ether_type(uint16_t port_id,
|
2016-03-11 16:50:57 +00:00
|
|
|
enum rte_vlan_type vlan_type,
|
|
|
|
uint16_t tpid)
|
2012-12-19 23:00:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2012-12-19 23:00:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_tpid_set, -ENOTSUP);
|
2012-12-19 23:00:00 +00:00
|
|
|
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->vlan_tpid_set)(dev, vlan_type,
|
|
|
|
tpid));
|
2012-12-19 23:00:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_set_vlan_offload(uint16_t port_id, int offload_mask)
|
2012-12-19 23:00:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
int ret = 0;
|
|
|
|
int mask = 0;
|
|
|
|
int cur, org = 0;
|
2017-09-01 02:36:28 +00:00
|
|
|
uint64_t orig_offloads;
|
2014-06-03 23:42:50 +00:00
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2012-12-19 23:00:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
2017-09-01 02:36:28 +00:00
|
|
|
/* save original values in case of failure */
|
|
|
|
orig_offloads = dev->data->dev_conf.rxmode.offloads;
|
|
|
|
|
2012-12-19 23:00:00 +00:00
|
|
|
/*check which option changed by application*/
|
|
|
|
cur = !!(offload_mask & ETH_VLAN_STRIP_OFFLOAD);
|
2017-10-04 08:17:58 +00:00
|
|
|
org = !!(dev->data->dev_conf.rxmode.offloads &
|
|
|
|
DEV_RX_OFFLOAD_VLAN_STRIP);
|
2015-06-27 00:01:44 +00:00
|
|
|
if (cur != org) {
|
2017-10-04 08:17:58 +00:00
|
|
|
if (cur)
|
|
|
|
dev->data->dev_conf.rxmode.offloads |=
|
|
|
|
DEV_RX_OFFLOAD_VLAN_STRIP;
|
|
|
|
else
|
|
|
|
dev->data->dev_conf.rxmode.offloads &=
|
|
|
|
~DEV_RX_OFFLOAD_VLAN_STRIP;
|
2012-12-19 23:00:00 +00:00
|
|
|
mask |= ETH_VLAN_STRIP_MASK;
|
|
|
|
}
|
2014-06-03 23:42:50 +00:00
|
|
|
|
2012-12-19 23:00:00 +00:00
|
|
|
cur = !!(offload_mask & ETH_VLAN_FILTER_OFFLOAD);
|
2017-10-04 08:17:58 +00:00
|
|
|
org = !!(dev->data->dev_conf.rxmode.offloads &
|
|
|
|
DEV_RX_OFFLOAD_VLAN_FILTER);
|
2015-06-27 00:01:44 +00:00
|
|
|
if (cur != org) {
|
2017-10-04 08:17:58 +00:00
|
|
|
if (cur)
|
|
|
|
dev->data->dev_conf.rxmode.offloads |=
|
|
|
|
DEV_RX_OFFLOAD_VLAN_FILTER;
|
|
|
|
else
|
|
|
|
dev->data->dev_conf.rxmode.offloads &=
|
|
|
|
~DEV_RX_OFFLOAD_VLAN_FILTER;
|
2012-12-19 23:00:00 +00:00
|
|
|
mask |= ETH_VLAN_FILTER_MASK;
|
|
|
|
}
|
|
|
|
|
|
|
|
cur = !!(offload_mask & ETH_VLAN_EXTEND_OFFLOAD);
|
2017-10-04 08:17:58 +00:00
|
|
|
org = !!(dev->data->dev_conf.rxmode.offloads &
|
|
|
|
DEV_RX_OFFLOAD_VLAN_EXTEND);
|
2015-06-27 00:01:44 +00:00
|
|
|
if (cur != org) {
|
2017-10-04 08:17:58 +00:00
|
|
|
if (cur)
|
|
|
|
dev->data->dev_conf.rxmode.offloads |=
|
|
|
|
DEV_RX_OFFLOAD_VLAN_EXTEND;
|
|
|
|
else
|
|
|
|
dev->data->dev_conf.rxmode.offloads &=
|
|
|
|
~DEV_RX_OFFLOAD_VLAN_EXTEND;
|
2012-12-19 23:00:00 +00:00
|
|
|
mask |= ETH_VLAN_EXTEND_MASK;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*no change*/
|
2015-06-27 00:01:44 +00:00
|
|
|
if (mask == 0)
|
2012-12-19 23:00:00 +00:00
|
|
|
return ret;
|
2014-06-03 23:42:50 +00:00
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_offload_set, -ENOTSUP);
|
2017-09-01 02:36:28 +00:00
|
|
|
ret = (*dev->dev_ops->vlan_offload_set)(dev, mask);
|
|
|
|
if (ret) {
|
|
|
|
/* hit an error restore original values */
|
|
|
|
dev->data->dev_conf.rxmode.offloads = orig_offloads;
|
|
|
|
}
|
2012-12-19 23:00:00 +00:00
|
|
|
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, ret);
|
2012-12-19 23:00:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_get_vlan_offload(uint16_t port_id)
|
2012-12-19 23:00:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
int ret = 0;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2012-12-19 23:00:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
2017-10-04 08:17:58 +00:00
|
|
|
if (dev->data->dev_conf.rxmode.offloads &
|
|
|
|
DEV_RX_OFFLOAD_VLAN_STRIP)
|
2015-06-27 00:01:44 +00:00
|
|
|
ret |= ETH_VLAN_STRIP_OFFLOAD;
|
2012-12-19 23:00:00 +00:00
|
|
|
|
2017-10-04 08:17:58 +00:00
|
|
|
if (dev->data->dev_conf.rxmode.offloads &
|
|
|
|
DEV_RX_OFFLOAD_VLAN_FILTER)
|
2015-06-27 00:01:44 +00:00
|
|
|
ret |= ETH_VLAN_FILTER_OFFLOAD;
|
2012-12-19 23:00:00 +00:00
|
|
|
|
2017-10-04 08:17:58 +00:00
|
|
|
if (dev->data->dev_conf.rxmode.offloads &
|
|
|
|
DEV_RX_OFFLOAD_VLAN_EXTEND)
|
2015-06-27 00:01:44 +00:00
|
|
|
ret |= ETH_VLAN_EXTEND_OFFLOAD;
|
2012-12-19 23:00:00 +00:00
|
|
|
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
2014-06-05 05:08:50 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_set_vlan_pvid(uint16_t port_id, uint16_t pvid, int on)
|
2014-06-05 05:08:50 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2014-06-05 05:08:50 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->vlan_pvid_set, -ENOTSUP);
|
2014-06-05 05:08:50 +00:00
|
|
|
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->vlan_pvid_set)(dev, pvid, on));
|
2014-06-05 05:08:50 +00:00
|
|
|
}
|
2012-12-19 23:00:00 +00:00
|
|
|
|
2014-06-17 18:09:26 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_flow_ctrl_get(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
|
2014-06-17 18:09:26 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2014-06-17 18:09:26 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_get, -ENOTSUP);
|
2014-06-17 18:09:26 +00:00
|
|
|
memset(fc_conf, 0, sizeof(*fc_conf));
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->flow_ctrl_get)(dev, fc_conf));
|
2014-06-17 18:09:26 +00:00
|
|
|
}
|
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_flow_ctrl_set(uint16_t port_id, struct rte_eth_fc_conf *fc_conf)
|
2012-09-04 12:54:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2012-09-04 12:54:00 +00:00
|
|
|
if ((fc_conf->send_xon != 0) && (fc_conf->send_xon != 1)) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Invalid send_xon, only 0/1 allowed\n");
|
2015-04-09 21:29:42 +00:00
|
|
|
return -EINVAL;
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->flow_ctrl_set, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->flow_ctrl_set)(dev, fc_conf));
|
2012-12-19 23:00:00 +00:00
|
|
|
}
|
2012-09-04 12:54:00 +00:00
|
|
|
|
2012-12-19 23:00:00 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_priority_flow_ctrl_set(uint16_t port_id,
|
|
|
|
struct rte_eth_pfc_conf *pfc_conf)
|
2012-12-19 23:00:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2012-12-19 23:00:00 +00:00
|
|
|
if (pfc_conf->priority > (ETH_DCB_NUM_USER_PRIORITIES - 1)) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Invalid priority, only 0-7 allowed\n");
|
2015-04-09 21:29:42 +00:00
|
|
|
return -EINVAL;
|
2012-12-19 23:00:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
/* High water, low water validation are device specific */
|
|
|
|
if (*dev->dev_ops->priority_flow_ctrl_set)
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->priority_flow_ctrl_set)
|
|
|
|
(dev, pfc_conf));
|
2015-04-09 21:29:42 +00:00
|
|
|
return -ENOTSUP;
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
|
|
|
|
2015-04-09 21:29:39 +00:00
|
|
|
static int
|
2014-11-15 16:03:43 +00:00
|
|
|
rte_eth_check_reta_mask(struct rte_eth_rss_reta_entry64 *reta_conf,
|
|
|
|
uint16_t reta_size)
|
2013-06-03 00:00:00 +00:00
|
|
|
{
|
2014-11-15 16:03:43 +00:00
|
|
|
uint16_t i, num;
|
2013-06-03 00:00:00 +00:00
|
|
|
|
2014-11-15 16:03:43 +00:00
|
|
|
if (!reta_conf)
|
|
|
|
return -EINVAL;
|
|
|
|
|
2017-03-20 23:04:33 +00:00
|
|
|
num = (reta_size + RTE_RETA_GROUP_SIZE - 1) / RTE_RETA_GROUP_SIZE;
|
2014-11-15 16:03:43 +00:00
|
|
|
for (i = 0; i < num; i++) {
|
|
|
|
if (reta_conf[i].mask)
|
|
|
|
return 0;
|
2013-06-03 00:00:00 +00:00
|
|
|
}
|
|
|
|
|
2014-11-15 16:03:43 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
2013-06-03 00:00:00 +00:00
|
|
|
|
2015-04-09 21:29:39 +00:00
|
|
|
static int
|
2014-11-15 16:03:43 +00:00
|
|
|
rte_eth_check_reta_entry(struct rte_eth_rss_reta_entry64 *reta_conf,
|
|
|
|
uint16_t reta_size,
|
2016-01-12 10:49:08 +00:00
|
|
|
uint16_t max_rxq)
|
2014-11-15 16:03:43 +00:00
|
|
|
{
|
|
|
|
uint16_t i, idx, shift;
|
|
|
|
|
|
|
|
if (!reta_conf)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (max_rxq == 0) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "No receive queue is available\n");
|
2014-11-15 16:03:43 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (i = 0; i < reta_size; i++) {
|
|
|
|
idx = i / RTE_RETA_GROUP_SIZE;
|
|
|
|
shift = i % RTE_RETA_GROUP_SIZE;
|
|
|
|
if ((reta_conf[idx].mask & (1ULL << shift)) &&
|
|
|
|
(reta_conf[idx].reta[shift] >= max_rxq)) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"reta_conf[%u]->reta[%u]: %u exceeds the maximum rxq index: %u\n",
|
|
|
|
idx, shift,
|
2014-11-15 16:03:43 +00:00
|
|
|
reta_conf[idx].reta[shift], max_rxq);
|
|
|
|
return -EINVAL;
|
2013-06-03 00:00:00 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2014-11-15 16:03:43 +00:00
|
|
|
return 0;
|
|
|
|
}
|
2013-06-03 00:00:00 +00:00
|
|
|
|
2014-11-15 16:03:43 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_rss_reta_update(uint16_t port_id,
|
2014-11-15 16:03:43 +00:00
|
|
|
struct rte_eth_rss_reta_entry64 *reta_conf,
|
|
|
|
uint16_t reta_size)
|
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
int ret;
|
2013-06-03 00:00:00 +00:00
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2014-11-15 16:03:43 +00:00
|
|
|
/* Check mask bits */
|
|
|
|
ret = rte_eth_check_reta_mask(reta_conf, reta_size);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
|
|
|
/* Check entry value */
|
|
|
|
ret = rte_eth_check_reta_entry(reta_conf, reta_size,
|
|
|
|
dev->data->nb_rx_queues);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_update, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->reta_update)(dev, reta_conf,
|
|
|
|
reta_size));
|
2013-06-03 00:00:00 +00:00
|
|
|
}
|
|
|
|
|
2014-06-03 23:42:50 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_rss_reta_query(uint16_t port_id,
|
2014-11-15 16:03:43 +00:00
|
|
|
struct rte_eth_rss_reta_entry64 *reta_conf,
|
|
|
|
uint16_t reta_size)
|
2013-06-03 00:00:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
2014-11-15 16:03:43 +00:00
|
|
|
int ret;
|
2014-06-03 23:42:50 +00:00
|
|
|
|
2016-05-18 19:15:11 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2013-06-03 00:00:00 +00:00
|
|
|
|
2014-11-15 16:03:43 +00:00
|
|
|
/* Check mask bits */
|
|
|
|
ret = rte_eth_check_reta_mask(reta_conf, reta_size);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
2013-06-03 00:00:00 +00:00
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->reta_query, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->reta_query)(dev, reta_conf,
|
|
|
|
reta_size));
|
2013-06-03 00:00:00 +00:00
|
|
|
}
|
|
|
|
|
2014-05-16 08:58:40 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_rss_hash_update(uint16_t port_id,
|
|
|
|
struct rte_eth_rss_conf *rss_conf)
|
2014-05-16 08:58:40 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
2018-04-20 14:30:22 +00:00
|
|
|
struct rte_eth_dev_info dev_info = { .flow_type_rss_offloads = 0, };
|
2014-05-16 08:58:40 +00:00
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2014-05-16 08:58:40 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
2018-04-20 14:30:22 +00:00
|
|
|
rte_eth_dev_info_get(port_id, &dev_info);
|
|
|
|
if ((dev_info.flow_type_rss_offloads | rss_conf->rss_hf) !=
|
|
|
|
dev_info.flow_type_rss_offloads) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Ethdev port_id=%u invalid rss_hf: 0x%"PRIx64", valid value: 0x%"PRIx64"\n",
|
|
|
|
port_id, rss_conf->rss_hf,
|
|
|
|
dev_info.flow_type_rss_offloads);
|
2018-05-31 13:22:45 +00:00
|
|
|
return -EINVAL;
|
2018-04-20 14:30:22 +00:00
|
|
|
}
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_update, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->rss_hash_update)(dev,
|
|
|
|
rss_conf));
|
2014-05-16 08:58:40 +00:00
|
|
|
}
|
|
|
|
|
2014-05-16 08:58:42 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_rss_hash_conf_get(uint16_t port_id,
|
2014-05-16 08:58:42 +00:00
|
|
|
struct rte_eth_rss_conf *rss_conf)
|
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2014-05-16 08:58:42 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rss_hash_conf_get, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->rss_hash_conf_get)(dev,
|
|
|
|
rss_conf));
|
2014-05-16 08:58:42 +00:00
|
|
|
}
|
|
|
|
|
2014-10-23 13:18:53 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_udp_tunnel_port_add(uint16_t port_id,
|
2016-03-10 02:42:10 +00:00
|
|
|
struct rte_eth_udp_tunnel *udp_tunnel)
|
2014-10-23 13:18:53 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2014-10-23 13:18:53 +00:00
|
|
|
if (udp_tunnel == NULL) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
|
2014-10-23 13:18:53 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
|
2014-10-23 13:18:53 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
2016-03-10 02:42:10 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_add, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_add)(dev,
|
|
|
|
udp_tunnel));
|
2014-10-23 13:18:53 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_udp_tunnel_port_delete(uint16_t port_id,
|
2016-03-10 02:42:10 +00:00
|
|
|
struct rte_eth_udp_tunnel *udp_tunnel)
|
2014-10-23 13:18:53 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2014-10-23 13:18:53 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
|
|
|
if (udp_tunnel == NULL) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Invalid udp_tunnel parameter\n");
|
2014-10-23 13:18:53 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (udp_tunnel->prot_type >= RTE_TUNNEL_TYPE_MAX) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
|
2014-10-23 13:18:53 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2016-03-10 02:42:10 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->udp_tunnel_port_del, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->udp_tunnel_port_del)(dev,
|
|
|
|
udp_tunnel));
|
2014-10-23 13:18:53 +00:00
|
|
|
}
|
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_led_on(uint16_t port_id)
|
2012-09-04 12:54:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2012-09-04 12:54:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_on, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->dev_led_on)(dev));
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_led_off(uint16_t port_id)
|
2012-09-04 12:54:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2012-09-04 12:54:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_led_off, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->dev_led_off)(dev));
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
|
|
|
|
* an empty spot.
|
|
|
|
*/
|
2015-04-09 21:29:39 +00:00
|
|
|
static int
|
2017-09-29 07:17:24 +00:00
|
|
|
get_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
|
2012-09-04 12:54:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev_info dev_info;
|
|
|
|
struct rte_eth_dev *dev = &rte_eth_devices[port_id];
|
|
|
|
unsigned i;
|
|
|
|
|
2017-07-06 21:45:32 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2012-09-04 12:54:00 +00:00
|
|
|
rte_eth_dev_info_get(port_id, &dev_info);
|
|
|
|
|
|
|
|
for (i = 0; i < dev_info.max_mac_addrs; i++)
|
|
|
|
if (memcmp(addr, &dev->data->mac_addrs[i], ETHER_ADDR_LEN) == 0)
|
|
|
|
return i;
|
|
|
|
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
2015-04-09 21:29:41 +00:00
|
|
|
static const struct ether_addr null_mac_addr;
|
2012-09-04 12:54:00 +00:00
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_mac_addr_add(uint16_t port_id, struct ether_addr *addr,
|
2013-09-18 10:00:00 +00:00
|
|
|
uint32_t pool)
|
2012-09-04 12:54:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
int index;
|
2013-09-18 10:00:00 +00:00
|
|
|
uint64_t pool_mask;
|
2017-05-05 00:40:00 +00:00
|
|
|
int ret;
|
2012-09-04 12:54:00 +00:00
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2012-09-04 12:54:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_add, -ENOTSUP);
|
2012-12-19 23:00:00 +00:00
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
if (is_zero_ether_addr(addr)) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
|
2013-09-18 10:00:00 +00:00
|
|
|
port_id);
|
2015-04-09 21:29:42 +00:00
|
|
|
return -EINVAL;
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
2013-09-18 10:00:00 +00:00
|
|
|
if (pool >= ETH_64_POOLS) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Pool id must be 0-%d\n", ETH_64_POOLS - 1);
|
2015-04-09 21:29:42 +00:00
|
|
|
return -EINVAL;
|
2013-09-18 10:00:00 +00:00
|
|
|
}
|
2014-06-03 23:42:50 +00:00
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
index = get_mac_addr_index(port_id, addr);
|
|
|
|
if (index < 0) {
|
2013-09-18 10:00:00 +00:00
|
|
|
index = get_mac_addr_index(port_id, &null_mac_addr);
|
|
|
|
if (index < 0) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
|
2013-09-18 10:00:00 +00:00
|
|
|
port_id);
|
2015-04-09 21:29:42 +00:00
|
|
|
return -ENOSPC;
|
2013-09-18 10:00:00 +00:00
|
|
|
}
|
|
|
|
} else {
|
|
|
|
pool_mask = dev->data->mac_pool_sel[index];
|
2014-06-03 23:42:50 +00:00
|
|
|
|
2015-06-27 00:01:43 +00:00
|
|
|
/* Check if both MAC address and pool is already there, and do nothing */
|
2013-09-18 10:00:00 +00:00
|
|
|
if (pool_mask & (1ULL << pool))
|
|
|
|
return 0;
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
/* Update NIC */
|
2017-05-05 00:40:00 +00:00
|
|
|
ret = (*dev->dev_ops->mac_addr_add)(dev, addr, index, pool);
|
2012-09-04 12:54:00 +00:00
|
|
|
|
2017-05-05 00:40:00 +00:00
|
|
|
if (ret == 0) {
|
|
|
|
/* Update address in NIC data structure */
|
|
|
|
ether_addr_copy(addr, &dev->data->mac_addrs[index]);
|
2014-06-03 23:42:50 +00:00
|
|
|
|
2017-05-05 00:40:00 +00:00
|
|
|
/* Update pool bitmap in NIC data structure */
|
|
|
|
dev->data->mac_pool_sel[index] |= (1ULL << pool);
|
|
|
|
}
|
2012-09-04 12:54:00 +00:00
|
|
|
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, ret);
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_mac_addr_remove(uint16_t port_id, struct ether_addr *addr)
|
2012-09-04 12:54:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
int index;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2012-09-04 12:54:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_remove, -ENOTSUP);
|
2012-12-19 23:00:00 +00:00
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
index = get_mac_addr_index(port_id, addr);
|
|
|
|
if (index == 0) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Port %u: Cannot remove default MAC address\n",
|
|
|
|
port_id);
|
2015-04-09 21:29:42 +00:00
|
|
|
return -EADDRINUSE;
|
2012-09-04 12:54:00 +00:00
|
|
|
} else if (index < 0)
|
|
|
|
return 0; /* Do nothing if address wasn't found */
|
|
|
|
|
|
|
|
/* Update NIC */
|
|
|
|
(*dev->dev_ops->mac_addr_remove)(dev, index);
|
|
|
|
|
|
|
|
/* Update address in NIC data structure */
|
|
|
|
ether_addr_copy(&null_mac_addr, &dev->data->mac_addrs[index]);
|
|
|
|
|
2014-11-04 10:01:24 +00:00
|
|
|
/* reset pool bitmap */
|
|
|
|
dev->data->mac_pool_sel[index] = 0;
|
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-07-16 13:25:33 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_default_mac_addr_set(uint16_t port_id, struct ether_addr *addr)
|
2015-07-16 13:25:33 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
2018-04-11 16:32:51 +00:00
|
|
|
int ret;
|
2015-07-16 13:25:33 +00:00
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2015-07-16 13:25:33 +00:00
|
|
|
|
|
|
|
if (!is_valid_assigned_ether_addr(addr))
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mac_addr_set, -ENOTSUP);
|
2015-07-16 13:25:33 +00:00
|
|
|
|
2018-04-11 16:32:51 +00:00
|
|
|
ret = (*dev->dev_ops->mac_addr_set)(dev, addr);
|
|
|
|
if (ret < 0)
|
|
|
|
return ret;
|
|
|
|
|
2015-07-16 13:25:33 +00:00
|
|
|
/* Update default address in NIC data structure */
|
|
|
|
ether_addr_copy(addr, &dev->data->mac_addrs[0]);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2013-09-18 10:00:00 +00:00
|
|
|
|
|
|
|
/*
|
|
|
|
* Returns index into MAC address array of addr. Use 00:00:00:00:00:00 to find
|
|
|
|
* an empty spot.
|
|
|
|
*/
|
2015-04-09 21:29:39 +00:00
|
|
|
static int
|
2017-09-29 07:17:24 +00:00
|
|
|
get_hash_mac_addr_index(uint16_t port_id, const struct ether_addr *addr)
|
2013-09-18 10:00:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev_info dev_info;
|
|
|
|
struct rte_eth_dev *dev = &rte_eth_devices[port_id];
|
|
|
|
unsigned i;
|
|
|
|
|
|
|
|
rte_eth_dev_info_get(port_id, &dev_info);
|
|
|
|
if (!dev->data->hash_mac_addrs)
|
|
|
|
return -1;
|
|
|
|
|
|
|
|
for (i = 0; i < dev_info.max_hash_mac_addrs; i++)
|
|
|
|
if (memcmp(addr, &dev->data->hash_mac_addrs[i],
|
|
|
|
ETHER_ADDR_LEN) == 0)
|
|
|
|
return i;
|
|
|
|
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_uc_hash_table_set(uint16_t port_id, struct ether_addr *addr,
|
2013-09-18 10:00:00 +00:00
|
|
|
uint8_t on)
|
|
|
|
{
|
|
|
|
int index;
|
|
|
|
int ret;
|
|
|
|
struct rte_eth_dev *dev;
|
2014-06-03 23:42:50 +00:00
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2014-06-03 23:42:50 +00:00
|
|
|
|
2013-09-18 10:00:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
if (is_zero_ether_addr(addr)) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Port %u: Cannot add NULL MAC address\n",
|
2013-09-18 10:00:00 +00:00
|
|
|
port_id);
|
2015-04-09 21:29:42 +00:00
|
|
|
return -EINVAL;
|
2013-09-18 10:00:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
index = get_hash_mac_addr_index(port_id, addr);
|
|
|
|
/* Check if it's already there, and do nothing */
|
2017-12-14 23:32:19 +00:00
|
|
|
if ((index >= 0) && on)
|
2013-09-18 10:00:00 +00:00
|
|
|
return 0;
|
2014-06-03 23:42:50 +00:00
|
|
|
|
2013-09-18 10:00:00 +00:00
|
|
|
if (index < 0) {
|
|
|
|
if (!on) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Port %u: the MAC address was not set in UTA\n",
|
|
|
|
port_id);
|
2015-04-09 21:29:42 +00:00
|
|
|
return -EINVAL;
|
2013-09-18 10:00:00 +00:00
|
|
|
}
|
2014-06-03 23:42:50 +00:00
|
|
|
|
2013-09-18 10:00:00 +00:00
|
|
|
index = get_hash_mac_addr_index(port_id, &null_mac_addr);
|
|
|
|
if (index < 0) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Port %u: MAC address array full\n",
|
|
|
|
port_id);
|
2015-04-09 21:29:42 +00:00
|
|
|
return -ENOSPC;
|
2013-09-18 10:00:00 +00:00
|
|
|
}
|
2014-06-03 23:42:50 +00:00
|
|
|
}
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_hash_table_set, -ENOTSUP);
|
2013-09-18 10:00:00 +00:00
|
|
|
ret = (*dev->dev_ops->uc_hash_table_set)(dev, addr, on);
|
|
|
|
if (ret == 0) {
|
|
|
|
/* Update address in NIC data structure */
|
|
|
|
if (on)
|
|
|
|
ether_addr_copy(addr,
|
|
|
|
&dev->data->hash_mac_addrs[index]);
|
2014-06-03 23:42:50 +00:00
|
|
|
else
|
2013-09-18 10:00:00 +00:00
|
|
|
ether_addr_copy(&null_mac_addr,
|
|
|
|
&dev->data->hash_mac_addrs[index]);
|
|
|
|
}
|
2014-06-03 23:42:50 +00:00
|
|
|
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, ret);
|
2013-09-18 10:00:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_uc_all_hash_table_set(uint16_t port_id, uint8_t on)
|
2013-09-18 10:00:00 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
2014-06-03 23:42:50 +00:00
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2014-06-03 23:42:50 +00:00
|
|
|
|
2013-09-18 10:00:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->uc_all_hash_table_set, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->uc_all_hash_table_set)(dev,
|
|
|
|
on));
|
2013-09-18 10:00:00 +00:00
|
|
|
}
|
|
|
|
|
2017-09-29 07:17:24 +00:00
|
|
|
int rte_eth_set_queue_rate_limit(uint16_t port_id, uint16_t queue_idx,
|
2014-05-26 07:45:29 +00:00
|
|
|
uint16_t tx_rate)
|
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
struct rte_eth_dev_info dev_info;
|
|
|
|
struct rte_eth_link link;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2014-05-26 07:45:29 +00:00
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
rte_eth_dev_info_get(port_id, &dev_info);
|
|
|
|
link = dev->data->dev_link;
|
|
|
|
|
|
|
|
if (queue_idx > dev_info.max_tx_queues) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Set queue rate limit:port %u: invalid queue id=%u\n",
|
|
|
|
port_id, queue_idx);
|
2014-05-26 07:45:29 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (tx_rate > link.link_speed) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Set queue rate limit:invalid tx_rate=%u, bigger than link speed= %d\n",
|
2014-07-02 13:10:30 +00:00
|
|
|
tx_rate, link.link_speed);
|
2014-05-26 07:45:29 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_queue_rate_limit, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->set_queue_rate_limit)(dev,
|
|
|
|
queue_idx, tx_rate));
|
2014-05-26 07:45:29 +00:00
|
|
|
}
|
|
|
|
|
2013-09-18 10:00:00 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_mirror_rule_set(uint16_t port_id,
|
2015-06-10 06:24:30 +00:00
|
|
|
struct rte_eth_mirror_conf *mirror_conf,
|
2013-09-18 10:00:00 +00:00
|
|
|
uint8_t rule_id, uint8_t on)
|
|
|
|
{
|
2017-01-24 20:28:35 +00:00
|
|
|
struct rte_eth_dev *dev;
|
2013-09-18 10:00:00 +00:00
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2015-06-10 06:24:31 +00:00
|
|
|
if (mirror_conf->rule_type == 0) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Mirror rule type can not be 0\n");
|
2015-04-09 21:29:42 +00:00
|
|
|
return -EINVAL;
|
2013-09-18 10:00:00 +00:00
|
|
|
}
|
2014-06-03 23:42:50 +00:00
|
|
|
|
2013-09-18 10:00:00 +00:00
|
|
|
if (mirror_conf->dst_pool >= ETH_64_POOLS) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Invalid dst pool, pool id must be 0-%d\n",
|
|
|
|
ETH_64_POOLS - 1);
|
2015-04-09 21:29:42 +00:00
|
|
|
return -EINVAL;
|
2013-09-18 10:00:00 +00:00
|
|
|
}
|
2014-06-03 23:42:50 +00:00
|
|
|
|
2015-06-10 06:24:31 +00:00
|
|
|
if ((mirror_conf->rule_type & (ETH_MIRROR_VIRTUAL_POOL_UP |
|
|
|
|
ETH_MIRROR_VIRTUAL_POOL_DOWN)) &&
|
|
|
|
(mirror_conf->pool_mask == 0)) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Invalid mirror pool, pool mask can not be 0\n");
|
2015-04-09 21:29:42 +00:00
|
|
|
return -EINVAL;
|
2013-09-18 10:00:00 +00:00
|
|
|
}
|
2014-06-03 23:42:50 +00:00
|
|
|
|
2015-06-10 06:24:31 +00:00
|
|
|
if ((mirror_conf->rule_type & ETH_MIRROR_VLAN) &&
|
|
|
|
mirror_conf->vlan.vlan_mask == 0) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"Invalid vlan mask, vlan mask can not be 0\n");
|
2015-06-10 06:24:31 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2013-09-18 10:00:00 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_set, -ENOTSUP);
|
2013-09-18 10:00:00 +00:00
|
|
|
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->mirror_rule_set)(dev,
|
|
|
|
mirror_conf, rule_id, on));
|
2013-09-18 10:00:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_mirror_rule_reset(uint16_t port_id, uint8_t rule_id)
|
2013-09-18 10:00:00 +00:00
|
|
|
{
|
2017-01-24 20:28:35 +00:00
|
|
|
struct rte_eth_dev *dev;
|
2013-09-18 10:00:00 +00:00
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2013-09-18 10:00:00 +00:00
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->mirror_rule_reset, -ENOTSUP);
|
2013-09-18 10:00:00 +00:00
|
|
|
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->mirror_rule_reset)(dev,
|
|
|
|
rule_id));
|
2013-09-18 10:00:00 +00:00
|
|
|
}
|
|
|
|
|
2018-01-04 16:01:09 +00:00
|
|
|
RTE_INIT(eth_dev_init_cb_lists)
|
|
|
|
{
|
|
|
|
int i;
|
|
|
|
|
|
|
|
for (i = 0; i < RTE_MAX_ETHPORTS; i++)
|
|
|
|
TAILQ_INIT(&rte_eth_devices[i].link_intr_cbs);
|
|
|
|
}
|
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_callback_register(uint16_t port_id,
|
2012-09-04 12:54:00 +00:00
|
|
|
enum rte_eth_event_type event,
|
|
|
|
rte_eth_dev_cb_fn cb_fn, void *cb_arg)
|
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
2013-06-03 00:00:00 +00:00
|
|
|
struct rte_eth_dev_callback *user_cb;
|
2018-01-04 16:01:09 +00:00
|
|
|
uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
|
|
|
|
uint16_t last_port;
|
2012-09-04 12:54:00 +00:00
|
|
|
|
|
|
|
if (!cb_fn)
|
2015-04-09 21:29:42 +00:00
|
|
|
return -EINVAL;
|
2015-02-25 19:32:18 +00:00
|
|
|
|
2018-01-04 16:01:09 +00:00
|
|
|
if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
|
2018-06-19 01:04:55 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
|
2018-01-04 16:01:09 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (port_id == RTE_ETH_ALL) {
|
|
|
|
next_port = 0;
|
|
|
|
last_port = RTE_MAX_ETHPORTS - 1;
|
|
|
|
} else {
|
|
|
|
next_port = last_port = port_id;
|
|
|
|
}
|
2013-06-03 00:00:00 +00:00
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
rte_spinlock_lock(&rte_eth_dev_cb_lock);
|
2013-06-03 00:00:00 +00:00
|
|
|
|
2018-01-04 16:01:09 +00:00
|
|
|
do {
|
|
|
|
dev = &rte_eth_devices[next_port];
|
|
|
|
|
|
|
|
TAILQ_FOREACH(user_cb, &(dev->link_intr_cbs), next) {
|
|
|
|
if (user_cb->cb_fn == cb_fn &&
|
|
|
|
user_cb->cb_arg == cb_arg &&
|
|
|
|
user_cb->event == event) {
|
|
|
|
break;
|
|
|
|
}
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
|
|
|
|
2018-01-04 16:01:09 +00:00
|
|
|
/* create a new callback. */
|
|
|
|
if (user_cb == NULL) {
|
|
|
|
user_cb = rte_zmalloc("INTR_USER_CALLBACK",
|
|
|
|
sizeof(struct rte_eth_dev_callback), 0);
|
|
|
|
if (user_cb != NULL) {
|
|
|
|
user_cb->cb_fn = cb_fn;
|
|
|
|
user_cb->cb_arg = cb_arg;
|
|
|
|
user_cb->event = event;
|
|
|
|
TAILQ_INSERT_TAIL(&(dev->link_intr_cbs),
|
|
|
|
user_cb, next);
|
|
|
|
} else {
|
|
|
|
rte_spinlock_unlock(&rte_eth_dev_cb_lock);
|
|
|
|
rte_eth_dev_callback_unregister(port_id, event,
|
|
|
|
cb_fn, cb_arg);
|
|
|
|
return -ENOMEM;
|
|
|
|
}
|
|
|
|
|
2016-10-20 13:34:41 +00:00
|
|
|
}
|
2018-01-04 16:01:09 +00:00
|
|
|
} while (++next_port <= last_port);
|
2012-09-04 12:54:00 +00:00
|
|
|
|
2013-06-03 00:00:00 +00:00
|
|
|
rte_spinlock_unlock(&rte_eth_dev_cb_lock);
|
2018-01-04 16:01:09 +00:00
|
|
|
return 0;
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_callback_unregister(uint16_t port_id,
|
2012-09-04 12:54:00 +00:00
|
|
|
enum rte_eth_event_type event,
|
|
|
|
rte_eth_dev_cb_fn cb_fn, void *cb_arg)
|
|
|
|
{
|
2013-06-03 00:00:00 +00:00
|
|
|
int ret;
|
2012-09-04 12:54:00 +00:00
|
|
|
struct rte_eth_dev *dev;
|
2013-06-03 00:00:00 +00:00
|
|
|
struct rte_eth_dev_callback *cb, *next;
|
2018-01-04 16:01:09 +00:00
|
|
|
uint32_t next_port; /* size is 32-bit to prevent loop wrap-around */
|
|
|
|
uint16_t last_port;
|
2012-09-04 12:54:00 +00:00
|
|
|
|
|
|
|
if (!cb_fn)
|
2015-04-09 21:29:42 +00:00
|
|
|
return -EINVAL;
|
2015-02-25 19:32:18 +00:00
|
|
|
|
2018-01-04 16:01:09 +00:00
|
|
|
if (!rte_eth_dev_is_valid_port(port_id) && port_id != RTE_ETH_ALL) {
|
2018-06-19 01:04:55 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Invalid port_id=%d\n", port_id);
|
2018-01-04 16:01:09 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (port_id == RTE_ETH_ALL) {
|
|
|
|
next_port = 0;
|
|
|
|
last_port = RTE_MAX_ETHPORTS - 1;
|
|
|
|
} else {
|
|
|
|
next_port = last_port = port_id;
|
|
|
|
}
|
2013-06-03 00:00:00 +00:00
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
rte_spinlock_lock(&rte_eth_dev_cb_lock);
|
2013-06-03 00:00:00 +00:00
|
|
|
|
2018-01-04 16:01:09 +00:00
|
|
|
do {
|
|
|
|
dev = &rte_eth_devices[next_port];
|
|
|
|
ret = 0;
|
|
|
|
for (cb = TAILQ_FIRST(&dev->link_intr_cbs); cb != NULL;
|
|
|
|
cb = next) {
|
2013-06-03 00:00:00 +00:00
|
|
|
|
2018-01-04 16:01:09 +00:00
|
|
|
next = TAILQ_NEXT(cb, next);
|
2013-06-03 00:00:00 +00:00
|
|
|
|
2018-01-04 16:01:09 +00:00
|
|
|
if (cb->cb_fn != cb_fn || cb->event != event ||
|
|
|
|
(cb->cb_arg != (void *)-1 && cb->cb_arg != cb_arg))
|
|
|
|
continue;
|
2013-06-03 00:00:00 +00:00
|
|
|
|
2018-01-04 16:01:09 +00:00
|
|
|
/*
|
|
|
|
* if this callback is not executing right now,
|
|
|
|
* then remove it.
|
|
|
|
*/
|
|
|
|
if (cb->active == 0) {
|
|
|
|
TAILQ_REMOVE(&(dev->link_intr_cbs), cb, next);
|
|
|
|
rte_free(cb);
|
|
|
|
} else {
|
|
|
|
ret = -EAGAIN;
|
|
|
|
}
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
2018-01-04 16:01:09 +00:00
|
|
|
} while (++next_port <= last_port);
|
2012-09-04 12:54:00 +00:00
|
|
|
|
|
|
|
rte_spinlock_unlock(&rte_eth_dev_cb_lock);
|
2015-04-09 21:29:42 +00:00
|
|
|
return ret;
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
|
|
|
|
2017-06-15 12:29:50 +00:00
|
|
|
int
|
2013-06-03 00:00:00 +00:00
|
|
|
_rte_eth_dev_callback_process(struct rte_eth_dev *dev,
|
2018-01-04 16:01:08 +00:00
|
|
|
enum rte_eth_event_type event, void *ret_param)
|
2012-09-04 12:54:00 +00:00
|
|
|
{
|
2013-06-03 00:00:00 +00:00
|
|
|
struct rte_eth_dev_callback *cb_lst;
|
2012-09-04 12:54:00 +00:00
|
|
|
struct rte_eth_dev_callback dev_cb;
|
2017-06-15 12:29:50 +00:00
|
|
|
int rc = 0;
|
2012-09-04 12:54:00 +00:00
|
|
|
|
|
|
|
rte_spinlock_lock(&rte_eth_dev_cb_lock);
|
2015-02-23 18:30:08 +00:00
|
|
|
TAILQ_FOREACH(cb_lst, &(dev->link_intr_cbs), next) {
|
2012-09-04 12:54:00 +00:00
|
|
|
if (cb_lst->cb_fn == NULL || cb_lst->event != event)
|
|
|
|
continue;
|
|
|
|
dev_cb = *cb_lst;
|
2013-06-03 00:00:00 +00:00
|
|
|
cb_lst->active = 1;
|
2017-06-15 12:29:50 +00:00
|
|
|
if (ret_param != NULL)
|
|
|
|
dev_cb.ret_param = ret_param;
|
2016-10-10 14:34:14 +00:00
|
|
|
|
2012-09-04 12:54:00 +00:00
|
|
|
rte_spinlock_unlock(&rte_eth_dev_cb_lock);
|
2017-06-15 12:29:50 +00:00
|
|
|
rc = dev_cb.cb_fn(dev->data->port_id, dev_cb.event,
|
|
|
|
dev_cb.cb_arg, dev_cb.ret_param);
|
2012-09-04 12:54:00 +00:00
|
|
|
rte_spinlock_lock(&rte_eth_dev_cb_lock);
|
2013-06-03 00:00:00 +00:00
|
|
|
cb_lst->active = 0;
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
|
|
|
rte_spinlock_unlock(&rte_eth_dev_cb_lock);
|
2017-06-15 12:29:50 +00:00
|
|
|
return rc;
|
2012-09-04 12:54:00 +00:00
|
|
|
}
|
2015-07-20 03:02:26 +00:00
|
|
|
|
2018-05-10 23:58:30 +00:00
|
|
|
void
|
|
|
|
rte_eth_dev_probing_finish(struct rte_eth_dev *dev)
|
|
|
|
{
|
|
|
|
if (dev == NULL)
|
|
|
|
return;
|
2018-05-10 23:58:33 +00:00
|
|
|
|
2018-05-10 23:58:34 +00:00
|
|
|
_rte_eth_dev_callback_process(dev, RTE_ETH_EVENT_NEW, NULL);
|
|
|
|
|
2018-05-10 23:58:33 +00:00
|
|
|
dev->state = RTE_ETH_DEV_ATTACHED;
|
2018-05-10 23:58:30 +00:00
|
|
|
}
|
|
|
|
|
2015-07-20 03:02:26 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_rx_intr_ctl(uint16_t port_id, int epfd, int op, void *data)
|
2015-07-20 03:02:26 +00:00
|
|
|
{
|
|
|
|
uint32_t vec;
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
struct rte_intr_handle *intr_handle;
|
|
|
|
uint16_t qid;
|
|
|
|
int rc;
|
|
|
|
|
2016-05-18 19:15:11 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2015-07-20 03:02:26 +00:00
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
2016-12-23 15:58:09 +00:00
|
|
|
|
|
|
|
if (!dev->intr_handle) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
|
2016-12-23 15:58:09 +00:00
|
|
|
return -ENOTSUP;
|
|
|
|
}
|
|
|
|
|
|
|
|
intr_handle = dev->intr_handle;
|
2015-07-20 03:02:26 +00:00
|
|
|
if (!intr_handle->intr_vec) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
|
2015-07-20 03:02:26 +00:00
|
|
|
return -EPERM;
|
|
|
|
}
|
|
|
|
|
|
|
|
for (qid = 0; qid < dev->data->nb_rx_queues; qid++) {
|
|
|
|
vec = intr_handle->intr_vec[qid];
|
|
|
|
rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
|
|
|
|
if (rc && rc != -EEXIST) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"p %u q %u rx ctl error op %d epfd %d vec %u\n",
|
|
|
|
port_id, qid, op, epfd, vec);
|
2015-07-20 03:02:26 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2018-09-29 02:12:04 +00:00
|
|
|
int __rte_experimental
|
|
|
|
rte_eth_dev_rx_intr_ctl_q_get_fd(uint16_t port_id, uint16_t queue_id)
|
|
|
|
{
|
|
|
|
struct rte_intr_handle *intr_handle;
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
unsigned int efd_idx;
|
|
|
|
uint32_t vec;
|
|
|
|
int fd;
|
|
|
|
|
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -1);
|
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
|
|
|
if (queue_id >= dev->data->nb_rx_queues) {
|
|
|
|
RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!dev->intr_handle) {
|
|
|
|
RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
intr_handle = dev->intr_handle;
|
|
|
|
if (!intr_handle->intr_vec) {
|
|
|
|
RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
|
|
|
|
return -1;
|
|
|
|
}
|
|
|
|
|
|
|
|
vec = intr_handle->intr_vec[queue_id];
|
|
|
|
efd_idx = (vec >= RTE_INTR_VEC_RXTX_OFFSET) ?
|
|
|
|
(vec - RTE_INTR_VEC_RXTX_OFFSET) : vec;
|
|
|
|
fd = intr_handle->efds[efd_idx];
|
|
|
|
|
|
|
|
return fd;
|
|
|
|
}
|
|
|
|
|
2015-11-06 00:09:30 +00:00
|
|
|
const struct rte_memzone *
|
|
|
|
rte_eth_dma_zone_reserve(const struct rte_eth_dev *dev, const char *ring_name,
|
|
|
|
uint16_t queue_id, size_t size, unsigned align,
|
|
|
|
int socket_id)
|
|
|
|
{
|
|
|
|
char z_name[RTE_MEMZONE_NAMESIZE];
|
|
|
|
const struct rte_memzone *mz;
|
|
|
|
|
|
|
|
snprintf(z_name, sizeof(z_name), "%s_%s_%d_%d",
|
2017-06-12 15:25:12 +00:00
|
|
|
dev->device->driver->name, ring_name,
|
2015-11-06 00:09:30 +00:00
|
|
|
dev->data->port_id, queue_id);
|
|
|
|
|
|
|
|
mz = rte_memzone_lookup(z_name);
|
|
|
|
if (mz)
|
|
|
|
return mz;
|
|
|
|
|
2018-04-11 12:29:47 +00:00
|
|
|
return rte_memzone_reserve_aligned(z_name, size, socket_id,
|
|
|
|
RTE_MEMZONE_IOVA_CONTIG, align);
|
2015-11-06 00:09:30 +00:00
|
|
|
}
|
|
|
|
|
2018-04-26 10:40:59 +00:00
|
|
|
int __rte_experimental
|
|
|
|
rte_eth_dev_create(struct rte_device *device, const char *name,
|
|
|
|
size_t priv_data_size,
|
|
|
|
ethdev_bus_specific_init ethdev_bus_specific_init,
|
|
|
|
void *bus_init_params,
|
|
|
|
ethdev_init_t ethdev_init, void *init_params)
|
|
|
|
{
|
|
|
|
struct rte_eth_dev *ethdev;
|
|
|
|
int retval;
|
|
|
|
|
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*ethdev_init, -EINVAL);
|
|
|
|
|
|
|
|
if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
|
|
|
|
ethdev = rte_eth_dev_allocate(name);
|
2018-09-24 13:43:24 +00:00
|
|
|
if (!ethdev)
|
|
|
|
return -ENODEV;
|
2018-04-26 10:40:59 +00:00
|
|
|
|
|
|
|
if (priv_data_size) {
|
|
|
|
ethdev->data->dev_private = rte_zmalloc_socket(
|
|
|
|
name, priv_data_size, RTE_CACHE_LINE_SIZE,
|
|
|
|
device->numa_node);
|
|
|
|
|
|
|
|
if (!ethdev->data->dev_private) {
|
|
|
|
RTE_LOG(ERR, EAL, "failed to allocate private data");
|
|
|
|
retval = -ENOMEM;
|
2018-09-24 13:43:24 +00:00
|
|
|
goto data_alloc_failed;
|
2018-04-26 10:40:59 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
} else {
|
|
|
|
ethdev = rte_eth_dev_attach_secondary(name);
|
|
|
|
if (!ethdev) {
|
|
|
|
RTE_LOG(ERR, EAL, "secondary process attach failed, "
|
|
|
|
"ethdev doesn't exist");
|
2018-09-24 13:43:24 +00:00
|
|
|
return -ENODEV;
|
2018-04-26 10:40:59 +00:00
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
ethdev->device = device;
|
|
|
|
|
|
|
|
if (ethdev_bus_specific_init) {
|
|
|
|
retval = ethdev_bus_specific_init(ethdev, bus_init_params);
|
|
|
|
if (retval) {
|
|
|
|
RTE_LOG(ERR, EAL,
|
|
|
|
"ethdev bus specific initialisation failed");
|
|
|
|
goto probe_failed;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
retval = ethdev_init(ethdev, init_params);
|
|
|
|
if (retval) {
|
|
|
|
RTE_LOG(ERR, EAL, "ethdev initialisation failed");
|
|
|
|
goto probe_failed;
|
|
|
|
}
|
|
|
|
|
2018-05-10 23:58:30 +00:00
|
|
|
rte_eth_dev_probing_finish(ethdev);
|
|
|
|
|
2018-04-26 10:40:59 +00:00
|
|
|
return retval;
|
|
|
|
probe_failed:
|
|
|
|
/* free ports private data if primary process */
|
|
|
|
if (rte_eal_process_type() == RTE_PROC_PRIMARY)
|
|
|
|
rte_free(ethdev->data->dev_private);
|
|
|
|
|
2018-09-24 13:43:24 +00:00
|
|
|
data_alloc_failed:
|
2018-04-26 10:40:59 +00:00
|
|
|
rte_eth_dev_release_port(ethdev);
|
|
|
|
|
|
|
|
return retval;
|
|
|
|
}
|
|
|
|
|
|
|
|
int __rte_experimental
|
|
|
|
rte_eth_dev_destroy(struct rte_eth_dev *ethdev,
|
|
|
|
ethdev_uninit_t ethdev_uninit)
|
|
|
|
{
|
|
|
|
int ret;
|
|
|
|
|
|
|
|
ethdev = rte_eth_dev_allocated(ethdev->data->name);
|
|
|
|
if (!ethdev)
|
|
|
|
return -ENODEV;
|
|
|
|
|
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*ethdev_uninit, -EINVAL);
|
|
|
|
if (ethdev_uninit) {
|
|
|
|
ret = ethdev_uninit(ethdev);
|
|
|
|
if (ret)
|
|
|
|
return ret;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (rte_eal_process_type() == RTE_PROC_PRIMARY)
|
|
|
|
rte_free(ethdev->data->dev_private);
|
|
|
|
|
|
|
|
ethdev->data->dev_private = NULL;
|
|
|
|
|
|
|
|
return rte_eth_dev_release_port(ethdev);
|
|
|
|
}
|
|
|
|
|
2015-07-20 03:02:26 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_rx_intr_ctl_q(uint16_t port_id, uint16_t queue_id,
|
2015-07-20 03:02:26 +00:00
|
|
|
int epfd, int op, void *data)
|
|
|
|
{
|
|
|
|
uint32_t vec;
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
struct rte_intr_handle *intr_handle;
|
|
|
|
int rc;
|
|
|
|
|
2016-05-18 19:15:11 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2015-07-20 03:02:26 +00:00
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
if (queue_id >= dev->data->nb_rx_queues) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
|
2015-07-20 03:02:26 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2016-12-23 15:58:09 +00:00
|
|
|
if (!dev->intr_handle) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "RX Intr handle unset\n");
|
2016-12-23 15:58:09 +00:00
|
|
|
return -ENOTSUP;
|
|
|
|
}
|
|
|
|
|
|
|
|
intr_handle = dev->intr_handle;
|
2015-07-20 03:02:26 +00:00
|
|
|
if (!intr_handle->intr_vec) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "RX Intr vector unset\n");
|
2015-07-20 03:02:26 +00:00
|
|
|
return -EPERM;
|
|
|
|
}
|
|
|
|
|
|
|
|
vec = intr_handle->intr_vec[queue_id];
|
|
|
|
rc = rte_intr_rx_ctl(intr_handle, epfd, op, vec, data);
|
|
|
|
if (rc && rc != -EEXIST) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR,
|
|
|
|
"p %u q %u rx ctl error op %d epfd %d vec %u\n",
|
|
|
|
port_id, queue_id, op, epfd, vec);
|
2015-07-20 03:02:26 +00:00
|
|
|
return rc;
|
|
|
|
}
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_rx_intr_enable(uint16_t port_id,
|
2015-07-20 03:02:26 +00:00
|
|
|
uint16_t queue_id)
|
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2016-05-18 19:15:11 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2015-07-20 03:02:26 +00:00
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_enable, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_enable)(dev,
|
|
|
|
queue_id));
|
2015-07-20 03:02:26 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_rx_intr_disable(uint16_t port_id,
|
2015-07-20 03:02:26 +00:00
|
|
|
uint16_t queue_id)
|
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2016-05-18 19:15:11 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2015-07-20 03:02:26 +00:00
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rx_queue_intr_disable, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->rx_queue_intr_disable)(dev,
|
|
|
|
queue_id));
|
2015-07-20 03:02:26 +00:00
|
|
|
}
|
|
|
|
|
2014-06-16 07:31:43 +00:00
|
|
|
|
2014-10-20 05:40:32 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_filter_supported(uint16_t port_id,
|
|
|
|
enum rte_filter_type filter_type)
|
2014-10-20 05:40:32 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2014-10-20 05:40:32 +00:00
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
|
2014-10-20 05:40:32 +00:00
|
|
|
return (*dev->dev_ops->filter_ctrl)(dev, filter_type,
|
|
|
|
RTE_ETH_FILTER_NOP, NULL);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2018-02-27 14:18:27 +00:00
|
|
|
rte_eth_dev_filter_ctrl(uint16_t port_id, enum rte_filter_type filter_type,
|
|
|
|
enum rte_filter_op filter_op, void *arg)
|
2014-10-20 05:40:32 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2014-10-20 05:40:32 +00:00
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->filter_ctrl, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->filter_ctrl)(dev, filter_type,
|
|
|
|
filter_op, arg));
|
2014-10-20 05:40:32 +00:00
|
|
|
}
|
2015-02-23 18:30:09 +00:00
|
|
|
|
2018-03-20 16:34:04 +00:00
|
|
|
const struct rte_eth_rxtx_callback *
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_add_rx_callback(uint16_t port_id, uint16_t queue_id,
|
2015-03-12 16:54:28 +00:00
|
|
|
rte_rx_callback_fn fn, void *user_param)
|
2015-02-23 18:30:09 +00:00
|
|
|
{
|
|
|
|
#ifndef RTE_ETHDEV_RXTX_CALLBACKS
|
|
|
|
rte_errno = ENOTSUP;
|
|
|
|
return NULL;
|
|
|
|
#endif
|
|
|
|
/* check input parameters */
|
2015-02-26 14:00:32 +00:00
|
|
|
if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
|
2015-02-23 18:30:09 +00:00
|
|
|
queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
|
|
|
|
rte_errno = EINVAL;
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
|
|
|
|
|
|
|
|
if (cb == NULL) {
|
|
|
|
rte_errno = ENOMEM;
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2015-03-12 16:54:28 +00:00
|
|
|
cb->fn.rx = fn;
|
2015-02-23 18:30:09 +00:00
|
|
|
cb->param = user_param;
|
2015-07-10 13:08:13 +00:00
|
|
|
|
2016-06-15 14:06:18 +00:00
|
|
|
rte_spinlock_lock(&rte_eth_rx_cb_lock);
|
2015-07-10 13:08:13 +00:00
|
|
|
/* Add the callbacks in fifo order. */
|
|
|
|
struct rte_eth_rxtx_callback *tail =
|
|
|
|
rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
|
|
|
|
|
|
|
|
if (!tail) {
|
|
|
|
rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
|
|
|
|
|
|
|
|
} else {
|
|
|
|
while (tail->next)
|
|
|
|
tail = tail->next;
|
|
|
|
tail->next = cb;
|
|
|
|
}
|
2016-06-15 14:06:18 +00:00
|
|
|
rte_spinlock_unlock(&rte_eth_rx_cb_lock);
|
2016-06-15 14:06:19 +00:00
|
|
|
|
|
|
|
return cb;
|
|
|
|
}
|
|
|
|
|
2018-03-20 16:34:04 +00:00
|
|
|
const struct rte_eth_rxtx_callback *
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_add_first_rx_callback(uint16_t port_id, uint16_t queue_id,
|
2016-06-15 14:06:19 +00:00
|
|
|
rte_rx_callback_fn fn, void *user_param)
|
|
|
|
{
|
|
|
|
#ifndef RTE_ETHDEV_RXTX_CALLBACKS
|
|
|
|
rte_errno = ENOTSUP;
|
|
|
|
return NULL;
|
|
|
|
#endif
|
|
|
|
/* check input parameters */
|
|
|
|
if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
|
|
|
|
queue_id >= rte_eth_devices[port_id].data->nb_rx_queues) {
|
|
|
|
rte_errno = EINVAL;
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
|
|
|
|
|
|
|
|
if (cb == NULL) {
|
|
|
|
rte_errno = ENOMEM;
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
cb->fn.rx = fn;
|
|
|
|
cb->param = user_param;
|
|
|
|
|
|
|
|
rte_spinlock_lock(&rte_eth_rx_cb_lock);
|
|
|
|
/* Add the callbacks at fisrt position*/
|
|
|
|
cb->next = rte_eth_devices[port_id].post_rx_burst_cbs[queue_id];
|
|
|
|
rte_smp_wmb();
|
|
|
|
rte_eth_devices[port_id].post_rx_burst_cbs[queue_id] = cb;
|
|
|
|
rte_spinlock_unlock(&rte_eth_rx_cb_lock);
|
2015-07-10 13:08:13 +00:00
|
|
|
|
2015-02-23 18:30:09 +00:00
|
|
|
return cb;
|
|
|
|
}
|
|
|
|
|
2018-03-20 16:34:04 +00:00
|
|
|
const struct rte_eth_rxtx_callback *
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_add_tx_callback(uint16_t port_id, uint16_t queue_id,
|
2015-03-12 16:54:28 +00:00
|
|
|
rte_tx_callback_fn fn, void *user_param)
|
2015-02-23 18:30:09 +00:00
|
|
|
{
|
|
|
|
#ifndef RTE_ETHDEV_RXTX_CALLBACKS
|
|
|
|
rte_errno = ENOTSUP;
|
|
|
|
return NULL;
|
|
|
|
#endif
|
|
|
|
/* check input parameters */
|
2015-02-26 14:00:32 +00:00
|
|
|
if (!rte_eth_dev_is_valid_port(port_id) || fn == NULL ||
|
2015-02-23 18:30:09 +00:00
|
|
|
queue_id >= rte_eth_devices[port_id].data->nb_tx_queues) {
|
|
|
|
rte_errno = EINVAL;
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
|
|
|
struct rte_eth_rxtx_callback *cb = rte_zmalloc(NULL, sizeof(*cb), 0);
|
|
|
|
|
|
|
|
if (cb == NULL) {
|
|
|
|
rte_errno = ENOMEM;
|
|
|
|
return NULL;
|
|
|
|
}
|
|
|
|
|
2015-03-12 16:54:28 +00:00
|
|
|
cb->fn.tx = fn;
|
2015-02-23 18:30:09 +00:00
|
|
|
cb->param = user_param;
|
2015-07-10 13:08:13 +00:00
|
|
|
|
2016-06-15 14:06:18 +00:00
|
|
|
rte_spinlock_lock(&rte_eth_tx_cb_lock);
|
2015-07-10 13:08:13 +00:00
|
|
|
/* Add the callbacks in fifo order. */
|
|
|
|
struct rte_eth_rxtx_callback *tail =
|
|
|
|
rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id];
|
|
|
|
|
|
|
|
if (!tail) {
|
|
|
|
rte_eth_devices[port_id].pre_tx_burst_cbs[queue_id] = cb;
|
|
|
|
|
|
|
|
} else {
|
|
|
|
while (tail->next)
|
|
|
|
tail = tail->next;
|
|
|
|
tail->next = cb;
|
|
|
|
}
|
2016-06-15 14:06:18 +00:00
|
|
|
rte_spinlock_unlock(&rte_eth_tx_cb_lock);
|
2015-07-10 13:08:13 +00:00
|
|
|
|
2015-02-23 18:30:09 +00:00
|
|
|
return cb;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_remove_rx_callback(uint16_t port_id, uint16_t queue_id,
|
2018-03-20 16:34:04 +00:00
|
|
|
const struct rte_eth_rxtx_callback *user_cb)
|
2015-02-23 18:30:09 +00:00
|
|
|
{
|
|
|
|
#ifndef RTE_ETHDEV_RXTX_CALLBACKS
|
2015-04-09 21:29:42 +00:00
|
|
|
return -ENOTSUP;
|
2015-02-23 18:30:09 +00:00
|
|
|
#endif
|
|
|
|
/* Check input parameters. */
|
2016-05-18 19:15:11 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
|
|
|
|
if (user_cb == NULL ||
|
|
|
|
queue_id >= rte_eth_devices[port_id].data->nb_rx_queues)
|
2015-04-09 21:29:42 +00:00
|
|
|
return -EINVAL;
|
2015-02-23 18:30:09 +00:00
|
|
|
|
|
|
|
struct rte_eth_dev *dev = &rte_eth_devices[port_id];
|
2016-06-15 14:06:18 +00:00
|
|
|
struct rte_eth_rxtx_callback *cb;
|
|
|
|
struct rte_eth_rxtx_callback **prev_cb;
|
|
|
|
int ret = -EINVAL;
|
|
|
|
|
|
|
|
rte_spinlock_lock(&rte_eth_rx_cb_lock);
|
|
|
|
prev_cb = &dev->post_rx_burst_cbs[queue_id];
|
|
|
|
for (; *prev_cb != NULL; prev_cb = &cb->next) {
|
|
|
|
cb = *prev_cb;
|
2015-02-23 18:30:09 +00:00
|
|
|
if (cb == user_cb) {
|
2016-06-15 14:06:18 +00:00
|
|
|
/* Remove the user cb from the callback list. */
|
|
|
|
*prev_cb = cb->next;
|
|
|
|
ret = 0;
|
|
|
|
break;
|
2015-02-23 18:30:09 +00:00
|
|
|
}
|
2016-06-15 14:06:18 +00:00
|
|
|
}
|
|
|
|
rte_spinlock_unlock(&rte_eth_rx_cb_lock);
|
2015-02-23 18:30:09 +00:00
|
|
|
|
2016-06-15 14:06:18 +00:00
|
|
|
return ret;
|
2015-02-23 18:30:09 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_remove_tx_callback(uint16_t port_id, uint16_t queue_id,
|
2018-03-20 16:34:04 +00:00
|
|
|
const struct rte_eth_rxtx_callback *user_cb)
|
2015-02-23 18:30:09 +00:00
|
|
|
{
|
|
|
|
#ifndef RTE_ETHDEV_RXTX_CALLBACKS
|
2015-04-09 21:29:42 +00:00
|
|
|
return -ENOTSUP;
|
2015-02-23 18:30:09 +00:00
|
|
|
#endif
|
|
|
|
/* Check input parameters. */
|
2016-05-18 19:15:11 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -EINVAL);
|
|
|
|
if (user_cb == NULL ||
|
|
|
|
queue_id >= rte_eth_devices[port_id].data->nb_tx_queues)
|
2015-04-09 21:29:42 +00:00
|
|
|
return -EINVAL;
|
2015-02-23 18:30:09 +00:00
|
|
|
|
|
|
|
struct rte_eth_dev *dev = &rte_eth_devices[port_id];
|
2016-06-15 14:06:18 +00:00
|
|
|
int ret = -EINVAL;
|
|
|
|
struct rte_eth_rxtx_callback *cb;
|
|
|
|
struct rte_eth_rxtx_callback **prev_cb;
|
|
|
|
|
|
|
|
rte_spinlock_lock(&rte_eth_tx_cb_lock);
|
|
|
|
prev_cb = &dev->pre_tx_burst_cbs[queue_id];
|
|
|
|
for (; *prev_cb != NULL; prev_cb = &cb->next) {
|
|
|
|
cb = *prev_cb;
|
2015-02-23 18:30:09 +00:00
|
|
|
if (cb == user_cb) {
|
2016-06-15 14:06:18 +00:00
|
|
|
/* Remove the user cb from the callback list. */
|
|
|
|
*prev_cb = cb->next;
|
|
|
|
ret = 0;
|
|
|
|
break;
|
2015-02-23 18:30:09 +00:00
|
|
|
}
|
2016-06-15 14:06:18 +00:00
|
|
|
}
|
|
|
|
rte_spinlock_unlock(&rte_eth_tx_cb_lock);
|
2015-02-23 18:30:09 +00:00
|
|
|
|
2016-06-15 14:06:18 +00:00
|
|
|
return ret;
|
2015-02-23 18:30:09 +00:00
|
|
|
}
|
2015-05-29 08:56:25 +00:00
|
|
|
|
2015-10-27 12:51:43 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_rx_queue_info_get(uint16_t port_id, uint16_t queue_id,
|
2015-10-27 12:51:43 +00:00
|
|
|
struct rte_eth_rxq_info *qinfo)
|
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2015-10-27 12:51:43 +00:00
|
|
|
|
|
|
|
if (qinfo == NULL)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
if (queue_id >= dev->data->nb_rx_queues) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Invalid RX queue_id=%u\n", queue_id);
|
2015-10-27 12:51:43 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->rxq_info_get, -ENOTSUP);
|
2015-10-27 12:51:43 +00:00
|
|
|
|
|
|
|
memset(qinfo, 0, sizeof(*qinfo));
|
|
|
|
dev->dev_ops->rxq_info_get(dev, queue_id, qinfo);
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_tx_queue_info_get(uint16_t port_id, uint16_t queue_id,
|
2015-10-27 12:51:43 +00:00
|
|
|
struct rte_eth_txq_info *qinfo)
|
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2015-10-27 12:51:43 +00:00
|
|
|
|
|
|
|
if (qinfo == NULL)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
if (queue_id >= dev->data->nb_tx_queues) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Invalid TX queue_id=%u\n", queue_id);
|
2015-10-27 12:51:43 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->txq_info_get, -ENOTSUP);
|
2015-10-27 12:51:43 +00:00
|
|
|
|
|
|
|
memset(qinfo, 0, sizeof(*qinfo));
|
|
|
|
dev->dev_ops->txq_info_get(dev, queue_id, qinfo);
|
2018-05-03 06:03:25 +00:00
|
|
|
|
2015-10-27 12:51:43 +00:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2015-05-29 08:56:25 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_set_mc_addr_list(uint16_t port_id,
|
2015-05-29 08:56:25 +00:00
|
|
|
struct ether_addr *mc_addr_set,
|
|
|
|
uint32_t nb_mc_addr)
|
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2015-05-29 08:56:25 +00:00
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_mc_addr_list, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, dev->dev_ops->set_mc_addr_list(dev,
|
|
|
|
mc_addr_set, nb_mc_addr));
|
2015-05-29 08:56:25 +00:00
|
|
|
}
|
2015-07-02 15:16:28 +00:00
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_timesync_enable(uint16_t port_id)
|
2015-07-02 15:16:28 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2015-07-02 15:16:28 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_enable, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->timesync_enable)(dev));
|
2015-07-02 15:16:28 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_timesync_disable(uint16_t port_id)
|
2015-07-02 15:16:28 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2015-07-02 15:16:28 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_disable, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->timesync_disable)(dev));
|
2015-07-02 15:16:28 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_timesync_read_rx_timestamp(uint16_t port_id, struct timespec *timestamp,
|
2015-07-02 15:16:28 +00:00
|
|
|
uint32_t flags)
|
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2015-07-02 15:16:28 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_rx_timestamp, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->timesync_read_rx_timestamp)
|
|
|
|
(dev, timestamp, flags));
|
2015-07-02 15:16:28 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_timesync_read_tx_timestamp(uint16_t port_id,
|
|
|
|
struct timespec *timestamp)
|
2015-07-02 15:16:28 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2015-07-02 15:16:28 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_tx_timestamp, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->timesync_read_tx_timestamp)
|
|
|
|
(dev, timestamp));
|
2015-07-02 15:16:28 +00:00
|
|
|
}
|
2015-07-16 13:25:34 +00:00
|
|
|
|
2015-11-13 16:09:07 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_timesync_adjust_time(uint16_t port_id, int64_t delta)
|
2015-11-13 16:09:07 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2015-11-13 16:09:07 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_adjust_time, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->timesync_adjust_time)(dev,
|
|
|
|
delta));
|
2015-11-13 16:09:07 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_timesync_read_time(uint16_t port_id, struct timespec *timestamp)
|
2015-11-13 16:09:07 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2015-11-13 16:09:07 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_read_time, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->timesync_read_time)(dev,
|
|
|
|
timestamp));
|
2015-11-13 16:09:07 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_timesync_write_time(uint16_t port_id, const struct timespec *timestamp)
|
2015-11-13 16:09:07 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2015-11-13 16:09:07 +00:00
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->timesync_write_time, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->timesync_write_time)(dev,
|
|
|
|
timestamp));
|
2015-11-13 16:09:07 +00:00
|
|
|
}
|
|
|
|
|
2015-07-16 13:25:34 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_get_reg_info(uint16_t port_id, struct rte_dev_reg_info *info)
|
2015-07-16 13:25:34 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2015-07-16 13:25:34 +00:00
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_reg, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->get_reg)(dev, info));
|
2015-07-16 13:25:34 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_get_eeprom_length(uint16_t port_id)
|
2015-07-16 13:25:34 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2015-07-16 13:25:34 +00:00
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom_length, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->get_eeprom_length)(dev));
|
2015-07-16 13:25:34 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_get_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
|
2015-07-16 13:25:34 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2015-07-16 13:25:34 +00:00
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_eeprom, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->get_eeprom)(dev, info));
|
2015-07-16 13:25:34 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_set_eeprom(uint16_t port_id, struct rte_dev_eeprom_info *info)
|
2015-07-16 13:25:34 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2015-07-16 13:25:34 +00:00
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->set_eeprom, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->set_eeprom)(dev, info));
|
2015-07-16 13:25:34 +00:00
|
|
|
}
|
2015-10-31 15:57:27 +00:00
|
|
|
|
2018-04-25 14:02:02 +00:00
|
|
|
int __rte_experimental
|
|
|
|
rte_eth_dev_get_module_info(uint16_t port_id,
|
|
|
|
struct rte_eth_dev_module_info *modinfo)
|
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_info, -ENOTSUP);
|
|
|
|
return (*dev->dev_ops->get_module_info)(dev, modinfo);
|
|
|
|
}
|
|
|
|
|
|
|
|
int __rte_experimental
|
|
|
|
rte_eth_dev_get_module_eeprom(uint16_t port_id,
|
|
|
|
struct rte_dev_eeprom_info *info)
|
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_module_eeprom, -ENOTSUP);
|
|
|
|
return (*dev->dev_ops->get_module_eeprom)(dev, info);
|
|
|
|
}
|
|
|
|
|
2015-10-31 15:57:27 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_get_dcb_info(uint16_t port_id,
|
2015-10-31 15:57:27 +00:00
|
|
|
struct rte_eth_dcb_info *dcb_info)
|
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
2016-05-18 19:15:11 +00:00
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
2015-10-31 15:57:27 +00:00
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
memset(dcb_info, 0, sizeof(struct rte_eth_dcb_info));
|
|
|
|
|
2015-11-25 13:25:08 +00:00
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->get_dcb_info, -ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->get_dcb_info)(dev, dcb_info));
|
2015-10-31 15:57:27 +00:00
|
|
|
}
|
2015-11-03 13:01:55 +00:00
|
|
|
|
2016-03-11 01:10:08 +00:00
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_l2_tunnel_eth_type_conf(uint16_t port_id,
|
2016-03-11 01:10:08 +00:00
|
|
|
struct rte_eth_l2_tunnel_conf *l2_tunnel)
|
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
|
|
|
if (l2_tunnel == NULL) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
|
2016-03-11 01:10:08 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
|
2016-03-11 01:10:08 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_eth_type_conf,
|
|
|
|
-ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->l2_tunnel_eth_type_conf)(dev,
|
|
|
|
l2_tunnel));
|
2016-03-11 01:10:08 +00:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_l2_tunnel_offload_set(uint16_t port_id,
|
2016-03-11 01:10:08 +00:00
|
|
|
struct rte_eth_l2_tunnel_conf *l2_tunnel,
|
|
|
|
uint32_t mask,
|
|
|
|
uint8_t en)
|
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
|
|
|
|
|
|
|
if (l2_tunnel == NULL) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Invalid l2_tunnel parameter\n");
|
2016-03-11 01:10:08 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (l2_tunnel->l2_tunnel_type >= RTE_TUNNEL_TYPE_MAX) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Invalid tunnel type\n");
|
2016-03-11 01:10:08 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (mask == 0) {
|
2018-06-19 01:04:56 +00:00
|
|
|
RTE_ETHDEV_LOG(ERR, "Mask should have a value\n");
|
2016-03-11 01:10:08 +00:00
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->l2_tunnel_offload_set,
|
|
|
|
-ENOTSUP);
|
2018-01-20 21:12:22 +00:00
|
|
|
return eth_err(port_id, (*dev->dev_ops->l2_tunnel_offload_set)(dev,
|
|
|
|
l2_tunnel, mask, en));
|
2016-03-11 01:10:08 +00:00
|
|
|
}
|
2017-05-25 15:57:53 +00:00
|
|
|
|
|
|
|
static void
|
|
|
|
rte_eth_dev_adjust_nb_desc(uint16_t *nb_desc,
|
|
|
|
const struct rte_eth_desc_lim *desc_lim)
|
|
|
|
{
|
|
|
|
if (desc_lim->nb_align != 0)
|
|
|
|
*nb_desc = RTE_ALIGN_CEIL(*nb_desc, desc_lim->nb_align);
|
|
|
|
|
|
|
|
if (desc_lim->nb_max != 0)
|
|
|
|
*nb_desc = RTE_MIN(*nb_desc, desc_lim->nb_max);
|
|
|
|
|
|
|
|
*nb_desc = RTE_MAX(*nb_desc, desc_lim->nb_min);
|
|
|
|
}
|
|
|
|
|
|
|
|
int
|
2017-09-29 07:17:24 +00:00
|
|
|
rte_eth_dev_adjust_nb_rx_tx_desc(uint16_t port_id,
|
2017-05-25 15:57:53 +00:00
|
|
|
uint16_t *nb_rx_desc,
|
|
|
|
uint16_t *nb_tx_desc)
|
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
struct rte_eth_dev_info dev_info;
|
|
|
|
|
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
RTE_FUNC_PTR_OR_ERR_RET(*dev->dev_ops->dev_infos_get, -ENOTSUP);
|
|
|
|
|
|
|
|
rte_eth_dev_info_get(port_id, &dev_info);
|
|
|
|
|
|
|
|
if (nb_rx_desc != NULL)
|
|
|
|
rte_eth_dev_adjust_nb_desc(nb_rx_desc, &dev_info.rx_desc_lim);
|
|
|
|
|
|
|
|
if (nb_tx_desc != NULL)
|
|
|
|
rte_eth_dev_adjust_nb_desc(nb_tx_desc, &dev_info.tx_desc_lim);
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
2017-10-06 07:45:30 +00:00
|
|
|
|
|
|
|
int
|
2017-10-12 09:32:47 +00:00
|
|
|
rte_eth_dev_pool_ops_supported(uint16_t port_id, const char *pool)
|
2017-10-06 07:45:30 +00:00
|
|
|
{
|
|
|
|
struct rte_eth_dev *dev;
|
|
|
|
|
|
|
|
RTE_ETH_VALID_PORTID_OR_ERR_RET(port_id, -ENODEV);
|
|
|
|
|
|
|
|
if (pool == NULL)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
dev = &rte_eth_devices[port_id];
|
|
|
|
|
|
|
|
if (*dev->dev_ops->pool_ops_supported == NULL)
|
|
|
|
return 1; /* all pools are supported */
|
|
|
|
|
|
|
|
return (*dev->dev_ops->pool_ops_supported)(dev, pool);
|
|
|
|
}
|
2018-03-13 11:07:23 +00:00
|
|
|
|
2018-04-26 10:41:03 +00:00
|
|
|
/**
|
|
|
|
* A set of values to describe the possible states of a switch domain.
|
|
|
|
*/
|
|
|
|
enum rte_eth_switch_domain_state {
|
|
|
|
RTE_ETH_SWITCH_DOMAIN_UNUSED = 0,
|
|
|
|
RTE_ETH_SWITCH_DOMAIN_ALLOCATED
|
|
|
|
};
|
|
|
|
|
|
|
|
/**
|
|
|
|
* Array of switch domains available for allocation. Array is sized to
|
|
|
|
* RTE_MAX_ETHPORTS elements as there cannot be more active switch domains than
|
|
|
|
* ethdev ports in a single process.
|
|
|
|
*/
|
|
|
|
struct rte_eth_dev_switch {
|
|
|
|
enum rte_eth_switch_domain_state state;
|
|
|
|
} rte_eth_switch_domains[RTE_MAX_ETHPORTS];
|
|
|
|
|
|
|
|
int __rte_experimental
|
|
|
|
rte_eth_switch_domain_alloc(uint16_t *domain_id)
|
|
|
|
{
|
|
|
|
unsigned int i;
|
|
|
|
|
|
|
|
*domain_id = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID;
|
|
|
|
|
|
|
|
for (i = RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID + 1;
|
|
|
|
i < RTE_MAX_ETHPORTS; i++) {
|
|
|
|
if (rte_eth_switch_domains[i].state ==
|
|
|
|
RTE_ETH_SWITCH_DOMAIN_UNUSED) {
|
|
|
|
rte_eth_switch_domains[i].state =
|
|
|
|
RTE_ETH_SWITCH_DOMAIN_ALLOCATED;
|
|
|
|
*domain_id = i;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return -ENOSPC;
|
|
|
|
}
|
|
|
|
|
|
|
|
int __rte_experimental
|
|
|
|
rte_eth_switch_domain_free(uint16_t domain_id)
|
|
|
|
{
|
|
|
|
if (domain_id == RTE_ETH_DEV_SWITCH_DOMAIN_ID_INVALID ||
|
|
|
|
domain_id >= RTE_MAX_ETHPORTS)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
if (rte_eth_switch_domains[domain_id].state !=
|
|
|
|
RTE_ETH_SWITCH_DOMAIN_ALLOCATED)
|
|
|
|
return -EINVAL;
|
|
|
|
|
|
|
|
rte_eth_switch_domains[domain_id].state = RTE_ETH_SWITCH_DOMAIN_UNUSED;
|
|
|
|
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
ethdev: add common devargs parser
Introduces a new structure, rte_eth_devargs, to support generic
ethdev arguments common across NET PMDs, with a new API
rte_eth_devargs_parse API to support PMD parsing these arguments. The
patch add support for a representor argument passed with passed with
the EAL -w option. The representor parameter allows the user to specify
which representor ports to initialise on a device.
The argument supports passing a single representor port, a list of
port values or a range of port values.
-w BDF,representor=1 # create representor port 1 on pci device BDF
-w BDF,representor=[1,2,5,6,10] # create representor ports in list
-w BDF,representor=[0-31] # create representor ports in range
Signed-off-by: Remy Horton <remy.horton@intel.com>
Signed-off-by: Declan Doherty <declan.doherty@intel.com>
Reviewed-by: Ferruh Yigit <ferruh.yigit@intel.com>
2018-04-26 10:41:02 +00:00
|
|
|
typedef int (*rte_eth_devargs_callback_t)(char *str, void *data);
|
|
|
|
|
|
|
|
static int
|
|
|
|
rte_eth_devargs_tokenise(struct rte_kvargs *arglist, const char *str_in)
|
|
|
|
{
|
|
|
|
int state;
|
|
|
|
struct rte_kvargs_pair *pair;
|
|
|
|
char *letter;
|
|
|
|
|
|
|
|
arglist->str = strdup(str_in);
|
|
|
|
if (arglist->str == NULL)
|
|
|
|
return -ENOMEM;
|
|
|
|
|
|
|
|
letter = arglist->str;
|
|
|
|
state = 0;
|
|
|
|
arglist->count = 0;
|
|
|
|
pair = &arglist->pairs[0];
|
|
|
|
while (1) {
|
|
|
|
switch (state) {
|
|
|
|
case 0: /* Initial */
|
|
|
|
if (*letter == '=')
|
|
|
|
return -EINVAL;
|
|
|
|
else if (*letter == '\0')
|
|
|
|
return 0;
|
|
|
|
|
|
|
|
state = 1;
|
|
|
|
pair->key = letter;
|
|
|
|
/* fall-thru */
|
|
|
|
|
|
|
|
case 1: /* Parsing key */
|
|
|
|
if (*letter == '=') {
|
|
|
|
*letter = '\0';
|
|
|
|
pair->value = letter + 1;
|
|
|
|
state = 2;
|
|
|
|
} else if (*letter == ',' || *letter == '\0')
|
|
|
|
return -EINVAL;
|
|
|
|
break;
|
|
|
|
|
|
|
|
|
|
|
|
case 2: /* Parsing value */
|
|
|
|
if (*letter == '[')
|
|
|
|
state = 3;
|
|
|
|
else if (*letter == ',') {
|
|
|
|
*letter = '\0';
|
|
|
|
arglist->count++;
|
|
|
|
pair = &arglist->pairs[arglist->count];
|
|
|
|
state = 0;
|
|
|
|
} else if (*letter == '\0') {
|
|
|
|
letter--;
|
|
|
|
arglist->count++;
|
|
|
|
pair = &arglist->pairs[arglist->count];
|
|
|
|
state = 0;
|
|
|
|
}
|
|
|
|
break;
|
|
|
|
|
|
|
|
case 3: /* Parsing list */
|
|
|
|
if (*letter == ']')
|
|
|
|
state = 2;
|
|
|
|
else if (*letter == '\0')
|
|
|
|
return -EINVAL;
|
|
|
|
break;
|
|
|
|
}
|
|
|
|
letter++;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
rte_eth_devargs_parse_list(char *str, rte_eth_devargs_callback_t callback,
|
|
|
|
void *data)
|
|
|
|
{
|
|
|
|
char *str_start;
|
|
|
|
int state;
|
|
|
|
int result;
|
|
|
|
|
|
|
|
if (*str != '[')
|
|
|
|
/* Single element, not a list */
|
|
|
|
return callback(str, data);
|
|
|
|
|
|
|
|
/* Sanity check, then strip the brackets */
|
|
|
|
str_start = &str[strlen(str) - 1];
|
|
|
|
if (*str_start != ']') {
|
|
|
|
RTE_LOG(ERR, EAL, "(%s): List does not end with ']'", str);
|
|
|
|
return -EINVAL;
|
|
|
|
}
|
|
|
|
str++;
|
|
|
|
*str_start = '\0';
|
|
|
|
|
|
|
|
/* Process list elements */
|
|
|
|
state = 0;
|
|
|
|
while (1) {
|
|
|
|
if (state == 0) {
|
|
|
|
if (*str == '\0')
|
|
|
|
break;
|
|
|
|
if (*str != ',') {
|
|
|
|
str_start = str;
|
|
|
|
state = 1;
|
|
|
|
}
|
|
|
|
} else if (state == 1) {
|
|
|
|
if (*str == ',' || *str == '\0') {
|
|
|
|
if (str > str_start) {
|
|
|
|
/* Non-empty string fragment */
|
|
|
|
*str = '\0';
|
|
|
|
result = callback(str_start, data);
|
|
|
|
if (result < 0)
|
|
|
|
return result;
|
|
|
|
}
|
|
|
|
state = 0;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
str++;
|
|
|
|
}
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
static int
|
|
|
|
rte_eth_devargs_process_range(char *str, uint16_t *list, uint16_t *len_list,
|
|
|
|
const uint16_t max_list)
|
|
|
|
{
|
|
|
|
uint16_t lo, hi, val;
|
|
|
|
int result;
|
|
|
|
|
|
|
|
result = sscanf(str, "%hu-%hu", &lo, &hi);
|
|
|
|
if (result == 1) {
|
|
|
|
if (*len_list >= max_list)
|
|
|
|
return -ENOMEM;
|
|
|
|
list[(*len_list)++] = lo;
|
|
|
|
} else if (result == 2) {
|
|
|
|
if (lo >= hi || lo > RTE_MAX_ETHPORTS || hi > RTE_MAX_ETHPORTS)
|
|
|
|
return -EINVAL;
|
|
|
|
for (val = lo; val <= hi; val++) {
|
|
|
|
if (*len_list >= max_list)
|
|
|
|
return -ENOMEM;
|
|
|
|
list[(*len_list)++] = val;
|
|
|
|
}
|
|
|
|
} else
|
|
|
|
return -EINVAL;
|
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
|
|
|
|
|
|
|
static int
|
|
|
|
rte_eth_devargs_parse_representor_ports(char *str, void *data)
|
|
|
|
{
|
|
|
|
struct rte_eth_devargs *eth_da = data;
|
|
|
|
|
|
|
|
return rte_eth_devargs_process_range(str, eth_da->representor_ports,
|
|
|
|
ð_da->nb_representor_ports, RTE_MAX_ETHPORTS);
|
|
|
|
}
|
|
|
|
|
|
|
|
int __rte_experimental
|
|
|
|
rte_eth_devargs_parse(const char *dargs, struct rte_eth_devargs *eth_da)
|
|
|
|
{
|
|
|
|
struct rte_kvargs args;
|
|
|
|
struct rte_kvargs_pair *pair;
|
|
|
|
unsigned int i;
|
|
|
|
int result = 0;
|
|
|
|
|
|
|
|
memset(eth_da, 0, sizeof(*eth_da));
|
|
|
|
|
|
|
|
result = rte_eth_devargs_tokenise(&args, dargs);
|
|
|
|
if (result < 0)
|
|
|
|
goto parse_cleanup;
|
|
|
|
|
|
|
|
for (i = 0; i < args.count; i++) {
|
|
|
|
pair = &args.pairs[i];
|
|
|
|
if (strcmp("representor", pair->key) == 0) {
|
|
|
|
result = rte_eth_devargs_parse_list(pair->value,
|
|
|
|
rte_eth_devargs_parse_representor_ports,
|
|
|
|
eth_da);
|
|
|
|
if (result < 0)
|
|
|
|
goto parse_cleanup;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
parse_cleanup:
|
|
|
|
if (args.str)
|
|
|
|
free(args.str);
|
|
|
|
|
|
|
|
return result;
|
|
|
|
}
|
|
|
|
|
2018-06-18 12:32:21 +00:00
|
|
|
RTE_INIT(ethdev_init_log)
|
2018-03-13 11:07:23 +00:00
|
|
|
{
|
2018-06-19 01:04:55 +00:00
|
|
|
rte_eth_dev_logtype = rte_log_register("lib.ethdev");
|
|
|
|
if (rte_eth_dev_logtype >= 0)
|
|
|
|
rte_log_set_level(rte_eth_dev_logtype, RTE_LOG_INFO);
|
2018-03-13 11:07:23 +00:00
|
|
|
}
|