2019-05-28 12:38:35 +00:00
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright(C) 2019 Marvell International Ltd.
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*/
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#include <rte_common.h>
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#include "otx2_dev.h"
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#include "otx2_ethdev.h"
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int
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otx2_cgx_mac_addr_set(struct rte_eth_dev *eth_dev, struct rte_ether_addr *addr)
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{
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struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
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struct cgx_mac_addr_set_or_get *req;
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struct otx2_mbox *mbox = dev->mbox;
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int rc;
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2019-11-06 09:27:34 +00:00
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if (otx2_dev_is_vf_or_sdp(dev))
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2019-05-28 12:38:35 +00:00
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return -ENOTSUP;
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if (otx2_dev_active_vfs(dev))
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return -ENOTSUP;
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req = otx2_mbox_alloc_msg_cgx_mac_addr_set(mbox);
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otx2_mbox_memcpy(req->mac_addr, addr->addr_bytes, RTE_ETHER_ADDR_LEN);
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rc = otx2_mbox_process(mbox);
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if (rc)
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otx2_err("Failed to set mac address in CGX, rc=%d", rc);
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return 0;
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}
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int
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otx2_cgx_mac_max_entries_get(struct otx2_eth_dev *dev)
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{
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struct cgx_max_dmac_entries_get_rsp *rsp;
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struct otx2_mbox *mbox = dev->mbox;
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int rc;
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2019-11-06 09:27:34 +00:00
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if (otx2_dev_is_vf_or_sdp(dev))
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2019-05-28 12:38:35 +00:00
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return 0;
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otx2_mbox_alloc_msg_cgx_mac_max_entries_get(mbox);
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rc = otx2_mbox_process_msg(mbox, (void *)&rsp);
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if (rc)
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return rc;
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return rsp->max_dmac_filters;
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}
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2019-05-29 11:21:55 +00:00
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int
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otx2_nix_mac_addr_add(struct rte_eth_dev *eth_dev, struct rte_ether_addr *addr,
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uint32_t index __rte_unused, uint32_t pool __rte_unused)
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{
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struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
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struct otx2_mbox *mbox = dev->mbox;
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struct cgx_mac_addr_add_req *req;
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struct cgx_mac_addr_add_rsp *rsp;
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int rc;
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2019-11-06 09:27:34 +00:00
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if (otx2_dev_is_vf_or_sdp(dev))
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2019-05-29 11:21:55 +00:00
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return -ENOTSUP;
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if (otx2_dev_active_vfs(dev))
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return -ENOTSUP;
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req = otx2_mbox_alloc_msg_cgx_mac_addr_add(mbox);
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otx2_mbox_memcpy(req->mac_addr, addr->addr_bytes, RTE_ETHER_ADDR_LEN);
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rc = otx2_mbox_process_msg(mbox, (void *)&rsp);
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if (rc) {
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otx2_err("Failed to add mac address, rc=%d", rc);
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goto done;
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}
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/* Enable promiscuous mode at NIX level */
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otx2_nix_promisc_config(eth_dev, 1);
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2020-06-03 14:52:13 +00:00
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dev->dmac_filter_enable = true;
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eth_dev->data->promiscuous = 0;
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2019-05-29 11:21:55 +00:00
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done:
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return rc;
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}
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void
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otx2_nix_mac_addr_del(struct rte_eth_dev *eth_dev, uint32_t index)
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{
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struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
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struct otx2_mbox *mbox = dev->mbox;
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struct cgx_mac_addr_del_req *req;
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int rc;
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2019-11-06 09:27:34 +00:00
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if (otx2_dev_is_vf_or_sdp(dev))
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2019-05-29 11:21:55 +00:00
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return;
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req = otx2_mbox_alloc_msg_cgx_mac_addr_del(mbox);
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req->index = index;
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rc = otx2_mbox_process(mbox);
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if (rc)
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otx2_err("Failed to delete mac address, rc=%d", rc);
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}
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int
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otx2_nix_mac_addr_set(struct rte_eth_dev *eth_dev, struct rte_ether_addr *addr)
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{
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struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
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struct otx2_mbox *mbox = dev->mbox;
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struct nix_set_mac_addr *req;
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int rc;
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req = otx2_mbox_alloc_msg_nix_set_mac_addr(mbox);
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otx2_mbox_memcpy(req->mac_addr, addr->addr_bytes, RTE_ETHER_ADDR_LEN);
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rc = otx2_mbox_process(mbox);
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if (rc) {
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otx2_err("Failed to set mac address, rc=%d", rc);
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goto done;
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}
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otx2_mbox_memcpy(dev->mac_addr, addr->addr_bytes, RTE_ETHER_ADDR_LEN);
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/* Install the same entry into CGX DMAC filter table too. */
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otx2_cgx_mac_addr_set(eth_dev, addr);
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done:
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return rc;
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}
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2019-05-28 12:38:35 +00:00
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int
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otx2_nix_mac_addr_get(struct rte_eth_dev *eth_dev, uint8_t *addr)
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{
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struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev);
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struct otx2_mbox *mbox = dev->mbox;
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struct nix_get_mac_addr_rsp *rsp;
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int rc;
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otx2_mbox_alloc_msg_nix_get_mac_addr(mbox);
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otx2_mbox_msg_send(mbox, 0);
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rc = otx2_mbox_get_rsp(mbox, 0, (void *)&rsp);
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if (rc) {
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otx2_err("Failed to get mac address, rc=%d", rc);
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goto done;
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}
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otx2_mbox_memcpy(addr, rsp->mac_addr, RTE_ETHER_ADDR_LEN);
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done:
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return rc;
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}
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