2020-07-20 06:26:11 +00:00
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/* SPDX-License-Identifier: BSD-3-Clause
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* Copyright 2020 Mellanox Technologies, Ltd
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*/
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#ifndef RTE_PMD_MLX5_REGEX_RXP_H_
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#define RTE_PMD_MLX5_REGEX_RXP_H_
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2021-10-22 15:45:57 +00:00
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#define MLX5_RXP_BF2_IDENTIFIER 0x0
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2022-09-01 08:24:33 +00:00
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#define MLX5_RXP_BF3_IDENTIFIER 0x1
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2020-07-20 06:26:11 +00:00
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#define MLX5_RXP_MAX_JOB_LENGTH 16384
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#define MLX5_RXP_MAX_SUBSETS 4095
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#define MLX5_RXP_CSR_NUM_ENTRIES 31
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2022-09-01 08:24:33 +00:00
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#define MLX5_RXP_BF2_ROF_VERSION_STRING 0x07055254
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#define MLX5_RXP_BF3_ROF_VERSION_STRING 0x00065254
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#define MLX5_RXP_BF4_ROF_VERSION_STRING 0x00075254
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2020-07-20 06:26:11 +00:00
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#define MLX5_RXP_CTRL_TYPE_MASK 7
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#define MLX5_RXP_CTRL_TYPE_JOB_DESCRIPTOR 0
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#define MLX5_RXP_CTRL_TYPE_RESPONSE_DESCRIPTOR 1
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#define MLX5_RXP_CTRL_TYPE_MEMORY_WRITE 4
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#define MLX5_RXP_CSR_CTRL_DISABLE_L2C (1 << 7)
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#define MLX5_RXP_CTRL_JOB_DESC_SOF 0x0010
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#define MLX5_RXP_CTRL_JOB_DESC_EOF 0x0020
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#define MLX5_RXP_CTRL_JOB_DESC_HPM_ENABLE 0x0100
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#define MLX5_RXP_CTRL_JOB_DESC_ANYMATCH_ENABLE 0x0200
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#define MLX5_RXP_CTRL_JOB_DESC_FLAGS (MLX5_RXP_CTRL_JOB_DESC_SOF | \
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MLX5_RXP_CTRL_JOB_DESC_EOF | \
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MLX5_RXP_CTRL_JOB_DESC_HPM_ENABLE | \
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MLX5_RXP_CTRL_JOB_DESC_ANYMATCH_ENABLE)
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#define MLX5_RXP_CTRL_VALID 0x8000
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#define MLX5_RXP_RESP_STATUS_MAX_PRI_THREADS (1 << 3)
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#define MLX5_RXP_RESP_STATUS_MAX_SEC_THREADS (1 << 4)
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#define MLX5_RXP_RESP_STATUS_MAX_LATENCY (1 << 5)
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#define MLX5_RXP_RESP_STATUS_MAX_MATCH (1 << 6)
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#define MLX5_RXP_RESP_STATUS_MAX_PREFIX (1 << 7)
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#define MLX5_RXP_RESP_STATUS_HPM (1 << 8)
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#define MLX5_RXP_RESP_STATUS_ANYMATCH (1 << 9)
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#define MLX5_RXP_RESP_STATUS_PMI_SOJ (1 << 13)
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#define MLX5_RXP_RESP_STATUS_PMI_EOJ (1 << 14)
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/* This describes the header the RXP expects for any search data. */
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struct mlx5_rxp_job_desc {
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uint32_t job_id;
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uint16_t ctrl;
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uint16_t len;
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uint16_t subset[4];
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} __rte_packed;
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struct mlx5_rxp_response_desc {
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uint32_t job_id;
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uint16_t status;
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uint8_t detected_match_count;
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uint8_t match_count;
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uint16_t primary_thread_count;
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uint16_t instruction_count;
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uint16_t latency_count;
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uint16_t pmi_min_byte_ptr;
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} __rte_packed;
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struct mlx5_rxp_match_tuple {
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uint32_t rule_id;
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uint16_t start_ptr;
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uint16_t length;
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} __rte_packed;
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struct mlx5_rxp_response {
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struct mlx5_rxp_response_desc header;
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2022-06-03 11:16:23 +00:00
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struct mlx5_rxp_match_tuple matches[];
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2020-07-20 06:26:11 +00:00
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};
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#define MLX5_RXP_MAX_MATCHES 254
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#define MLX5_RXP_CTL_RULES_PGM 1
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#define MLX5_RXP_CTL_RULES_PGM_INCR 2
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#define MLX5_RXP_ROF_ENTRY_INST 0
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#define MLX5_RXP_ROF_ENTRY_EQ 1
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#define MLX5_RXP_ROF_ENTRY_GTE 2
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#define MLX5_RXP_ROF_ENTRY_LTE 3
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#define MLX5_RXP_ROF_ENTRY_CHECKSUM 4
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#define MLX5_RXP_ROF_ENTRY_CHECKSUM_EX_EM 5
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#define MLX5_RXP_ROF_ENTRY_IM 6
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#define MLX5_RXP_ROF_ENTRY_EM 7
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#define MLX5_RXP_ROF_ENTRY_TYPE_MAX 7
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#define MLX5_RXP_INST_OFFSET 3
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#define MLX5_RXP_INST_BLOCK_SIZE 8
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#define MLX5_MAX_SIZE_RES_DES (sizeof(struct mlx5_rxp_response_desc))
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#define MLX5_MAX_DB_SIZE (1u << 27u)
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#define MLX5_MAX_SIZE_MATCH_RESP (254 * sizeof(struct mlx5_rxp_match_tuple))
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#define MLX5_RXP_SQ_NOT_BUSY false
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#define MLX5_RXP_SQ_BUSY true
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struct mlx5_rxp_ctl_hdr {
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uint16_t cmd;
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uint32_t len;
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};
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struct mlx5_rxp_rof_entry {
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uint8_t type;
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uint32_t addr;
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uint64_t value;
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};
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struct mlx5_rxp_rof {
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uint32_t rof_version;
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char *timestamp;
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char *rxp_compiler_version;
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uint32_t rof_revision;
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uint32_t number_of_entries;
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struct mlx5_rxp_rof_entry *rof_entries;
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};
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struct mlx5_rxp_ctl_rules_pgm {
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struct mlx5_rxp_ctl_hdr hdr;
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uint32_t count;
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2022-06-03 11:16:23 +00:00
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struct mlx5_rxp_rof_entry rules[];
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2020-07-20 06:26:11 +00:00
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} __rte_packed;
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/* RXP programming mode setting. */
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enum mlx5_rxp_program_mode {
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MLX5_RXP_MODE_NOT_DEFINED = 0,
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MLX5_RXP_SHARED_PROG_MODE,
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MLX5_RXP_PRIVATE_PROG_MODE,
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};
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#define MLX5_RXP_POLL_CSR_FOR_VALUE_TIMEOUT 3000 /* Poll timeout in ms. */
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#define MLX5_RXP_INITIALIZATION_TIMEOUT 60000 /* Initialize timeout in ms. */
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#define MLX5_RXP_MAX_ENGINES 2u /* Number of RXP engines. */
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#define MLX5_RXP_EM_COUNT 1u /* Extra External Memories to use. */
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#define MLX5_RXP_DB_NOT_ASSIGNED 0xFF
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2021-10-22 15:45:55 +00:00
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struct mlx5_regex_mkey {
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2020-07-20 06:26:11 +00:00
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struct mlx5dv_devx_umem *umem;
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2021-10-22 15:45:55 +00:00
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struct mlx5_devx_obj *mkey;
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2020-07-20 06:26:11 +00:00
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uint64_t offset;
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};
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#endif /* RTE_PMD_MLX5_REGEX_RXP_H_ */
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