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numam-dpdk/mk/rte.cpuflags.mk

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mk: use SPDX tag for Intel copyright files Replace the BSD license header with the SPDX tag for Makefiles with only an Intel copyright on them. Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
2017-12-19 15:49:04 +00:00
# SPDX-License-Identifier: BSD-3-Clause
# Copyright(c) 2010-2014 Intel Corporation
mk: rework cpu flags detection For cases where the compilation microarchitecture is explicitly given, we extract the cpu-flags to use from the compiler rather than hard-coding. This means that we will only ever use instruction sets supported by the compiler, rather than having a case where the uarch and the Intel DPDK both support a given instruction-set, but the compiler does not. In the case where 'native' uarch support is requested, the same mechanism is also used to detect the instruction-sets supported Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Signed-off-by: David Marchand <david.marchand@6wind.com>
2014-02-17 12:46:06 +00:00
# this makefile is called from the generic rte.vars.mk and is
# used to set the RTE_CPUFLAG_* environment variables giving details
# of what instruction sets the target cpu supports.
mk: fix warnings when adding extra warning flags Starting with commit 9aa2053c6e81493b23346ff4e387903560de5c81 EXTRA_CFLAGS is sometimes being passed to the compiler without WERROR_FLAGS which can cause spurious warnings by the dozen, for example with when compiling with EXTRA_CFLAGS="-Wformat-security": cc1: warning: -Wformat-security ignored without -Wformat [-Wformat-security] Passing WERROR_FLAGS to AUTO_CPU helper makes the warning flag usage consistent throughout the codebase, silencing the warnings. Fixes: 9aa2053c6e81 ("mk: influence CPU flags with user input") Signed-off-by: Panu Matilainen <pmatilai@redhat.com> Acked-by: Simon Kagstrom <simon.kagstrom@netinsight.net>
2015-12-07 12:56:43 +00:00
AUTO_CPUFLAGS := $(shell $(CC) $(MACHINE_CFLAGS) $(WERROR_FLAGS) $(EXTRA_CFLAGS) -dM -E - < /dev/null)
mk: rework cpu flags detection For cases where the compilation microarchitecture is explicitly given, we extract the cpu-flags to use from the compiler rather than hard-coding. This means that we will only ever use instruction sets supported by the compiler, rather than having a case where the uarch and the Intel DPDK both support a given instruction-set, but the compiler does not. In the case where 'native' uarch support is requested, the same mechanism is also used to detect the instruction-sets supported Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Signed-off-by: David Marchand <david.marchand@6wind.com>
2014-02-17 12:46:06 +00:00
# adding flags to CPUFLAGS
ifneq ($(filter $(AUTO_CPUFLAGS),__SSE__),)
CPUFLAGS += SSE
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__SSE2__),)
CPUFLAGS += SSE2
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__SSE3__),)
CPUFLAGS += SSE3
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__SSSE3__),)
CPUFLAGS += SSSE3
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__SSE4_1__),)
CPUFLAGS += SSE4_1
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__SSE4_2__),)
CPUFLAGS += SSE4_2
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__AES__),)
CPUFLAGS += AES
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__PCLMUL__),)
CPUFLAGS += PCLMULQDQ
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__AVX__),)
config: make AVX and AVX512 configurable Making AVX and AVX512 configurable is useful for performance and power testing. The similar kernel patch at https://patchwork.kernel.org/patch/9618883/. AVX512 support like in rte_memcpy has been in DPDK since 16.04, but it's still unproven in rich use cases in hardware. Therefore it's marked as experimental for now, will enable it after enough field test and possible optimization. Signed-off-by: Zhihong Wang <zhihong.wang@intel.com> Reviewed-by: Zhiyong Yang <zhiyong.yang@intel.com> Reviewed-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
2017-04-27 23:00:14 +00:00
ifeq ($(CONFIG_RTE_ENABLE_AVX),y)
mk: rework cpu flags detection For cases where the compilation microarchitecture is explicitly given, we extract the cpu-flags to use from the compiler rather than hard-coding. This means that we will only ever use instruction sets supported by the compiler, rather than having a case where the uarch and the Intel DPDK both support a given instruction-set, but the compiler does not. In the case where 'native' uarch support is requested, the same mechanism is also used to detect the instruction-sets supported Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Signed-off-by: David Marchand <david.marchand@6wind.com>
2014-02-17 12:46:06 +00:00
CPUFLAGS += AVX
endif
config: make AVX and AVX512 configurable Making AVX and AVX512 configurable is useful for performance and power testing. The similar kernel patch at https://patchwork.kernel.org/patch/9618883/. AVX512 support like in rte_memcpy has been in DPDK since 16.04, but it's still unproven in rich use cases in hardware. Therefore it's marked as experimental for now, will enable it after enough field test and possible optimization. Signed-off-by: Zhihong Wang <zhihong.wang@intel.com> Reviewed-by: Zhiyong Yang <zhiyong.yang@intel.com> Reviewed-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
2017-04-27 23:00:14 +00:00
endif
mk: rework cpu flags detection For cases where the compilation microarchitecture is explicitly given, we extract the cpu-flags to use from the compiler rather than hard-coding. This means that we will only ever use instruction sets supported by the compiler, rather than having a case where the uarch and the Intel DPDK both support a given instruction-set, but the compiler does not. In the case where 'native' uarch support is requested, the same mechanism is also used to detect the instruction-sets supported Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Signed-off-by: David Marchand <david.marchand@6wind.com>
2014-02-17 12:46:06 +00:00
ifneq ($(filter $(AUTO_CPUFLAGS),__RDRND__),)
CPUFLAGS += RDRAND
endif
eal/x86: check rdrand and rdseed The meson build never checked for the presence of rdrand and rdseed instructions, while make build never checked for rdseed. Ensure builds always have the appropriate checks - and therefore defines - for these instructions. For runtime, we also add in rdseed to the list of known bits returned from cpuid() instruction, so we can confirm its presence at application init time. Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Tested-by: Mattias Rönnblom <mattias.ronnblom@ericsson.com>
2019-05-14 13:37:02 +00:00
ifneq ($(filter $(AUTO_CPUFLAGS),__RDSEED__),)
CPUFLAGS += RDSEED
endif
mk: rework cpu flags detection For cases where the compilation microarchitecture is explicitly given, we extract the cpu-flags to use from the compiler rather than hard-coding. This means that we will only ever use instruction sets supported by the compiler, rather than having a case where the uarch and the Intel DPDK both support a given instruction-set, but the compiler does not. In the case where 'native' uarch support is requested, the same mechanism is also used to detect the instruction-sets supported Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Signed-off-by: David Marchand <david.marchand@6wind.com>
2014-02-17 12:46:06 +00:00
ifneq ($(filter $(AUTO_CPUFLAGS),__FSGSBASE__),)
CPUFLAGS += FSGSBASE
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__F16C__),)
CPUFLAGS += F16C
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__AVX2__),)
config: make AVX and AVX512 configurable Making AVX and AVX512 configurable is useful for performance and power testing. The similar kernel patch at https://patchwork.kernel.org/patch/9618883/. AVX512 support like in rte_memcpy has been in DPDK since 16.04, but it's still unproven in rich use cases in hardware. Therefore it's marked as experimental for now, will enable it after enough field test and possible optimization. Signed-off-by: Zhihong Wang <zhihong.wang@intel.com> Reviewed-by: Zhiyong Yang <zhiyong.yang@intel.com> Reviewed-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
2017-04-27 23:00:14 +00:00
ifeq ($(CONFIG_RTE_ENABLE_AVX),y)
mk: rework cpu flags detection For cases where the compilation microarchitecture is explicitly given, we extract the cpu-flags to use from the compiler rather than hard-coding. This means that we will only ever use instruction sets supported by the compiler, rather than having a case where the uarch and the Intel DPDK both support a given instruction-set, but the compiler does not. In the case where 'native' uarch support is requested, the same mechanism is also used to detect the instruction-sets supported Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Signed-off-by: David Marchand <david.marchand@6wind.com>
2014-02-17 12:46:06 +00:00
CPUFLAGS += AVX2
endif
config: make AVX and AVX512 configurable Making AVX and AVX512 configurable is useful for performance and power testing. The similar kernel patch at https://patchwork.kernel.org/patch/9618883/. AVX512 support like in rte_memcpy has been in DPDK since 16.04, but it's still unproven in rich use cases in hardware. Therefore it's marked as experimental for now, will enable it after enough field test and possible optimization. Signed-off-by: Zhihong Wang <zhihong.wang@intel.com> Reviewed-by: Zhiyong Yang <zhiyong.yang@intel.com> Reviewed-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
2017-04-27 23:00:14 +00:00
endif
mk: rework cpu flags detection For cases where the compilation microarchitecture is explicitly given, we extract the cpu-flags to use from the compiler rather than hard-coding. This means that we will only ever use instruction sets supported by the compiler, rather than having a case where the uarch and the Intel DPDK both support a given instruction-set, but the compiler does not. In the case where 'native' uarch support is requested, the same mechanism is also used to detect the instruction-sets supported Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Signed-off-by: David Marchand <david.marchand@6wind.com>
2014-02-17 12:46:06 +00:00
mk: predefine AVX512 macro for compiler Predefine AVX512 macro if AVX512 is enabled by compiler. Signed-off-by: Zhihong Wang <zhihong.wang@intel.com>
2016-01-18 03:05:11 +00:00
ifneq ($(filter $(AUTO_CPUFLAGS),__AVX512F__),)
config: make AVX and AVX512 configurable Making AVX and AVX512 configurable is useful for performance and power testing. The similar kernel patch at https://patchwork.kernel.org/patch/9618883/. AVX512 support like in rte_memcpy has been in DPDK since 16.04, but it's still unproven in rich use cases in hardware. Therefore it's marked as experimental for now, will enable it after enough field test and possible optimization. Signed-off-by: Zhihong Wang <zhihong.wang@intel.com> Reviewed-by: Zhiyong Yang <zhiyong.yang@intel.com> Reviewed-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
2017-04-27 23:00:14 +00:00
ifeq ($(CONFIG_RTE_ENABLE_AVX512),y)
mk: predefine AVX512 macro for compiler Predefine AVX512 macro if AVX512 is enabled by compiler. Signed-off-by: Zhihong Wang <zhihong.wang@intel.com>
2016-01-18 03:05:11 +00:00
CPUFLAGS += AVX512F
mk: disable gcc AVX512F support This is a workaround to prevent a crash, which might be caused by optimization of newer gcc (7.3.0) on Intel Skylake. This disables AVX512F support of gcc by adding -mno-avx512f if it is disabled in DPDK (CONFIG_RTE_ENABLE_AVX512=n). This does not apply to the meson build as that doesn't have such an option but always enable AVX512F whenever supported. Bugzilla ID: 97 Cc: stable@dpdk.org Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
2018-11-03 01:06:32 +00:00
else
mk: fix scope of disabling AVX512F support AVX512 was disabled for GCC because of Bugzilla issue 97 [1], the GCC defect submitted for the issue [2] highlighted that this is a known binutils version 2.30 issue. Narrowed the scope of no-avx512 to the this specific binutils version. [1] https://bugs.dpdk.org/show_bug.cgi?id=97 [2] https://gcc.gnu.org/bugzilla/show_bug.cgi?id=88096 Fixes: 8d07c82b239f ("mk: disable gcc AVX512F support") Cc: stable@dpdk.org Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com> Acked-by: Thomas Monjalon <thomas@monjalon.net>
2019-01-14 15:49:35 +00:00
# disable AVX512F support for GCC & binutils 2.30 as a workaround for Bug 97
ifeq ($(FORCE_DISABLE_AVX512),y)
mk: disable gcc AVX512F support This is a workaround to prevent a crash, which might be caused by optimization of newer gcc (7.3.0) on Intel Skylake. This disables AVX512F support of gcc by adding -mno-avx512f if it is disabled in DPDK (CONFIG_RTE_ENABLE_AVX512=n). This does not apply to the meson build as that doesn't have such an option but always enable AVX512F whenever supported. Bugzilla ID: 97 Cc: stable@dpdk.org Signed-off-by: Yongseok Koh <yskoh@mellanox.com>
2018-11-03 01:06:32 +00:00
MACHINE_CFLAGS += -mno-avx512f
endif
mk: predefine AVX512 macro for compiler Predefine AVX512 macro if AVX512 is enabled by compiler. Signed-off-by: Zhihong Wang <zhihong.wang@intel.com>
2016-01-18 03:05:11 +00:00
endif
config: make AVX and AVX512 configurable Making AVX and AVX512 configurable is useful for performance and power testing. The similar kernel patch at https://patchwork.kernel.org/patch/9618883/. AVX512 support like in rte_memcpy has been in DPDK since 16.04, but it's still unproven in rich use cases in hardware. Therefore it's marked as experimental for now, will enable it after enough field test and possible optimization. Signed-off-by: Zhihong Wang <zhihong.wang@intel.com> Reviewed-by: Zhiyong Yang <zhiyong.yang@intel.com> Reviewed-by: Yuanhan Liu <yuanhan.liu@linux.intel.com>
2017-04-27 23:00:14 +00:00
endif
mk: predefine AVX512 macro for compiler Predefine AVX512 macro if AVX512 is enabled by compiler. Signed-off-by: Zhihong Wang <zhihong.wang@intel.com>
2016-01-18 03:05:11 +00:00
eal/ppc: cpu flag checks for IBM Power IBM Power processor doesn't have CPU flag hardware registers. This patch uses aux vector software register to get CPU flags and add CPU flag checking support for IBM Power architecture. Signed-off-by: Chao Zhu <chaozhu@linux.vnet.ibm.com> Acked-by: David Marchand <david.marchand@6wind.com>
2014-11-25 22:17:11 +00:00
# IBM Power CPU flags
ifneq ($(filter $(AUTO_CPUFLAGS),__PPC64__),)
CPUFLAGS += PPC64
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__PPC32__),)
CPUFLAGS += PPC32
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__vector),)
CPUFLAGS += ALTIVEC
endif
ifneq ($(filter $(AUTO_CPUFLAGS),__builtin_vsx_xvnmaddadp),)
CPUFLAGS += VSX
endif
eal/arm: add CPU flags for ARMv7 This implementation is based on IBM POWER version of rte_cpuflags. We use software emulation of HW capability registers, because those are usually not directly accessible from userspace on ARM. Signed-off-by: Vlastimil Kosar <kosar@rehivetech.com> Signed-off-by: Jan Viktorin <viktorin@rehivetech.com> Acked-by: David Marchand <david.marchand@6wind.com>
2015-11-02 23:47:22 +00:00
# ARM flags
build: enable ARM NEON flag when __aarch64__ defined GCC version 4.8.5 does not pre-define __ARM_NEON. NEON is not optional for ArmV8. Hence NEON related code can be enabled when __aarch64__ is defined. Bugzilla ID: 82 Cc: stable@dpdk.org Reported-by: Raslan Darawsheh <rasland@mellanox.com> Reported-by: Thomas F Herbert <therbert@redhat.com> Signed-off-by: Honnappa Nagarahalli <honnappa.nagarahalli@arm.com> Reviewed-by: Phil Yang <phil.yang@arm.com> Reviewed-by: Gavin Hu <gavin.hu@arm.com> Acked-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2018-09-02 18:35:28 +00:00
ifneq ($(filter __ARM_NEON __aarch64__,$(AUTO_CPUFLAGS)),)
eal/arm: add CPU flags for ARMv7 This implementation is based on IBM POWER version of rte_cpuflags. We use software emulation of HW capability registers, because those are usually not directly accessible from userspace on ARM. Signed-off-by: Vlastimil Kosar <kosar@rehivetech.com> Signed-off-by: Jan Viktorin <viktorin@rehivetech.com> Acked-by: David Marchand <david.marchand@6wind.com>
2015-11-02 23:47:22 +00:00
CPUFLAGS += NEON
endif
hash: use armv8-a CRC32 instructions armv8-a has optional CRC32 extension, march=armv8-a+crc enables code generation for the ARMv8-A architecture together with the optional CRC32 extensions. added RTE_MACHINE_CPUFLAG_CRC32 to detect the availability of CRC32 extension in compile time. At run-time, The RTE_CPUFLAG_CRC32 can be used to find the availability. armv8-a+crc target support added in GCC 4.9, Used inline assembly and emulated __ARM_FEATURE_CRC32 to work with tool-chain < 4.9 Signed-off-by: Jerin Jacob <jerin.jacob@caviumnetworks.com>
2015-11-23 18:45:36 +00:00
ifneq ($(filter $(AUTO_CPUFLAGS),__ARM_FEATURE_CRC32),)
CPUFLAGS += CRC32
endif
mk: add crypto capability for armv8a and thunderx armv8-a has optional CRYPTO extension which adds the AES, PMULL, SHA1 and SHA2 capabilities. -march=armv8-a+crypto enables code generation for the ARMv8-A architecture together with the optional CRYPTO extensions. Added the following flags to detect the corresponding capability at compile time. * RTE_MACHINE_CPUFLAG_AES * RTE_MACHINE_CPUFLAG_PMULL * RTE_MACHINE_CPUFLAG_SHA1 * RTE_MACHINE_CPUFLAG_SHA2 At run-time, the following flags can be used to detect the capabilities. * RTE_CPUFLAG_AES * RTE_CPUFLAG_PMULL * RTE_CPUFLAG_SHA1 * RTE_CPUFLAG_SHA2 Signed-off-by: Ashwin Sekhar T K <ashwin.sekhar@caviumnetworks.com> Reviewed-by: Jan Viktorin <viktorin@rehivetech.com>
2017-07-04 09:24:05 +00:00
ifneq ($(filter $(AUTO_CPUFLAGS),__ARM_FEATURE_CRYPTO),)
CPUFLAGS += AES
CPUFLAGS += PMULL
CPUFLAGS += SHA1
CPUFLAGS += SHA2
endif
eal/arm: add CPU flags for ARMv7 This implementation is based on IBM POWER version of rte_cpuflags. We use software emulation of HW capability registers, because those are usually not directly accessible from userspace on ARM. Signed-off-by: Vlastimil Kosar <kosar@rehivetech.com> Signed-off-by: Jan Viktorin <viktorin@rehivetech.com> Acked-by: David Marchand <david.marchand@6wind.com>
2015-11-02 23:47:22 +00:00
mk: rework cpu flags detection For cases where the compilation microarchitecture is explicitly given, we extract the cpu-flags to use from the compiler rather than hard-coding. This means that we will only ever use instruction sets supported by the compiler, rather than having a case where the uarch and the Intel DPDK both support a given instruction-set, but the compiler does not. In the case where 'native' uarch support is requested, the same mechanism is also used to detect the instruction-sets supported Signed-off-by: Bruce Richardson <bruce.richardson@intel.com> Signed-off-by: David Marchand <david.marchand@6wind.com>
2014-02-17 12:46:06 +00:00
MACHINE_CFLAGS += $(addprefix -DRTE_MACHINE_CPUFLAG_,$(CPUFLAGS))
# To strip whitespace
comma:= ,
empty:=
space:= $(empty) $(empty)
CPUFLAGSTMP1 := $(addprefix RTE_CPUFLAG_,$(CPUFLAGS))
CPUFLAGSTMP2 := $(subst $(space),$(comma),$(CPUFLAGSTMP1))
mk: restrict CPU flags list When compiling each file, the CPU flags are given as RTE_MACHINE_CPUFLAG_* and in the list RTE_COMPILE_TIME_CPUFLAGS. RTE_MACHINE_CPUFLAG_* are used to check the CPU features when compiling. The list RTE_COMPILE_TIME_CPUFLAGS is used only to check the CPU at runtime in the function rte_cpu_check_supported(). So it is not needed to define this list for every files. That's why RTE_COMPILE_TIME_CPUFLAGS is removed from the common variable MACHINE_CFLAGS and is added only to the CFLAGS of eal_common_cpuflags.c. Signed-off-by: Thomas Monjalon <thomas.monjalon@6wind.com>
2016-03-21 20:12:55 +00:00
CPUFLAGS_LIST := -DRTE_COMPILE_TIME_CPUFLAGS=$(CPUFLAGSTMP2)
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