port: configure loop count for source port
Add support for configurable number of loops through the input PCAP file for the source port. Added an additional parameter to source port CLI command. Signed-off-by: Yogesh Jangra <yogesh.jangra@intel.com> Acked-by: Cristian Dumitrescu <cristian.dumitrescu@intel.com>
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55095ccb7f
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@ -555,7 +555,7 @@ static const char cmd_pipeline_port_in_help[] =
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"pipeline <pipeline_name> port in <port_id>\n"
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" link <link_name> rxq <queue_id> bsz <burst_size>\n"
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" ring <ring_name> bsz <burst_size>\n"
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" | source <mempool_name> <file_name>\n"
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" | source <mempool_name> <file_name> loop <n_loops>\n"
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" | tap <tap_name> mempool <mempool_name> mtu <mtu> bsz <burst_size>\n";
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static void
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@ -682,7 +682,7 @@ cmd_pipeline_port_in(char **tokens,
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struct rte_swx_port_source_params params;
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struct mempool *mp;
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if (n_tokens < t0 + 3) {
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if (n_tokens < t0 + 5) {
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snprintf(out, out_size, MSG_ARG_MISMATCH,
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"pipeline port in source");
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return;
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@ -698,7 +698,18 @@ cmd_pipeline_port_in(char **tokens,
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params.file_name = tokens[t0 + 2];
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t0 += 3;
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if (strcmp(tokens[t0 + 3], "loop") != 0) {
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snprintf(out, out_size, MSG_ARG_NOT_FOUND, "loop");
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return;
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}
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if (parser_read_uint64(¶ms.n_loops, tokens[t0 + 4])) {
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snprintf(out, out_size, MSG_ARG_INVALID,
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"n_loops");
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return;
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}
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t0 += 5;
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status = rte_swx_pipeline_port_in_config(p->p,
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port_id,
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@ -5,16 +5,16 @@ mempool MEMPOOL0 buffer 2304 pool 32K cache 256 cpu 0
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pipeline PIPELINE0 create 0
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pipeline PIPELINE0 port in 0 source MEMPOOL0 ./examples/packet.pcap
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pipeline PIPELINE0 port in 1 source MEMPOOL0 ./examples/packet.pcap
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pipeline PIPELINE0 port in 2 source MEMPOOL0 ./examples/packet.pcap
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pipeline PIPELINE0 port in 3 source MEMPOOL0 ./examples/packet.pcap
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pipeline PIPELINE0 port in 0 source MEMPOOL0 ./examples/pipeline/examples/packet.pcap loop 1
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pipeline PIPELINE0 port in 1 source MEMPOOL0 ./examples/pipeline/examples/packet.pcap loop 1
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pipeline PIPELINE0 port in 2 source MEMPOOL0 ./examples/pipeline/examples/packet.pcap loop 1
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pipeline PIPELINE0 port in 3 source MEMPOOL0 ./examples/pipeline/examples/packet.pcap loop 1
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pipeline PIPELINE0 port out 0 sink none
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pipeline PIPELINE0 port out 1 sink none
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pipeline PIPELINE0 port out 2 sink none
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pipeline PIPELINE0 port out 3 sink none
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pipeline PIPELINE0 build ./examples/l2fwd_macswp.spec
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pipeline PIPELINE0 build ./examples/pipeline/examples/l2fwd_macswp.spec
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thread 1 pipeline PIPELINE0 enable
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@ -5,16 +5,16 @@ mempool MEMPOOL0 buffer 2304 pool 32K cache 256 cpu 0
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pipeline PIPELINE0 create 0
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pipeline PIPELINE0 port in 0 source MEMPOOL0 ./examples/packet.pcap
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pipeline PIPELINE0 port in 1 source MEMPOOL0 ./examples/packet.pcap
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pipeline PIPELINE0 port in 2 source MEMPOOL0 ./examples/packet.pcap
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pipeline PIPELINE0 port in 3 source MEMPOOL0 ./examples/packet.pcap
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pipeline PIPELINE0 port in 0 source MEMPOOL0 ./examples/pipeline/examples/packet.pcap loop 1
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pipeline PIPELINE0 port in 1 source MEMPOOL0 ./examples/pipeline/examples/packet.pcap loop 1
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pipeline PIPELINE0 port in 2 source MEMPOOL0 ./examples/pipeline/examples/packet.pcap loop 1
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pipeline PIPELINE0 port in 3 source MEMPOOL0 ./examples/pipeline/examples/packet.pcap loop 1
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pipeline PIPELINE0 port out 0 sink none
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pipeline PIPELINE0 port out 1 sink none
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pipeline PIPELINE0 port out 2 sink none
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pipeline PIPELINE0 port out 3 sink none
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pipeline PIPELINE0 build ./examples/l2fwd.spec
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pipeline PIPELINE0 build ./examples/pipeline/examples/l2fwd.spec
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thread 1 pipeline PIPELINE0 enable
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@ -5,10 +5,10 @@ mempool MEMPOOL0 buffer 2304 pool 32K cache 256 cpu 0
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pipeline PIPELINE0 create 0
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pipeline PIPELINE0 port in 0 source MEMPOOL0 ./examples/packet.pcap
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pipeline PIPELINE0 port in 1 source MEMPOOL0 ./examples/packet.pcap
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pipeline PIPELINE0 port in 2 source MEMPOOL0 ./examples/packet.pcap
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pipeline PIPELINE0 port in 3 source MEMPOOL0 ./examples/packet.pcap
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pipeline PIPELINE0 port in 0 source MEMPOOL0 ./examples/pipeline/examples/packet.pcap loop 1
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pipeline PIPELINE0 port in 1 source MEMPOOL0 ./examples/pipeline/examples/packet.pcap loop 1
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pipeline PIPELINE0 port in 2 source MEMPOOL0 ./examples/pipeline/examples/packet.pcap loop 1
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pipeline PIPELINE0 port in 3 source MEMPOOL0 ./examples/pipeline/examples/packet.pcap loop 1
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pipeline PIPELINE0 port out 0 sink none
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pipeline PIPELINE0 port out 1 sink none
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@ -16,8 +16,8 @@ pipeline PIPELINE0 port out 2 sink none
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pipeline PIPELINE0 port out 3 sink none
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pipeline PIPELINE0 port out 4 sink none
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pipeline PIPELINE0 build ./examples/vxlan.spec
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pipeline PIPELINE0 table vxlan_table add ./examples/vxlan_table.txt
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pipeline PIPELINE0 build ./examples/pipeline/examples/vxlan.spec
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pipeline PIPELINE0 table vxlan_table add ./examples/pipeline/examples/vxlan_table.txt
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pipeline PIPELINE0 commit
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thread 1 pipeline PIPELINE0 enable
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@ -39,6 +39,7 @@ do { \
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struct source {
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struct {
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struct rte_mempool *pool;
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uint64_t n_loops;
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} params;
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struct rte_swx_port_in_stats stats;
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struct rte_mbuf **pkts;
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@ -96,6 +97,8 @@ source_create(void *args)
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/* Initialization. */
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p->params.pool = params->pool;
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p->params.n_loops = params->n_loops ? params->n_loops : UINT64_MAX;
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/* PCAP file. */
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for (i = 0; i < n_pkts_max; i++) {
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struct pcap_pkthdr pcap_pkthdr;
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@ -142,6 +145,8 @@ source_pkt_rx(void *port, struct rte_swx_pkt *pkt)
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struct rte_mbuf *m_dst, *m_src;
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uint8_t *m_dst_data, *m_src_data;
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if (!p->params.n_loops)
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return 0;
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/* m_src identification. */
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m_src = p->pkts[p->pos];
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m_src_data = rte_pktmbuf_mtod(m_src, uint8_t *);
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@ -177,8 +182,10 @@ source_pkt_rx(void *port, struct rte_swx_pkt *pkt)
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/* m_src next. */
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p->pos++;
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if (p->pos == p->n_pkts)
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if (p->pos == p->n_pkts) {
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p->pos = 0;
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p->params.n_loops--;
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}
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return 1;
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}
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@ -28,6 +28,11 @@ struct rte_swx_port_source_params {
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/** Name of a valid PCAP file to read the input packets from. */
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const char *file_name;
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/** Number of times to loop through the input PCAP file.
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* Loop infinite times when set to 0.
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*/
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uint64_t n_loops;
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/** Maximum number of packets to read from the PCAP file. When 0, it is
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* internally set to RTE_SWX_PORT_SOURCE_PKTS_MAX. Once read from the
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* PCAP file, the same packets are looped forever.
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