eal/arm: add vector memcpy for ARMv7
The SSE based memory copy in DPDK only support x86. This patch
adds ARM NEON based memory copy functions for ARM architecture.
The implementation improves memory copy of short or well aligned
data buffers. The following measurements show improvements over
the libc memcpy on Cortex CPUs.
by X % faster
Length (B) a15 a7 a9
1 4.9 15.2 3.2
7 56.9 48.2 40.3
8 37.3 39.8 29.6
9 69.3 38.7 33.9
15 60.8 35.3 23.7
16 50.6 35.9 35.0
17 57.7 35.7 31.1
31 16.0 23.3 9.0
32 65.9 13.5 21.4
33 3.9 10.3 -3.7
63 2.0 12.9 -2.0
64 66.5 0.0 16.5
65 2.7 7.6 -35.6
127 0.1 4.5 -18.9
128 66.2 1.5 -51.4
129 -0.8 3.2 -35.8
255 -3.1 -0.9 -69.1
256 67.9 1.2 7.2
257 -3.6 -1.9 -36.9
320 67.7 1.4 0.0
384 66.8 1.4 -14.2
511 -44.9 -2.3 -41.9
512 67.3 1.4 -6.8
513 -41.7 -3.0 -36.2
1023 -82.4 -2.8 -41.2
1024 68.3 1.4 -11.6
1025 -80.1 -3.3 -38.1
1518 -47.3 -5.0 -38.3
1522 -48.3 -6.0 -37.9
1600 65.4 1.3 -27.3
2048 59.5 1.5 -10.9
3072 52.3 1.5 -12.2
4096 45.3 1.4 -12.5
5120 40.6 1.5 -14.5
6144 35.4 1.4 -13.4
7168 32.9 1.4 -13.9
8192 28.2 1.4 -15.1
Signed-off-by: Vlastimil Kosar <kosar@rehivetech.com>
Signed-off-by: Jan Viktorin <viktorin@rehivetech.com>
Acked-by: David Marchand <david.marchand@6wind.com>
This commit is contained in:
Vlastimil Kosar
Thomas Monjalon
parent
3242ad76c7
commit
04a2fde35d
38
lib/librte_eal/common/include/arch/arm/rte_memcpy.h
Normal file
38
lib/librte_eal/common/include/arch/arm/rte_memcpy.h
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@ -0,0 +1,38 @@
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/*
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* BSD LICENSE
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*
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* Copyright(c) 2015 RehiveTech. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of RehiveTech nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _RTE_MEMCPY_ARM_H_
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#define _RTE_MEMCPY_ARM_H_
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#include <rte_memcpy_32.h>
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#endif /* _RTE_MEMCPY_ARM_H_ */
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279
lib/librte_eal/common/include/arch/arm/rte_memcpy_32.h
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279
lib/librte_eal/common/include/arch/arm/rte_memcpy_32.h
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@ -0,0 +1,279 @@
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/*
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* BSD LICENSE
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*
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* Copyright(c) 2015 RehiveTech. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of RehiveTech nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _RTE_MEMCPY_ARM32_H_
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#define _RTE_MEMCPY_ARM32_H_
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#include <stdint.h>
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#include <string.h>
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/* ARM NEON Intrinsics are used to copy data */
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#include <arm_neon.h>
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#ifdef __cplusplus
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extern "C" {
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#endif
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#include "generic/rte_memcpy.h"
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static inline void
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rte_mov16(uint8_t *dst, const uint8_t *src)
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{
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vst1q_u8(dst, vld1q_u8(src));
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}
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static inline void
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rte_mov32(uint8_t *dst, const uint8_t *src)
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{
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asm volatile (
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"vld1.8 {d0-d3}, [%0]\n\t"
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"vst1.8 {d0-d3}, [%1]\n\t"
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: "+r" (src), "+r" (dst)
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: : "memory", "d0", "d1", "d2", "d3");
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}
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static inline void
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rte_mov48(uint8_t *dst, const uint8_t *src)
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{
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asm volatile (
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"vld1.8 {d0-d3}, [%0]!\n\t"
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"vld1.8 {d4-d5}, [%0]\n\t"
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"vst1.8 {d0-d3}, [%1]!\n\t"
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"vst1.8 {d4-d5}, [%1]\n\t"
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: "+r" (src), "+r" (dst)
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:
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: "memory", "d0", "d1", "d2", "d3", "d4", "d5");
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}
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static inline void
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rte_mov64(uint8_t *dst, const uint8_t *src)
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{
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asm volatile (
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"vld1.8 {d0-d3}, [%0]!\n\t"
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"vld1.8 {d4-d7}, [%0]\n\t"
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"vst1.8 {d0-d3}, [%1]!\n\t"
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"vst1.8 {d4-d7}, [%1]\n\t"
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: "+r" (src), "+r" (dst)
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:
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: "memory", "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7");
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}
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static inline void
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rte_mov128(uint8_t *dst, const uint8_t *src)
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{
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asm volatile ("pld [%0, #64]" : : "r" (src));
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asm volatile (
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"vld1.8 {d0-d3}, [%0]!\n\t"
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"vld1.8 {d4-d7}, [%0]!\n\t"
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"vld1.8 {d8-d11}, [%0]!\n\t"
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"vld1.8 {d12-d15}, [%0]\n\t"
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"vst1.8 {d0-d3}, [%1]!\n\t"
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"vst1.8 {d4-d7}, [%1]!\n\t"
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"vst1.8 {d8-d11}, [%1]!\n\t"
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"vst1.8 {d12-d15}, [%1]\n\t"
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: "+r" (src), "+r" (dst)
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:
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: "memory", "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
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"d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15");
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}
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static inline void
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rte_mov256(uint8_t *dst, const uint8_t *src)
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{
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asm volatile ("pld [%0, #64]" : : "r" (src));
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asm volatile ("pld [%0, #128]" : : "r" (src));
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asm volatile ("pld [%0, #192]" : : "r" (src));
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asm volatile ("pld [%0, #256]" : : "r" (src));
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asm volatile ("pld [%0, #320]" : : "r" (src));
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asm volatile ("pld [%0, #384]" : : "r" (src));
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asm volatile ("pld [%0, #448]" : : "r" (src));
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asm volatile (
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"vld1.8 {d0-d3}, [%0]!\n\t"
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"vld1.8 {d4-d7}, [%0]!\n\t"
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"vld1.8 {d8-d11}, [%0]!\n\t"
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"vld1.8 {d12-d15}, [%0]!\n\t"
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"vld1.8 {d16-d19}, [%0]!\n\t"
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"vld1.8 {d20-d23}, [%0]!\n\t"
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"vld1.8 {d24-d27}, [%0]!\n\t"
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"vld1.8 {d28-d31}, [%0]\n\t"
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"vst1.8 {d0-d3}, [%1]!\n\t"
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"vst1.8 {d4-d7}, [%1]!\n\t"
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"vst1.8 {d8-d11}, [%1]!\n\t"
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"vst1.8 {d12-d15}, [%1]!\n\t"
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"vst1.8 {d16-d19}, [%1]!\n\t"
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"vst1.8 {d20-d23}, [%1]!\n\t"
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"vst1.8 {d24-d27}, [%1]!\n\t"
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"vst1.8 {d28-d31}, [%1]!\n\t"
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: "+r" (src), "+r" (dst)
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:
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: "memory", "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
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"d8", "d9", "d10", "d11", "d12", "d13", "d14", "d15",
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"d16", "d17", "d18", "d19", "d20", "d21", "d22", "d23",
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"d24", "d25", "d26", "d27", "d28", "d29", "d30", "d31");
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}
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#define rte_memcpy(dst, src, n) \
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({ (__builtin_constant_p(n)) ? \
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memcpy((dst), (src), (n)) : \
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rte_memcpy_func((dst), (src), (n)); })
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static inline void *
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rte_memcpy_func(void *dst, const void *src, size_t n)
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{
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void *ret = dst;
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/* We can't copy < 16 bytes using XMM registers so do it manually. */
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if (n < 16) {
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if (n & 0x01) {
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*(uint8_t *)dst = *(const uint8_t *)src;
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dst = (uint8_t *)dst + 1;
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src = (const uint8_t *)src + 1;
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}
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if (n & 0x02) {
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*(uint16_t *)dst = *(const uint16_t *)src;
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dst = (uint16_t *)dst + 1;
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src = (const uint16_t *)src + 1;
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}
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if (n & 0x04) {
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*(uint32_t *)dst = *(const uint32_t *)src;
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dst = (uint32_t *)dst + 1;
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src = (const uint32_t *)src + 1;
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}
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if (n & 0x08) {
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/* ARMv7 can not handle unaligned access to long long
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* (uint64_t). Therefore two uint32_t operations are
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* used.
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*/
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*(uint32_t *)dst = *(const uint32_t *)src;
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dst = (uint32_t *)dst + 1;
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src = (const uint32_t *)src + 1;
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*(uint32_t *)dst = *(const uint32_t *)src;
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}
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return ret;
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}
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/* Special fast cases for <= 128 bytes */
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if (n <= 32) {
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rte_mov16((uint8_t *)dst, (const uint8_t *)src);
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rte_mov16((uint8_t *)dst - 16 + n,
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(const uint8_t *)src - 16 + n);
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return ret;
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}
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if (n <= 64) {
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rte_mov32((uint8_t *)dst, (const uint8_t *)src);
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rte_mov32((uint8_t *)dst - 32 + n,
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(const uint8_t *)src - 32 + n);
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return ret;
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}
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if (n <= 128) {
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rte_mov64((uint8_t *)dst, (const uint8_t *)src);
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rte_mov64((uint8_t *)dst - 64 + n,
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(const uint8_t *)src - 64 + n);
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return ret;
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}
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/*
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* For large copies > 128 bytes. This combination of 256, 64 and 16 byte
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* copies was found to be faster than doing 128 and 32 byte copies as
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* well.
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*/
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for ( ; n >= 256; n -= 256) {
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rte_mov256((uint8_t *)dst, (const uint8_t *)src);
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dst = (uint8_t *)dst + 256;
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src = (const uint8_t *)src + 256;
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}
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/*
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* We split the remaining bytes (which will be less than 256) into
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* 64byte (2^6) chunks.
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* Using incrementing integers in the case labels of a switch statement
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* enourages the compiler to use a jump table. To get incrementing
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* integers, we shift the 2 relevant bits to the LSB position to first
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* get decrementing integers, and then subtract.
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*/
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switch (3 - (n >> 6)) {
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case 0x00:
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rte_mov64((uint8_t *)dst, (const uint8_t *)src);
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n -= 64;
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dst = (uint8_t *)dst + 64;
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src = (const uint8_t *)src + 64; /* fallthrough */
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case 0x01:
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rte_mov64((uint8_t *)dst, (const uint8_t *)src);
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n -= 64;
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dst = (uint8_t *)dst + 64;
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src = (const uint8_t *)src + 64; /* fallthrough */
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case 0x02:
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rte_mov64((uint8_t *)dst, (const uint8_t *)src);
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n -= 64;
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dst = (uint8_t *)dst + 64;
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src = (const uint8_t *)src + 64; /* fallthrough */
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default:
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break;
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}
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/*
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* We split the remaining bytes (which will be less than 64) into
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* 16byte (2^4) chunks, using the same switch structure as above.
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*/
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switch (3 - (n >> 4)) {
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case 0x00:
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rte_mov16((uint8_t *)dst, (const uint8_t *)src);
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n -= 16;
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dst = (uint8_t *)dst + 16;
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src = (const uint8_t *)src + 16; /* fallthrough */
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case 0x01:
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rte_mov16((uint8_t *)dst, (const uint8_t *)src);
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n -= 16;
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dst = (uint8_t *)dst + 16;
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src = (const uint8_t *)src + 16; /* fallthrough */
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case 0x02:
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rte_mov16((uint8_t *)dst, (const uint8_t *)src);
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n -= 16;
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dst = (uint8_t *)dst + 16;
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src = (const uint8_t *)src + 16; /* fallthrough */
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default:
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break;
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}
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/* Copy any remaining bytes, without going beyond end of buffers */
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if (n != 0)
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rte_mov16((uint8_t *)dst - 16 + n,
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(const uint8_t *)src - 16 + n);
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return ret;
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}
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#ifdef __cplusplus
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}
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#endif
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#endif /* _RTE_MEMCPY_ARM32_H_ */
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