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net/i40e: fix Rx instability with vector mode

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Previously, there is instability during vector Rx if descriptor
number is not power of 2, e.g. process hang and some Rx packets
are unexpectedly empty. That's because vector Rx mode assumes Rx
descriptor number is power of 2 when doing bit mask.
This patch allows vector mode only when the number of Rx descriptor
is power of 2.

Fixes: 8e109464c0 ("i40e: allow vector Rx and Tx usage")
Fixes: a3c83a2527 ("net/i40e: enable runtime queue setup")
Cc: stable@dpdk.org

Signed-off-by: Beilei Xing <beilei.xing@intel.com>
Acked-by: Konstantin Ananyev <konstantin.ananyev@intel.com>
This commit is contained in:
Beilei Xing 2018-11-05 11:18:12 +08:00 committed by Qi Zhang
parent 37cf9ea83d
commit 054d1be48c
3 changed files with 50 additions and 0 deletions
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7
doc/guides/nics/i40e.rst
View File

@ -172,6 +172,13 @@ Runtime Config Options
-w 84:00.0,use-latest-supported-vec=1
Vector RX Pre-conditions
~~~~~~~~~~~~~~~~~~~~~~~~
For Vector RX it is assumed that the number of descriptor rings will be a power
of 2. With this pre-condition, the ring pointer can easily scroll back to the
head after hitting the tail without a conditional check. In addition Vector RX
can use this assumption to do a bit mask using ``ring_size - 1``.
Driver compilation and testing
------------------------------

5
drivers/net/i40e/i40e_rxtx.c
View File

@ -1741,6 +1741,11 @@ i40e_dev_rx_queue_setup_runtime(struct rte_eth_dev *dev,
ad->rx_bulk_alloc_allowed = false;
i40e_set_rx_function(dev);
return 0;
} else if (ad->rx_vec_allowed && !rte_is_power_of_2(rxq->nb_rx_desc)) {
PMD_DRV_LOG(ERR, "Vector mode is allowed, but descriptor"
" number %d of queue %d isn't power of 2",
rxq->nb_rx_desc, rxq->queue_id);
return -EINVAL;
}
/* check bulk alloc conflict */

38
drivers/net/i40e/i40e_rxtx_vec_common.h
View File

@ -192,8 +192,13 @@ static inline int
i40e_rx_vec_dev_conf_condition_check_default(struct rte_eth_dev *dev)
{
#ifndef RTE_LIBRTE_IEEE1588
struct i40e_adapter *ad =
I40E_DEV_PRIVATE_TO_ADAPTER(dev->data->dev_private);
struct rte_eth_rxmode *rxmode = &dev->data->dev_conf.rxmode;
struct rte_fdir_conf *fconf = &dev->data->dev_conf.fdir_conf;
struct i40e_rx_queue *rxq;
uint16_t desc, i;
bool first_queue;
/* no fdir support */
if (fconf->mode != RTE_FDIR_MODE_NONE)
@ -207,6 +212,39 @@ i40e_rx_vec_dev_conf_condition_check_default(struct rte_eth_dev *dev)
if (rxmode->offloads & DEV_RX_OFFLOAD_VLAN_EXTEND)
return -1;
/**
* Vector mode is allowed only when number of Rx queue
* descriptor is power of 2.
*/
if (!dev->data->dev_started) {
first_queue = true;
for (i = 0; i < dev->data->nb_rx_queues; i++) {
rxq = dev->data->rx_queues[i];
if (!rxq)
continue;
desc = rxq->nb_rx_desc;
if (first_queue)
ad->rx_vec_allowed =
rte_is_power_of_2(desc);
else
ad->rx_vec_allowed =
ad->rx_vec_allowed ?
rte_is_power_of_2(desc) :
ad->rx_vec_allowed;
first_queue = false;
}
} else {
/* Only check the first queue's descriptor number */
for (i = 0; i < dev->data->nb_rx_queues; i++) {
rxq = dev->data->rx_queues[i];
if (!rxq)
continue;
desc = rxq->nb_rx_desc;
ad->rx_vec_allowed = rte_is_power_of_2(desc);
break;
}
}
return 0;
#else
RTE_SET_USED(dev);