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net/sfc/base: move MAC address config to ef10 NIC board cfg

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Signed-off-by: Andy Moreton <amoreton@solarflare.com>
Signed-off-by: Andrew Rybchenko <arybchenko@solarflare.com>
This commit is contained in:
Andy Moreton 2018-02-20 07:34:08 +00:00 committed by Ferruh Yigit
parent 579c1e6f2e
commit 08d38249bc
4 changed files with 63 additions and 117 deletions
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33
drivers/net/sfc/base/ef10_nic.c
View File

@ -1551,6 +1551,7 @@ ef10_nic_board_cfg(
uint32_t port;
uint32_t pf;
uint32_t vf;
uint8_t mac_addr[6] = { 0 };
efx_rc_t rc;
/* Get the (zero-based) MCDI port number */
@ -1576,13 +1577,43 @@ ef10_nic_board_cfg(
encp->enc_pf = pf;
encp->enc_vf = vf;
/* MAC address for this function */
if (EFX_PCI_FUNCTION_IS_PF(encp)) {
rc = efx_mcdi_get_mac_address_pf(enp, mac_addr);
#if EFSYS_OPT_ALLOW_UNCONFIGURED_NIC
/*
* Disable static config checking, ONLY for manufacturing test
* and setup at the factory, to allow the static config to be
* installed.
*/
#else /* EFSYS_OPT_ALLOW_UNCONFIGURED_NIC */
if ((rc == 0) && (mac_addr[0] & 0x02)) {
/*
* If the static config does not include a global MAC
* address pool then the board may return a locally
* administered MAC address (this should only happen on
* incorrectly programmed boards).
*/
rc = EINVAL;
}
#endif /* EFSYS_OPT_ALLOW_UNCONFIGURED_NIC */
} else {
rc = efx_mcdi_get_mac_address_vf(enp, mac_addr);
}
if (rc != 0)
goto fail4;
EFX_MAC_ADDR_COPY(encp->enc_mac_addr, mac_addr);
/* Get remaining controller-specific board config */
if ((rc = enop->eno_board_cfg(enp)) != 0)
if (rc != EACCES)
goto fail4;
goto fail5;
return (0);
fail5:
EFSYS_PROBE(fail5);
fail4:
EFSYS_PROBE(fail4);
fail3:

45
drivers/net/sfc/base/hunt_nic.c
View File

@ -77,7 +77,6 @@ hunt_board_cfg(
__in efx_nic_t *enp)
{
efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
uint8_t mac_addr[6] = { 0 };
uint32_t board_type = 0;
ef10_link_state_t els;
efx_port_t *epp = &(enp->en_port);
@ -98,26 +97,6 @@ hunt_board_cfg(
EFX_STATIC_ASSERT(1U << EFX_VI_WINDOW_SHIFT_8K == 8192);
encp->enc_vi_window_shift = EFX_VI_WINDOW_SHIFT_8K;
/* MAC address for this function */
if (EFX_PCI_FUNCTION_IS_PF(encp)) {
rc = efx_mcdi_get_mac_address_pf(enp, mac_addr);
if ((rc == 0) && (mac_addr[0] & 0x02)) {
/*
* If the static config does not include a global MAC
* address pool then the board may return a locally
* administered MAC address (this should only happen on
* incorrectly programmed boards).
*/
rc = EINVAL;
}
} else {
rc = efx_mcdi_get_mac_address_vf(enp, mac_addr);
}
if (rc != 0)
goto fail1;
EFX_MAC_ADDR_COPY(encp->enc_mac_addr, mac_addr);
/* Board configuration */
rc = efx_mcdi_get_board_cfg(enp, &board_type, NULL, NULL);
if (rc != 0) {
@ -125,7 +104,7 @@ hunt_board_cfg(
if (rc == EACCES)
board_type = 0;
else
goto fail2;
goto fail1;
}
encp->enc_board_type = board_type;
@ -133,11 +112,11 @@ hunt_board_cfg(
/* Fill out fields in enp->en_port and enp->en_nic_cfg from MCDI */
if ((rc = efx_mcdi_get_phy_cfg(enp)) != 0)
goto fail3;
goto fail2;
/* Obtain the default PHY advertised capabilities */
if ((rc = ef10_phy_get_link(enp, &els)) != 0)
goto fail4;
goto fail3;
epp->ep_default_adv_cap_mask = els.els_adv_cap_mask;
epp->ep_adv_cap_mask = els.els_adv_cap_mask;
@ -168,7 +147,7 @@ hunt_board_cfg(
else if ((rc == ENOTSUP) || (rc == ENOENT))
encp->enc_bug35388_workaround = B_FALSE;
else
goto fail5;
goto fail4;
/*
* If the bug41750 workaround is enabled, then do not test interrupts,
@ -187,7 +166,7 @@ hunt_board_cfg(
} else if ((rc == ENOTSUP) || (rc == ENOENT)) {
encp->enc_bug41750_workaround = B_FALSE;
} else {
goto fail6;
goto fail5;
}
if (EFX_PCI_FUNCTION_IS_VF(encp)) {
/* Interrupt testing does not work for VFs. See bug50084. */
@ -225,12 +204,12 @@ hunt_board_cfg(
} else if ((rc == ENOTSUP) || (rc == ENOENT)) {
encp->enc_bug26807_workaround = B_FALSE;
} else {
goto fail7;
goto fail6;
}
/* Get clock frequencies (in MHz). */
if ((rc = efx_mcdi_get_clock(enp, &sysclk, &dpcpu_clk)) != 0)
goto fail8;
goto fail7;
/*
* The Huntington timer quantum is 1536 sysclk cycles, documented for
@ -249,7 +228,7 @@ hunt_board_cfg(
/* Check capabilities of running datapath firmware */
if ((rc = ef10_get_datapath_caps(enp)) != 0)
goto fail9;
goto fail8;
/* Alignment for receive packet DMA buffers */
encp->enc_rx_buf_align_start = 1;
@ -299,13 +278,13 @@ hunt_board_cfg(
* can result in time-of-check/time-of-use bugs.
*/
if ((rc = ef10_get_privilege_mask(enp, &mask)) != 0)
goto fail10;
goto fail9;
encp->enc_privilege_mask = mask;
/* Get interrupt vector limits */
if ((rc = efx_mcdi_get_vector_cfg(enp, &base, &nvec, NULL)) != 0) {
if (EFX_PCI_FUNCTION_IS_PF(encp))
goto fail11;
goto fail10;
/* Ignore error (cannot query vector limits from a VF). */
base = 0;
@ -321,7 +300,7 @@ hunt_board_cfg(
encp->enc_tx_tso_tcp_header_offset_limit = EF10_TCP_HEADER_OFFSET_LIMIT;
if ((rc = hunt_nic_get_required_pcie_bandwidth(enp, &bandwidth)) != 0)
goto fail12;
goto fail11;
encp->enc_required_pcie_bandwidth_mbps = bandwidth;
/* All Huntington devices have a PCIe Gen3, 8 lane connector */
@ -329,8 +308,6 @@ hunt_board_cfg(
return (0);
fail12:
EFSYS_PROBE(fail12);
fail11:
EFSYS_PROBE(fail11);
fail10:

51
drivers/net/sfc/base/medford2_nic.c
View File

@ -49,7 +49,6 @@ medford2_board_cfg(
__in efx_nic_t *enp)
{
efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
uint8_t mac_addr[6] = { 0 };
uint32_t board_type = 0;
ef10_link_state_t els;
efx_port_t *epp = &(enp->en_port);
@ -74,34 +73,6 @@ medford2_board_cfg(
encp->enc_vi_window_shift = vi_window_shift;
/* MAC address for this function */
if (EFX_PCI_FUNCTION_IS_PF(encp)) {
rc = efx_mcdi_get_mac_address_pf(enp, mac_addr);
#if EFSYS_OPT_ALLOW_UNCONFIGURED_NIC
/*
* Disable static config checking for Medford NICs, ONLY
* for manufacturing test and setup at the factory, to
* allow the static config to be installed.
*/
#else /* EFSYS_OPT_ALLOW_UNCONFIGURED_NIC */
if ((rc == 0) && (mac_addr[0] & 0x02)) {
/*
* If the static config does not include a global MAC
* address pool then the board may return a locally
* administered MAC address (this should only happen on
* incorrectly programmed boards).
*/
rc = EINVAL;
}
#endif /* EFSYS_OPT_ALLOW_UNCONFIGURED_NIC */
} else {
rc = efx_mcdi_get_mac_address_vf(enp, mac_addr);
}
if (rc != 0)
goto fail2;
EFX_MAC_ADDR_COPY(encp->enc_mac_addr, mac_addr);
/* Board configuration */
rc = efx_mcdi_get_board_cfg(enp, &board_type, NULL, NULL);
if (rc != 0) {
@ -109,7 +80,7 @@ medford2_board_cfg(
if (rc == EACCES)
board_type = 0;
else
goto fail3;
goto fail2;
}
encp->enc_board_type = board_type;
@ -117,11 +88,11 @@ medford2_board_cfg(
/* Fill out fields in enp->en_port and enp->en_nic_cfg from MCDI */
if ((rc = efx_mcdi_get_phy_cfg(enp)) != 0)
goto fail4;
goto fail3;
/* Obtain the default PHY advertised capabilities */
if ((rc = ef10_phy_get_link(enp, &els)) != 0)
goto fail5;
goto fail4;
epp->ep_default_adv_cap_mask = els.els_adv_cap_mask;
epp->ep_adv_cap_mask = els.els_adv_cap_mask;
@ -165,11 +136,11 @@ medford2_board_cfg(
else if ((rc == ENOTSUP) || (rc == ENOENT))
encp->enc_bug61265_workaround = B_FALSE;
else
goto fail6;
goto fail5;
/* Get clock frequencies (in MHz). */
if ((rc = efx_mcdi_get_clock(enp, &sysclk, &dpcpu_clk)) != 0)
goto fail7;
goto fail6;
/*
* The Medford2 timer quantum is 1536 dpcpu_clk cycles, documented for
@ -181,7 +152,7 @@ medford2_board_cfg(
/* Check capabilities of running datapath firmware */
if ((rc = ef10_get_datapath_caps(enp)) != 0)
goto fail8;
goto fail7;
/* Alignment for receive packet DMA buffers */
encp->enc_rx_buf_align_start = 1;
@ -189,7 +160,7 @@ medford2_board_cfg(
/* Get the RX DMA end padding alignment configuration */
if ((rc = efx_mcdi_get_rxdp_config(enp, &end_padding)) != 0) {
if (rc != EACCES)
goto fail9;
goto fail8;
/* Assume largest tail padding size supported by hardware */
end_padding = 256;
@ -241,13 +212,13 @@ medford2_board_cfg(
* can result in time-of-check/time-of-use bugs.
*/
if ((rc = ef10_get_privilege_mask(enp, &mask)) != 0)
goto fail10;
goto fail9;
encp->enc_privilege_mask = mask;
/* Get interrupt vector limits */
if ((rc = efx_mcdi_get_vector_cfg(enp, &base, &nvec, NULL)) != 0) {
if (EFX_PCI_FUNCTION_IS_PF(encp))
goto fail11;
goto fail10;
/* Ignore error (cannot query vector limits from a VF). */
base = 0;
@ -270,14 +241,12 @@ medford2_board_cfg(
rc = medford2_nic_get_required_pcie_bandwidth(enp, &bandwidth);
if (rc != 0)
goto fail12;
goto fail11;
encp->enc_required_pcie_bandwidth_mbps = bandwidth;
encp->enc_max_pcie_link_gen = EFX_PCIE_LINK_SPEED_GEN3;
return (0);
fail12:
EFSYS_PROBE(fail12);
fail11:
EFSYS_PROBE(fail11);
fail10:

51
drivers/net/sfc/base/medford_nic.c
View File

@ -47,7 +47,6 @@ medford_board_cfg(
__in efx_nic_t *enp)
{
efx_nic_cfg_t *encp = &(enp->en_nic_cfg);
uint8_t mac_addr[6] = { 0 };
uint32_t board_type = 0;
ef10_link_state_t els;
efx_port_t *epp = &(enp->en_port);
@ -73,34 +72,6 @@ medford_board_cfg(
EFX_STATIC_ASSERT(1U << EFX_VI_WINDOW_SHIFT_8K == 8192);
encp->enc_vi_window_shift = EFX_VI_WINDOW_SHIFT_8K;
/* MAC address for this function */
if (EFX_PCI_FUNCTION_IS_PF(encp)) {
rc = efx_mcdi_get_mac_address_pf(enp, mac_addr);
#if EFSYS_OPT_ALLOW_UNCONFIGURED_NIC
/*
* Disable static config checking for Medford NICs, ONLY
* for manufacturing test and setup at the factory, to
* allow the static config to be installed.
*/
#else /* EFSYS_OPT_ALLOW_UNCONFIGURED_NIC */
if ((rc == 0) && (mac_addr[0] & 0x02)) {
/*
* If the static config does not include a global MAC
* address pool then the board may return a locally
* administered MAC address (this should only happen on
* incorrectly programmed boards).
*/
rc = EINVAL;
}
#endif /* EFSYS_OPT_ALLOW_UNCONFIGURED_NIC */
} else {
rc = efx_mcdi_get_mac_address_vf(enp, mac_addr);
}
if (rc != 0)
goto fail1;
EFX_MAC_ADDR_COPY(encp->enc_mac_addr, mac_addr);
/* Board configuration */
rc = efx_mcdi_get_board_cfg(enp, &board_type, NULL, NULL);
if (rc != 0) {
@ -108,7 +79,7 @@ medford_board_cfg(
if (rc == EACCES)
board_type = 0;
else
goto fail2;
goto fail1;
}
encp->enc_board_type = board_type;
@ -116,11 +87,11 @@ medford_board_cfg(
/* Fill out fields in enp->en_port and enp->en_nic_cfg from MCDI */
if ((rc = efx_mcdi_get_phy_cfg(enp)) != 0)
goto fail3;
goto fail2;
/* Obtain the default PHY advertised capabilities */
if ((rc = ef10_phy_get_link(enp, &els)) != 0)
goto fail4;
goto fail3;
epp->ep_default_adv_cap_mask = els.els_adv_cap_mask;
epp->ep_adv_cap_mask = els.els_adv_cap_mask;
@ -164,11 +135,11 @@ medford_board_cfg(
else if ((rc == ENOTSUP) || (rc == ENOENT))
encp->enc_bug61265_workaround = B_FALSE;
else
goto fail5;
goto fail4;
/* Get clock frequencies (in MHz). */
if ((rc = efx_mcdi_get_clock(enp, &sysclk, &dpcpu_clk)) != 0)
goto fail6;
goto fail5;
/*
* The Medford timer quantum is 1536 dpcpu_clk cycles, documented for
@ -180,7 +151,7 @@ medford_board_cfg(
/* Check capabilities of running datapath firmware */
if ((rc = ef10_get_datapath_caps(enp)) != 0)
goto fail7;
goto fail6;
/* Alignment for receive packet DMA buffers */
encp->enc_rx_buf_align_start = 1;
@ -188,7 +159,7 @@ medford_board_cfg(
/* Get the RX DMA end padding alignment configuration */
if ((rc = efx_mcdi_get_rxdp_config(enp, &end_padding)) != 0) {
if (rc != EACCES)
goto fail8;
goto fail7;
/* Assume largest tail padding size supported by hardware */
end_padding = 256;
@ -240,13 +211,13 @@ medford_board_cfg(
* can result in time-of-check/time-of-use bugs.
*/
if ((rc = ef10_get_privilege_mask(enp, &mask)) != 0)
goto fail9;
goto fail8;
encp->enc_privilege_mask = mask;
/* Get interrupt vector limits */
if ((rc = efx_mcdi_get_vector_cfg(enp, &base, &nvec, NULL)) != 0) {
if (EFX_PCI_FUNCTION_IS_PF(encp))
goto fail10;
goto fail9;
/* Ignore error (cannot query vector limits from a VF). */
base = 0;
@ -269,14 +240,12 @@ medford_board_cfg(
rc = medford_nic_get_required_pcie_bandwidth(enp, &bandwidth);
if (rc != 0)
goto fail11;
goto fail10;
encp->enc_required_pcie_bandwidth_mbps = bandwidth;
encp->enc_max_pcie_link_gen = EFX_PCIE_LINK_SPEED_GEN3;
return (0);
fail11:
EFSYS_PROBE(fail11);
fail10:
EFSYS_PROBE(fail10);
fail9: